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a7ed1e2e 1/** @file\r
f06c92a6 2 Industry Standard Definitions of SMBIOS Table Specification v3.3.0.\r
a7ed1e2e 3\r
70c50f19 4Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
713e4b00 5(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>\r
f06c92a6 6(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>\r
9344f092 7SPDX-License-Identifier: BSD-2-Clause-Patent\r
a7ed1e2e 8\r
a7ed1e2e 9**/\r
10\r
11#ifndef __SMBIOS_STANDARD_H__\r
12#define __SMBIOS_STANDARD_H__\r
98cb9ae8 13\r
f2d0889f 14///\r
15/// Reference SMBIOS 2.6, chapter 3.1.2.\r
16/// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
17/// use by this specification.\r
18///\r
19#define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r
20\r
7ddba202
SZ		 21///\r
22/// Reference SMBIOS 2.7, chapter 6.1.2.\r
23/// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r
24/// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r
25/// This number is not used for any other purpose by the SMBIOS specification.\r
26///\r
27#define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r
28\r
f2d0889f 29///\r
af2dc6a7 30/// Reference SMBIOS 2.6, chapter 3.1.3.\r
31/// Each text string is limited to 64 significant characters due to system MIF limitations.\r
7ddba202
SZ		 32/// Reference SMBIOS 2.7, chapter 6.1.3.\r
33/// It will have no limit on the length of each individual text string.\r
f2d0889f 34///\r
35#define SMBIOS_STRING_MAX_LENGTH 64\r
36\r
7254d134
JY		 37//\r
38// The length of the entire structure table (including all strings) must be reported\r
39// in the Structure Table Length field of the SMBIOS Structure Table Entry Point,\r
40// which is a WORD field limited to 65,535 bytes.\r
41//\r
42#define SMBIOS_TABLE_MAX_LENGTH 0xFFFF\r
43\r
44//\r
45// For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.\r
46//\r
47#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r
48\r
bb7051eb 49//\r
f06c92a6 50// SMBIOS type macros which is according to SMBIOS 3.3.0 specification.\r
bb7051eb
MH		 51//\r
52#define SMBIOS_TYPE_BIOS_INFORMATION 0\r
53#define SMBIOS_TYPE_SYSTEM_INFORMATION 1\r
54#define SMBIOS_TYPE_BASEBOARD_INFORMATION 2\r
55#define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3\r
56#define SMBIOS_TYPE_PROCESSOR_INFORMATION 4\r
57#define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5\r
58#define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6\r
59#define SMBIOS_TYPE_CACHE_INFORMATION 7\r
60#define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8\r
61#define SMBIOS_TYPE_SYSTEM_SLOTS 9\r
62#define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10\r
63#define SMBIOS_TYPE_OEM_STRINGS 11\r
64#define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12\r
65#define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13\r
66#define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14\r
67#define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15\r
68#define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16\r
69#define SMBIOS_TYPE_MEMORY_DEVICE 17\r
70#define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18\r
71#define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19\r
72#define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20\r
73#define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21\r
74#define SMBIOS_TYPE_PORTABLE_BATTERY 22\r
75#define SMBIOS_TYPE_SYSTEM_RESET 23\r
76#define SMBIOS_TYPE_HARDWARE_SECURITY 24\r
77#define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25\r
78#define SMBIOS_TYPE_VOLTAGE_PROBE 26\r
79#define SMBIOS_TYPE_COOLING_DEVICE 27\r
80#define SMBIOS_TYPE_TEMPERATURE_PROBE 28\r
81#define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29\r
82#define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30\r
83#define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31\r
84#define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32\r
85#define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33\r
86#define SMBIOS_TYPE_MANAGEMENT_DEVICE 34\r
87#define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35\r
88#define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36\r
89#define SMBIOS_TYPE_MEMORY_CHANNEL 37\r
90#define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38\r
91#define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39\r
92#define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40\r
93#define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41\r
94#define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42\r
713e4b00 95#define SMBIOS_TYPE_TPM_DEVICE 43\r
f06c92a6 96#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44\r
bb7051eb 97\r
f2d0889f 98///\r
99/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
9095d37b 100/// Upper-level software that interprets the SMBIOS structure-table should bypass an\r
f2d0889f 101/// Inactive structure just like a structure type that the software does not recognize.\r
102///\r
9095d37b 103#define SMBIOS_TYPE_INACTIVE 0x007E\r
f2d0889f 104\r
105///\r
106/// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r
107/// The end-of-table indicator is used in the last physical structure in a table\r
108///\r
109#define SMBIOS_TYPE_END_OF_TABLE 0x007F\r
110\r
bb7051eb
MH		 111#define SMBIOS_OEM_BEGIN 128\r
112#define SMBIOS_OEM_END 255\r
113\r
114///\r
115/// Types 0 through 127 (7Fh) are reserved for and defined by this\r
9095d37b 116/// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information.\r
bb7051eb
MH		 117///\r
118typedef UINT8 SMBIOS_TYPE;\r
119\r
120///\r
121/// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version\r
122/// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS\r
123/// Structure function to retrieve a specific structure; the handle numbers are not required to be\r
124/// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
125/// use by this specification.\r
126/// If the system configuration changes, a previously assigned handle might no longer exist.\r
127/// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle\r
128/// number to another structure.\r
129///\r
130typedef UINT16 SMBIOS_HANDLE;\r
131\r
4135253b 132///\r
af2dc6a7 133/// Smbios Table Entry Point Structure.\r
4135253b 134///\r
766f4bc1 135#pragma pack(1)\r
a7ed1e2e 136typedef struct {\r
137 UINT8 AnchorString[4];\r
138 UINT8 EntryPointStructureChecksum;\r
139 UINT8 EntryPointLength;\r
140 UINT8 MajorVersion;\r
141 UINT8 MinorVersion;\r
142 UINT16 MaxStructureSize;\r
143 UINT8 EntryPointRevision;\r
144 UINT8 FormattedArea[5];\r
145 UINT8 IntermediateAnchorString[5];\r
146 UINT8 IntermediateChecksum;\r
147 UINT16 TableLength;\r
148 UINT32 TableAddress;\r
149 UINT16 NumberOfSmbiosStructures;\r
150 UINT8 SmbiosBcdRevision;\r
151} SMBIOS_TABLE_ENTRY_POINT;\r
152\r
6cd35c62
EL		 153typedef struct {\r
154 UINT8 AnchorString[5];\r
155 UINT8 EntryPointStructureChecksum;\r
156 UINT8 EntryPointLength;\r
157 UINT8 MajorVersion;\r
158 UINT8 MinorVersion;\r
159 UINT8 DocRev;\r
160 UINT8 EntryPointRevision;\r
161 UINT8 Reserved;\r
162 UINT32 TableMaximumSize;\r
163 UINT64 TableAddress;\r
164} SMBIOS_TABLE_3_0_ENTRY_POINT;\r
165\r
ec8432e5 166///\r
af2dc6a7 167/// The Smbios structure header.\r
ec8432e5 168///\r
a7ed1e2e 169typedef struct {\r
bb7051eb
MH		 170 SMBIOS_TYPE Type;\r
171 UINT8 Length;\r
172 SMBIOS_HANDLE Handle;\r
a7ed1e2e 173} SMBIOS_STRUCTURE;\r
174\r
bf7ea009 175///\r
bb7051eb
MH		 176/// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after\r
177/// the formatted portion of the structure. This method of returning string information eliminates the need for\r
178/// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null\r
179/// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of\r
180/// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's\r
181/// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion\r
182/// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the\r
183/// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string\r
184/// references), the formatted section of the structure is followed by two null (00h) BYTES.\r
bf7ea009 185///\r
61ce5861 186typedef UINT8 SMBIOS_TABLE_STRING;\r
187\r
98cb9ae8 188///\r
7ddba202
SZ		 189/// BIOS Characteristics\r
190/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r
98cb9ae8 191///\r
192typedef struct {\r
af2dc6a7 193 UINT32 Reserved :2; ///< Bits 0-1.\r
7ddba202
SZ		 194 UINT32 Unknown :1;\r
195 UINT32 BiosCharacteristicsNotSupported :1;\r
196 UINT32 IsaIsSupported :1;\r
98cb9ae8 197 UINT32 McaIsSupported :1;\r
198 UINT32 EisaIsSupported :1;\r
199 UINT32 PciIsSupported :1;\r
200 UINT32 PcmciaIsSupported :1;\r
201 UINT32 PlugAndPlayIsSupported :1;\r
202 UINT32 ApmIsSupported :1;\r
203 UINT32 BiosIsUpgradable :1;\r
204 UINT32 BiosShadowingAllowed :1;\r
205 UINT32 VlVesaIsSupported :1;\r
206 UINT32 EscdSupportIsAvailable :1;\r
207 UINT32 BootFromCdIsSupported :1;\r
208 UINT32 SelectableBootIsSupported :1;\r
209 UINT32 RomBiosIsSocketed :1;\r
210 UINT32 BootFromPcmciaIsSupported :1;\r
211 UINT32 EDDSpecificationIsSupported :1;\r
212 UINT32 JapaneseNecFloppyIsSupported :1;\r
213 UINT32 JapaneseToshibaFloppyIsSupported :1;\r
214 UINT32 Floppy525_360IsSupported :1;\r
215 UINT32 Floppy525_12IsSupported :1;\r
216 UINT32 Floppy35_720IsSupported :1;\r
217 UINT32 Floppy35_288IsSupported :1;\r
218 UINT32 PrintScreenIsSupported :1;\r
219 UINT32 Keyboard8042IsSupported :1;\r
220 UINT32 SerialIsSupported :1;\r
221 UINT32 PrinterIsSupported :1;\r
222 UINT32 CgaMonoIsSupported :1;\r
223 UINT32 NecPc98 :1;\r
9095d37b
LG		 224 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor\r
225 ///< and bits 48-63 reserved for System Vendor.\r
98cb9ae8 226} MISC_BIOS_CHARACTERISTICS;\r
227\r
228///\r
7ddba202
SZ		 229/// BIOS Characteristics Extension Byte 1.\r
230/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r
231/// within the BIOS Information structure.\r
98cb9ae8 232///\r
233typedef struct {\r
234 UINT8 AcpiIsSupported :1;\r
7ddba202
SZ		 235 UINT8 UsbLegacyIsSupported :1;\r
236 UINT8 AgpIsSupported :1;\r
119c1688 237 UINT8 I2OBootIsSupported :1;\r
98cb9ae8 238 UINT8 Ls120BootIsSupported :1;\r
239 UINT8 AtapiZipDriveBootIsSupported :1;\r
240 UINT8 Boot1394IsSupported :1;\r
241 UINT8 SmartBatteryIsSupported :1;\r
242} MBCE_BIOS_RESERVED;\r
243\r
244///\r
af2dc6a7 245/// BIOS Characteristics Extension Byte 2.\r
7ddba202 246/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r
98cb9ae8 247/// within the BIOS Information structure.\r
248///\r
249typedef struct {\r
250 UINT8 BiosBootSpecIsSupported :1;\r
7ddba202
SZ		 251 UINT8 FunctionKeyNetworkBootIsSupported :1;\r
252 UINT8 TargetContentDistributionEnabled :1;\r
253 UINT8 UefiSpecificationSupported :1;\r
254 UINT8 VirtualMachineSupported :1;\r
255 UINT8 ExtensionByte2Reserved :3;\r
98cb9ae8 256} MBCE_SYSTEM_RESERVED;\r
257\r
258///\r
af2dc6a7 259/// BIOS Characteristics Extension Bytes.\r
98cb9ae8 260///\r
261typedef struct {\r
262 MBCE_BIOS_RESERVED BiosReserved;\r
263 MBCE_SYSTEM_RESERVED SystemReserved;\r
98cb9ae8 264} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
265\r
ff6a1f32
SZ		 266///\r
267/// Extended BIOS ROM size.\r
268///\r
269typedef struct {\r
270 UINT16 Size :14;\r
271 UINT16 Unit :2;\r
272} EXTENDED_BIOS_ROM_SIZE;\r
273\r
4135253b 274///\r
af2dc6a7 275/// BIOS Information (Type 0).\r
4135253b 276///\r
61ce5861 277typedef struct {\r
98cb9ae8 278 SMBIOS_STRUCTURE Hdr;\r
279 SMBIOS_TABLE_STRING Vendor;\r
280 SMBIOS_TABLE_STRING BiosVersion;\r
281 UINT16 BiosSegment;\r
282 SMBIOS_TABLE_STRING BiosReleaseDate;\r
283 UINT8 BiosSize;\r
284 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r
285 UINT8 BIOSCharacteristicsExtensionBytes[2];\r
286 UINT8 SystemBiosMajorRelease;\r
287 UINT8 SystemBiosMinorRelease;\r
288 UINT8 EmbeddedControllerFirmwareMajorRelease;\r
289 UINT8 EmbeddedControllerFirmwareMinorRelease;\r
ff6a1f32
SZ		 290 //\r
291 // Add for smbios 3.1.0\r
292 //\r
293 EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;\r
61ce5861 294} SMBIOS_TABLE_TYPE0;\r
295\r
98cb9ae8 296///\r
af2dc6a7 297/// System Wake-up Type.\r
98cb9ae8 298///\r
9095d37b 299typedef enum {\r
98cb9ae8 300 SystemWakeupTypeReserved = 0x00,\r
301 SystemWakeupTypeOther = 0x01,\r
302 SystemWakeupTypeUnknown = 0x02,\r
303 SystemWakeupTypeApmTimer = 0x03,\r
304 SystemWakeupTypeModemRing = 0x04,\r
305 SystemWakeupTypeLanRemote = 0x05,\r
306 SystemWakeupTypePowerSwitch = 0x06,\r
307 SystemWakeupTypePciPme = 0x07,\r
308 SystemWakeupTypeAcPowerRestored = 0x08\r
309} MISC_SYSTEM_WAKEUP_TYPE;\r
310\r
4135253b 311///\r
af2dc6a7 312/// System Information (Type 1).\r
9095d37b
LG		 313///\r
314/// The information in this structure defines attributes of the overall system and is\r
98cb9ae8 315/// intended to be associated with the Component ID group of the system's MIF.\r
9095d37b 316/// An SMBIOS implementation is associated with a single system instance and contains\r
98cb9ae8 317/// one and only one System Information (Type 1) structure.\r
4135253b 318///\r
61ce5861 319typedef struct {\r
98cb9ae8 320 SMBIOS_STRUCTURE Hdr;\r
321 SMBIOS_TABLE_STRING Manufacturer;\r
322 SMBIOS_TABLE_STRING ProductName;\r
323 SMBIOS_TABLE_STRING Version;\r
324 SMBIOS_TABLE_STRING SerialNumber;\r
325 GUID Uuid;\r
af2dc6a7 326 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r
98cb9ae8 327 SMBIOS_TABLE_STRING SKUNumber;\r
328 SMBIOS_TABLE_STRING Family;\r
61ce5861 329} SMBIOS_TABLE_TYPE1;\r
330\r
98cb9ae8 331///\r
9095d37b 332/// Base Board - Feature Flags.\r
98cb9ae8 333///\r
334typedef struct {\r
335 UINT8 Motherboard :1;\r
336 UINT8 RequiresDaughterCard :1;\r
337 UINT8 Removable :1;\r
338 UINT8 Replaceable :1;\r
339 UINT8 HotSwappable :1;\r
340 UINT8 Reserved :3;\r
341} BASE_BOARD_FEATURE_FLAGS;\r
342\r
343///\r
af2dc6a7 344/// Base Board - Board Type.\r
98cb9ae8 345///\r
9095d37b 346typedef enum {\r
98cb9ae8 347 BaseBoardTypeUnknown = 0x1,\r
348 BaseBoardTypeOther = 0x2,\r
349 BaseBoardTypeServerBlade = 0x3,\r
350 BaseBoardTypeConnectivitySwitch = 0x4,\r
351 BaseBoardTypeSystemManagementModule = 0x5,\r
352 BaseBoardTypeProcessorModule = 0x6,\r
353 BaseBoardTypeIOModule = 0x7,\r
354 BaseBoardTypeMemoryModule = 0x8,\r
355 BaseBoardTypeDaughterBoard = 0x9,\r
356 BaseBoardTypeMotherBoard = 0xA,\r
357 BaseBoardTypeProcessorMemoryModule = 0xB,\r
358 BaseBoardTypeProcessorIOModule = 0xC,\r
359 BaseBoardTypeInterconnectBoard = 0xD\r
360} BASE_BOARD_TYPE;\r
361\r
4135253b 362///\r
af2dc6a7 363/// Base Board (or Module) Information (Type 2).\r
4135253b 364///\r
9095d37b 365/// The information in this structure defines attributes of a system baseboard -\r
98cb9ae8 366/// for example a motherboard, planar, or server blade or other standard system module.\r
367///\r
61ce5861 368typedef struct {\r
98cb9ae8 369 SMBIOS_STRUCTURE Hdr;\r
370 SMBIOS_TABLE_STRING Manufacturer;\r
371 SMBIOS_TABLE_STRING ProductName;\r
372 SMBIOS_TABLE_STRING Version;\r
373 SMBIOS_TABLE_STRING SerialNumber;\r
374 SMBIOS_TABLE_STRING AssetTag;\r
375 BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r
376 SMBIOS_TABLE_STRING LocationInChassis;\r
377 UINT16 ChassisHandle;\r
af2dc6a7 378 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r
98cb9ae8 379 UINT8 NumberOfContainedObjectHandles;\r
380 UINT16 ContainedObjectHandles[1];\r
61ce5861 381} SMBIOS_TABLE_TYPE2;\r
382\r
98cb9ae8 383///\r
384/// System Enclosure or Chassis Types\r
385///\r
9095d37b 386typedef enum {\r
98cb9ae8 387 MiscChassisTypeOther = 0x01,\r
388 MiscChassisTypeUnknown = 0x02,\r
389 MiscChassisTypeDeskTop = 0x03,\r
390 MiscChassisTypeLowProfileDesktop = 0x04,\r
391 MiscChassisTypePizzaBox = 0x05,\r
392 MiscChassisTypeMiniTower = 0x06,\r
393 MiscChassisTypeTower = 0x07,\r
394 MiscChassisTypePortable = 0x08,\r
395 MiscChassisTypeLapTop = 0x09,\r
396 MiscChassisTypeNotebook = 0x0A,\r
397 MiscChassisTypeHandHeld = 0x0B,\r
398 MiscChassisTypeDockingStation = 0x0C,\r
399 MiscChassisTypeAllInOne = 0x0D,\r
400 MiscChassisTypeSubNotebook = 0x0E,\r
401 MiscChassisTypeSpaceSaving = 0x0F,\r
402 MiscChassisTypeLunchBox = 0x10,\r
403 MiscChassisTypeMainServerChassis = 0x11,\r
404 MiscChassisTypeExpansionChassis = 0x12,\r
405 MiscChassisTypeSubChassis = 0x13,\r
406 MiscChassisTypeBusExpansionChassis = 0x14,\r
407 MiscChassisTypePeripheralChassis = 0x15,\r
408 MiscChassisTypeRaidChassis = 0x16,\r
409 MiscChassisTypeRackMountChassis = 0x17,\r
410 MiscChassisTypeSealedCasePc = 0x18,\r
411 MiscChassisMultiSystemChassis = 0x19,\r
412 MiscChassisCompactPCI = 0x1A,\r
413 MiscChassisAdvancedTCA = 0x1B,\r
414 MiscChassisBlade = 0x1C,\r
6cd35c62
EL		 415 MiscChassisBladeEnclosure = 0x1D,\r
416 MiscChassisTablet = 0x1E,\r
417 MiscChassisConvertible = 0x1F,\r
ff6a1f32
SZ		 418 MiscChassisDetachable = 0x20,\r
419 MiscChassisIoTGateway = 0x21,\r
420 MiscChassisEmbeddedPc = 0x22,\r
421 MiscChassisMiniPc = 0x23,\r
422 MiscChassisStickPc = 0x24\r
98cb9ae8 423} MISC_CHASSIS_TYPE;\r
424\r
425///\r
af2dc6a7 426/// System Enclosure or Chassis States .\r
98cb9ae8 427///\r
9095d37b 428typedef enum {\r
98cb9ae8 429 ChassisStateOther = 0x01,\r
430 ChassisStateUnknown = 0x02,\r
431 ChassisStateSafe = 0x03,\r
432 ChassisStateWarning = 0x04,\r
433 ChassisStateCritical = 0x05,\r
434 ChassisStateNonRecoverable = 0x06\r
435} MISC_CHASSIS_STATE;\r
436\r
437///\r
af2dc6a7 438/// System Enclosure or Chassis Security Status.\r
98cb9ae8 439///\r
9095d37b 440typedef enum {\r
98cb9ae8 441 ChassisSecurityStatusOther = 0x01,\r
442 ChassisSecurityStatusUnknown = 0x02,\r
443 ChassisSecurityStatusNone = 0x03,\r
444 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
445 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
446} MISC_CHASSIS_SECURITY_STATE;\r
447\r
bf7ea009 448///\r
449/// Contained Element record\r
450///\r
61ce5861 451typedef struct {\r
452 UINT8 ContainedElementType;\r
453 UINT8 ContainedElementMinimum;\r
454 UINT8 ContainedElementMaximum;\r
455} CONTAINED_ELEMENT;\r
456\r
98cb9ae8 457\r
4135253b 458///\r
af2dc6a7 459/// System Enclosure or Chassis (Type 3).\r
4135253b 460///\r
9095d37b
LG		 461/// The information in this structure defines attributes of the system's mechanical enclosure(s).\r
462/// For example, if a system included a separate enclosure for its peripheral devices,\r
98cb9ae8 463/// two structures would be returned: one for the main, system enclosure and the second for\r
464/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
9095d37b 465/// support the population of the CIM_Chassis class.\r
98cb9ae8 466///\r
61ce5861 467typedef struct {\r
98cb9ae8 468 SMBIOS_STRUCTURE Hdr;\r
469 SMBIOS_TABLE_STRING Manufacturer;\r
470 UINT8 Type;\r
471 SMBIOS_TABLE_STRING Version;\r
472 SMBIOS_TABLE_STRING SerialNumber;\r
473 SMBIOS_TABLE_STRING AssetTag;\r
af2dc6a7 474 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
475 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
476 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
477 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r
98cb9ae8 478 UINT8 OemDefined[4];\r
479 UINT8 Height;\r
480 UINT8 NumberofPowerCords;\r
481 UINT8 ContainedElementCount;\r
482 UINT8 ContainedElementRecordLength;\r
f15908aa
CP		 483 //\r
484 // Can have 0 to (ContainedElementCount * ContainedElementRecordLength) contained elements\r
485 //\r
98cb9ae8 486 CONTAINED_ELEMENT ContainedElements[1];\r
f15908aa
CP		 487 //\r
488 // Add for smbios 2.7\r
489 //\r
490 // Since ContainedElements has a variable number of entries, must not define SKUNumber in\r
491 // the structure. Need to reference it by starting at offset 0x15 and adding\r
492 // (ContainedElementCount * ContainedElementRecordLength) bytes.\r
493 //\r
494 // SMBIOS_TABLE_STRING SKUNumber;\r
61ce5861 495} SMBIOS_TABLE_TYPE3;\r
496\r
98cb9ae8 497///\r
af2dc6a7 498/// Processor Information - Processor Type.\r
98cb9ae8 499///\r
500typedef enum {\r
501 ProcessorOther = 0x01,\r
502 ProcessorUnknown = 0x02,\r
503 CentralProcessor = 0x03,\r
504 MathProcessor = 0x04,\r
505 DspProcessor = 0x05,\r
506 VideoProcessor = 0x06\r
507} PROCESSOR_TYPE_DATA;\r
508\r
509///\r
af2dc6a7 510/// Processor Information - Processor Family.\r
98cb9ae8 511///\r
512typedef enum {\r
9095d37b 513 ProcessorFamilyOther = 0x01,\r
98cb9ae8 514 ProcessorFamilyUnknown = 0x02,\r
9095d37b 515 ProcessorFamily8086 = 0x03,\r
98cb9ae8 516 ProcessorFamily80286 = 0x04,\r
9095d37b 517 ProcessorFamilyIntel386 = 0x05,\r
98cb9ae8 518 ProcessorFamilyIntel486 = 0x06,\r
519 ProcessorFamily8087 = 0x07,\r
520 ProcessorFamily80287 = 0x08,\r
9095d37b 521 ProcessorFamily80387 = 0x09,\r
98cb9ae8 522 ProcessorFamily80487 = 0x0A,\r
9095d37b 523 ProcessorFamilyPentium = 0x0B,\r
98cb9ae8 524 ProcessorFamilyPentiumPro = 0x0C,\r
525 ProcessorFamilyPentiumII = 0x0D,\r
526 ProcessorFamilyPentiumMMX = 0x0E,\r
527 ProcessorFamilyCeleron = 0x0F,\r
528 ProcessorFamilyPentiumIIXeon = 0x10,\r
9095d37b 529 ProcessorFamilyPentiumIII = 0x11,\r
98cb9ae8 530 ProcessorFamilyM1 = 0x12,\r
531 ProcessorFamilyM2 = 0x13,\r
119c1688
SZ		 532 ProcessorFamilyIntelCeleronM = 0x14,\r
533 ProcessorFamilyIntelPentium4Ht = 0x15,\r
98cb9ae8 534 ProcessorFamilyAmdDuron = 0x18,\r
9095d37b 535 ProcessorFamilyK5 = 0x19,\r
98cb9ae8 536 ProcessorFamilyK6 = 0x1A,\r
537 ProcessorFamilyK6_2 = 0x1B,\r
538 ProcessorFamilyK6_3 = 0x1C,\r
539 ProcessorFamilyAmdAthlon = 0x1D,\r
540 ProcessorFamilyAmd29000 = 0x1E,\r
541 ProcessorFamilyK6_2Plus = 0x1F,\r
542 ProcessorFamilyPowerPC = 0x20,\r
543 ProcessorFamilyPowerPC601 = 0x21,\r
544 ProcessorFamilyPowerPC603 = 0x22,\r
545 ProcessorFamilyPowerPC603Plus = 0x23,\r
546 ProcessorFamilyPowerPC604 = 0x24,\r
547 ProcessorFamilyPowerPC620 = 0x25,\r
548 ProcessorFamilyPowerPCx704 = 0x26,\r
549 ProcessorFamilyPowerPC750 = 0x27,\r
3507ab19 550 ProcessorFamilyIntelCoreDuo = 0x28,\r
551 ProcessorFamilyIntelCoreDuoMobile = 0x29,\r
552 ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r
553 ProcessorFamilyIntelAtom = 0x2B,\r
6cd35c62 554 ProcessorFamilyIntelCoreM = 0x2C,\r
ff6a1f32
SZ		 555 ProcessorFamilyIntelCorem3 = 0x2D,\r
556 ProcessorFamilyIntelCorem5 = 0x2E,\r
557 ProcessorFamilyIntelCorem7 = 0x2F,\r
4a228334 558 ProcessorFamilyAlpha = 0x30,\r
98cb9ae8 559 ProcessorFamilyAlpha21064 = 0x31,\r
560 ProcessorFamilyAlpha21066 = 0x32,\r
561 ProcessorFamilyAlpha21164 = 0x33,\r
562 ProcessorFamilyAlpha21164PC = 0x34,\r
563 ProcessorFamilyAlpha21164a = 0x35,\r
564 ProcessorFamilyAlpha21264 = 0x36,\r
565 ProcessorFamilyAlpha21364 = 0x37,\r
7ddba202
SZ		 566 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r
567 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r
568 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r
569 ProcessorFamilyAmdOpteron6100Series = 0x3B,\r
570 ProcessorFamilyAmdOpteron4100Series = 0x3C,\r
571 ProcessorFamilyAmdOpteron6200Series = 0x3D,\r
572 ProcessorFamilyAmdOpteron4200Series = 0x3E,\r
4a228334 573 ProcessorFamilyAmdFxSeries = 0x3F,\r
98cb9ae8 574 ProcessorFamilyMips = 0x40,\r
575 ProcessorFamilyMIPSR4000 = 0x41,\r
576 ProcessorFamilyMIPSR4200 = 0x42,\r
577 ProcessorFamilyMIPSR4400 = 0x43,\r
578 ProcessorFamilyMIPSR4600 = 0x44,\r
579 ProcessorFamilyMIPSR10000 = 0x45,\r
7ddba202
SZ		 580 ProcessorFamilyAmdCSeries = 0x46,\r
581 ProcessorFamilyAmdESeries = 0x47,\r
4a228334 582 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r
7ddba202 583 ProcessorFamilyAmdGSeries = 0x49,\r
4a228334
EL		 584 ProcessorFamilyAmdZSeries = 0x4A,\r
585 ProcessorFamilyAmdRSeries = 0x4B,\r
586 ProcessorFamilyAmdOpteron4300 = 0x4C,\r
587 ProcessorFamilyAmdOpteron6300 = 0x4D,\r
588 ProcessorFamilyAmdOpteron3300 = 0x4E,\r
589 ProcessorFamilyAmdFireProSeries = 0x4F,\r
98cb9ae8 590 ProcessorFamilySparc = 0x50,\r
591 ProcessorFamilySuperSparc = 0x51,\r
592 ProcessorFamilymicroSparcII = 0x52,\r
593 ProcessorFamilymicroSparcIIep = 0x53,\r
594 ProcessorFamilyUltraSparc = 0x54,\r
595 ProcessorFamilyUltraSparcII = 0x55,\r
4a228334 596 ProcessorFamilyUltraSparcIii = 0x56,\r
98cb9ae8 597 ProcessorFamilyUltraSparcIII = 0x57,\r
598 ProcessorFamilyUltraSparcIIIi = 0x58,\r
599 ProcessorFamily68040 = 0x60,\r
600 ProcessorFamily68xxx = 0x61,\r
601 ProcessorFamily68000 = 0x62,\r
602 ProcessorFamily68010 = 0x63,\r
603 ProcessorFamily68020 = 0x64,\r
604 ProcessorFamily68030 = 0x65,\r
6cd35c62
EL		 605 ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r
606 ProcessorFamilyAmdOpteronX1000Series = 0x67,\r
607 ProcessorFamilyAmdOpteronX2000Series = 0x68,\r
ff6a1f32
SZ		 608 ProcessorFamilyAmdOpteronASeries = 0x69,\r
609 ProcessorFamilyAmdOpteronX3000Series = 0x6A,\r
043026ac 610 ProcessorFamilyAmdZen = 0x6B,\r
98cb9ae8 611 ProcessorFamilyHobbit = 0x70,\r
612 ProcessorFamilyCrusoeTM5000 = 0x78,\r
613 ProcessorFamilyCrusoeTM3000 = 0x79,\r
614 ProcessorFamilyEfficeonTM8000 = 0x7A,\r
615 ProcessorFamilyWeitek = 0x80,\r
616 ProcessorFamilyItanium = 0x82,\r
617 ProcessorFamilyAmdAthlon64 = 0x83,\r
618 ProcessorFamilyAmdOpteron = 0x84,\r
619 ProcessorFamilyAmdSempron = 0x85,\r
620 ProcessorFamilyAmdTurion64Mobile = 0x86,\r
621 ProcessorFamilyDualCoreAmdOpteron = 0x87,\r
622 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
623 ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
3507ab19 624 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r
625 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r
626 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r
627 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r
628 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r
9095d37b 629 ProcessorFamilyAmdAthlonX2DualCore = 0x8F,\r
98cb9ae8 630 ProcessorFamilyPARISC = 0x90,\r
631 ProcessorFamilyPaRisc8500 = 0x91,\r
632 ProcessorFamilyPaRisc8000 = 0x92,\r
633 ProcessorFamilyPaRisc7300LC = 0x93,\r
634 ProcessorFamilyPaRisc7200 = 0x94,\r
635 ProcessorFamilyPaRisc7100LC = 0x95,\r
636 ProcessorFamilyPaRisc7100 = 0x96,\r
637 ProcessorFamilyV30 = 0xA0,\r
3507ab19 638 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r
639 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r
640 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r
641 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r
642 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r
643 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r
644 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r
645 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r
646 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r
647 ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r
648 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r
649 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r
650 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r
651 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r
652 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r
98cb9ae8 653 ProcessorFamilyPentiumIIIXeon = 0xB0,\r
654 ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
655 ProcessorFamilyPentium4 = 0xB2,\r
656 ProcessorFamilyIntelXeon = 0xB3,\r
657 ProcessorFamilyAS400 = 0xB4,\r
658 ProcessorFamilyIntelXeonMP = 0xB5,\r
659 ProcessorFamilyAMDAthlonXP = 0xB6,\r
660 ProcessorFamilyAMDAthlonMP = 0xB7,\r
661 ProcessorFamilyIntelItanium2 = 0xB8,\r
662 ProcessorFamilyIntelPentiumM = 0xB9,\r
663 ProcessorFamilyIntelCeleronD = 0xBA,\r
664 ProcessorFamilyIntelPentiumD = 0xBB,\r
665 ProcessorFamilyIntelPentiumEx = 0xBC,\r
4a228334 666 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r
98cb9ae8 667 ProcessorFamilyReserved = 0xBE,\r
668 ProcessorFamilyIntelCore2 = 0xBF,\r
3507ab19 669 ProcessorFamilyIntelCore2Solo = 0xC0,\r
670 ProcessorFamilyIntelCore2Extreme = 0xC1,\r
671 ProcessorFamilyIntelCore2Quad = 0xC2,\r
672 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r
673 ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r
674 ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r
675 ProcessorFamilyIntelCoreI7 = 0xC6,\r
9095d37b 676 ProcessorFamilyDualCoreIntelCeleron = 0xC7,\r
98cb9ae8 677 ProcessorFamilyIBM390 = 0xC8,\r
678 ProcessorFamilyG4 = 0xC9,\r
679 ProcessorFamilyG5 = 0xCA,\r
680 ProcessorFamilyG6 = 0xCB,\r
4a228334 681 ProcessorFamilyzArchitecture = 0xCC,\r
7ddba202
SZ		 682 ProcessorFamilyIntelCoreI5 = 0xCD,\r
683 ProcessorFamilyIntelCoreI3 = 0xCE,\r
cfcca3c2 684 ProcessorFamilyIntelCoreI9 = 0xCF,\r
98cb9ae8 685 ProcessorFamilyViaC7M = 0xD2,\r
686 ProcessorFamilyViaC7D = 0xD3,\r
687 ProcessorFamilyViaC7 = 0xD4,\r
688 ProcessorFamilyViaEden = 0xD5,\r
3507ab19 689 ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r
690 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r
691 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r
7ddba202 692 ProcessorFamilyViaNano = 0xD9,\r
3507ab19 693 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r
694 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r
695 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r
696 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r
697 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r
7ddba202 698 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r
4a228334
EL		 699 ProcessorFamilyAmdOpteron3000Series = 0xE4,\r
700 ProcessorFamilyAmdSempronII = 0xE5,\r
3507ab19 701 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r
702 ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r
703 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r
704 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r
705 ProcessorFamilyAmdAthlonDualCore = 0xEA,\r
706 ProcessorFamilyAmdSempronSI = 0xEB,\r
7ddba202
SZ		 707 ProcessorFamilyAmdPhenomII = 0xEC,\r
708 ProcessorFamilyAmdAthlonII = 0xED,\r
709 ProcessorFamilySixCoreAmdOpteron = 0xEE,\r
710 ProcessorFamilyAmdSempronM = 0xEF,\r
98cb9ae8 711 ProcessorFamilyi860 = 0xFA,\r
712 ProcessorFamilyi960 = 0xFB,\r
713 ProcessorFamilyIndicatorFamily2 = 0xFE,\r
714 ProcessorFamilyReserved1 = 0xFF\r
715} PROCESSOR_FAMILY_DATA;\r
716\r
f9ed6c93
YL		 717///\r
718/// Processor Information2 - Processor Family2.\r
719///\r
720typedef enum {\r
ff6a1f32
SZ		 721 ProcessorFamilyARMv7 = 0x0100,\r
722 ProcessorFamilyARMv8 = 0x0101,\r
f9ed6c93
YL		 723 ProcessorFamilySH3 = 0x0104,\r
724 ProcessorFamilySH4 = 0x0105,\r
725 ProcessorFamilyARM = 0x0118,\r
726 ProcessorFamilyStrongARM = 0x0119,\r
727 ProcessorFamily6x86 = 0x012C,\r
728 ProcessorFamilyMediaGX = 0x012D,\r
729 ProcessorFamilyMII = 0x012E,\r
730 ProcessorFamilyWinChip = 0x0140,\r
731 ProcessorFamilyDSP = 0x015E,\r
f06c92a6
AC		 732 ProcessorFamilyVideoProcessor = 0x01F4,\r
733 ProcessorFamilyRiscvRV32 = 0x0200,\r
734 ProcessorFamilyRiscVRV64 = 0x0201,\r
735 ProcessorFamilyRiscVRV128 = 0x0202\r
f9ed6c93
YL		 736} PROCESSOR_FAMILY2_DATA;\r
737\r
98cb9ae8 738///\r
9095d37b 739/// Processor Information - Voltage.\r
98cb9ae8 740///\r
741typedef struct {\r
9095d37b
LG		 742 UINT8 ProcessorVoltageCapability5V :1;\r
743 UINT8 ProcessorVoltageCapability3_3V :1;\r
744 UINT8 ProcessorVoltageCapability2_9V :1;\r
6800ac83 745 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
746 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
747 UINT8 ProcessorVoltageIndicateLegacy :1;\r
98cb9ae8 748} PROCESSOR_VOLTAGE;\r
749\r
750///\r
af2dc6a7 751/// Processor Information - Processor Upgrade.\r
98cb9ae8 752///\r
753typedef enum {\r
754 ProcessorUpgradeOther = 0x01,\r
755 ProcessorUpgradeUnknown = 0x02,\r
756 ProcessorUpgradeDaughterBoard = 0x03,\r
757 ProcessorUpgradeZIFSocket = 0x04,\r
af2dc6a7 758 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r
98cb9ae8 759 ProcessorUpgradeNone = 0x06,\r
760 ProcessorUpgradeLIFSocket = 0x07,\r
761 ProcessorUpgradeSlot1 = 0x08,\r
762 ProcessorUpgradeSlot2 = 0x09,\r
763 ProcessorUpgrade370PinSocket = 0x0A,\r
764 ProcessorUpgradeSlotA = 0x0B,\r
765 ProcessorUpgradeSlotM = 0x0C,\r
766 ProcessorUpgradeSocket423 = 0x0D,\r
af2dc6a7 767 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r
98cb9ae8 768 ProcessorUpgradeSocket478 = 0x0F,\r
769 ProcessorUpgradeSocket754 = 0x10,\r
770 ProcessorUpgradeSocket940 = 0x11,\r
771 ProcessorUpgradeSocket939 = 0x12,\r
772 ProcessorUpgradeSocketmPGA604 = 0x13,\r
773 ProcessorUpgradeSocketLGA771 = 0x14,\r
774 ProcessorUpgradeSocketLGA775 = 0x15,\r
775 ProcessorUpgradeSocketS1 = 0x16,\r
776 ProcessorUpgradeAM2 = 0x17,\r
3507ab19 777 ProcessorUpgradeF1207 = 0x18,\r
7ddba202
SZ		 778 ProcessorSocketLGA1366 = 0x19,\r
779 ProcessorUpgradeSocketG34 = 0x1A,\r
780 ProcessorUpgradeSocketAM3 = 0x1B,\r
781 ProcessorUpgradeSocketC32 = 0x1C,\r
782 ProcessorUpgradeSocketLGA1156 = 0x1D,\r
783 ProcessorUpgradeSocketLGA1567 = 0x1E,\r
784 ProcessorUpgradeSocketPGA988A = 0x1F,\r
785 ProcessorUpgradeSocketBGA1288 = 0x20,\r
786 ProcessorUpgradeSocketrPGA988B = 0x21,\r
787 ProcessorUpgradeSocketBGA1023 = 0x22,\r
788 ProcessorUpgradeSocketBGA1224 = 0x23,\r
4a228334 789 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r
7ddba202
SZ		 790 ProcessorUpgradeSocketLGA1356 = 0x25,\r
791 ProcessorUpgradeSocketLGA2011 = 0x26,\r
792 ProcessorUpgradeSocketFS1 = 0x27,\r
793 ProcessorUpgradeSocketFS2 = 0x28,\r
794 ProcessorUpgradeSocketFM1 = 0x29,\r
4a228334
EL		 795 ProcessorUpgradeSocketFM2 = 0x2A,\r
796 ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r
6cd35c62
EL		 797 ProcessorUpgradeSocketLGA1356_3 = 0x2C,\r
798 ProcessorUpgradeSocketLGA1150 = 0x2D,\r
799 ProcessorUpgradeSocketBGA1168 = 0x2E,\r
800 ProcessorUpgradeSocketBGA1234 = 0x2F,\r
ff6a1f32
SZ		 801 ProcessorUpgradeSocketBGA1364 = 0x30,\r
802 ProcessorUpgradeSocketAM4 = 0x31,\r
803 ProcessorUpgradeSocketLGA1151 = 0x32,\r
804 ProcessorUpgradeSocketBGA1356 = 0x33,\r
805 ProcessorUpgradeSocketBGA1440 = 0x34,\r
806 ProcessorUpgradeSocketBGA1515 = 0x35,\r
807 ProcessorUpgradeSocketLGA3647_1 = 0x36,\r
043026ac 808 ProcessorUpgradeSocketSP3 = 0x37,\r
cfcca3c2
SZ		 809 ProcessorUpgradeSocketSP3r2 = 0x38,\r
810 ProcessorUpgradeSocketLGA2066 = 0x39,\r
811 ProcessorUpgradeSocketBGA1392 = 0x3A,\r
812 ProcessorUpgradeSocketBGA1510 = 0x3B,\r
813 ProcessorUpgradeSocketBGA1528 = 0x3C\r
98cb9ae8 814} PROCESSOR_UPGRADE;\r
815\r
816///\r
817/// Processor ID Field Description\r
818///\r
819typedef struct {\r
820 UINT32 ProcessorSteppingId:4;\r
821 UINT32 ProcessorModel: 4;\r
822 UINT32 ProcessorFamily: 4;\r
823 UINT32 ProcessorType: 2;\r
824 UINT32 ProcessorReserved1: 2;\r
825 UINT32 ProcessorXModel: 4;\r
826 UINT32 ProcessorXFamily: 8;\r
827 UINT32 ProcessorReserved2: 4;\r
828} PROCESSOR_SIGNATURE;\r
829\r
98cb9ae8 830typedef struct {\r
831 UINT32 ProcessorFpu :1;\r
832 UINT32 ProcessorVme :1;\r
833 UINT32 ProcessorDe :1;\r
834 UINT32 ProcessorPse :1;\r
835 UINT32 ProcessorTsc :1;\r
836 UINT32 ProcessorMsr :1;\r
837 UINT32 ProcessorPae :1;\r
838 UINT32 ProcessorMce :1;\r
839 UINT32 ProcessorCx8 :1;\r
840 UINT32 ProcessorApic :1;\r
841 UINT32 ProcessorReserved1 :1;\r
842 UINT32 ProcessorSep :1;\r
843 UINT32 ProcessorMtrr :1;\r
844 UINT32 ProcessorPge :1;\r
845 UINT32 ProcessorMca :1;\r
846 UINT32 ProcessorCmov :1;\r
847 UINT32 ProcessorPat :1;\r
848 UINT32 ProcessorPse36 :1;\r
849 UINT32 ProcessorPsn :1;\r
850 UINT32 ProcessorClfsh :1;\r
851 UINT32 ProcessorReserved2 :1;\r
852 UINT32 ProcessorDs :1;\r
853 UINT32 ProcessorAcpi :1;\r
854 UINT32 ProcessorMmx :1;\r
855 UINT32 ProcessorFxsr :1;\r
856 UINT32 ProcessorSse :1;\r
857 UINT32 ProcessorSse2 :1;\r
858 UINT32 ProcessorSs :1;\r
859 UINT32 ProcessorReserved3 :1;\r
860 UINT32 ProcessorTm :1;\r
861 UINT32 ProcessorReserved4 :2;\r
862} PROCESSOR_FEATURE_FLAGS;\r
863\r
f06c92a6
AC		 864typedef struct {\r
865 UINT32 ProcessorReserved1 :1;\r
866 UINT32 ProcessorUnknown :1;\r
867 UINT32 Processor64BitCapble :1;\r
868 UINT32 ProcessorMultiCore :1;\r
869 UINT32 ProcessorHardwareThread :1;\r
870 UINT32 ProcessorExecuteProtection :1;\r
871 UINT32 ProcessorEnhancedVirtulization :1;\r
872 UINT32 ProcessorPowerPerformanceCtrl :1;\r
873 UINT32 Processor128bitCapble :1;\r
874 UINT32 ProcessorReserved2 :7;\r
875} PROCESSOR_CHARACTERISTIC_FLAGS;\r
876\r
98cb9ae8 877typedef struct {\r
878 PROCESSOR_SIGNATURE Signature;\r
98cb9ae8 879 PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
6800ac83 880} PROCESSOR_ID_DATA;\r
98cb9ae8 881\r
4135253b 882///\r
af2dc6a7 883/// Processor Information (Type 4).\r
4135253b 884///\r
9095d37b
LG		 885/// The information in this structure defines the attributes of a single processor;\r
886/// a separate structure instance is provided for each system processor socket/slot.\r
887/// For example, a system with an IntelDX2 processor would have a single\r
af2dc6a7 888/// structure instance, while a system with an IntelSX2 processor would have a structure\r
9095d37b 889/// to describe the main CPU, and a second structure to describe the 80487 co-processor.\r
98cb9ae8 890///\r
9095d37b 891typedef struct {\r
61ce5861 892 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 893 SMBIOS_TABLE_STRING Socket;\r
af2dc6a7 894 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r
895 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r
61ce5861 896 SMBIOS_TABLE_STRING ProcessorManufacture;\r
98cb9ae8 897 PROCESSOR_ID_DATA ProcessorId;\r
61ce5861 898 SMBIOS_TABLE_STRING ProcessorVersion;\r
98cb9ae8 899 PROCESSOR_VOLTAGE Voltage;\r
61ce5861 900 UINT16 ExternalClock;\r
901 UINT16 MaxSpeed;\r
902 UINT16 CurrentSpeed;\r
903 UINT8 Status;\r
af2dc6a7 904 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r
61ce5861 905 UINT16 L1CacheHandle;\r
906 UINT16 L2CacheHandle;\r
907 UINT16 L3CacheHandle;\r
908 SMBIOS_TABLE_STRING SerialNumber;\r
909 SMBIOS_TABLE_STRING AssetTag;\r
910 SMBIOS_TABLE_STRING PartNumber;\r
911 //\r
912 // Add for smbios 2.5\r
913 //\r
914 UINT8 CoreCount;\r
915 UINT8 EnabledCoreCount;\r
916 UINT8 ThreadCount;\r
917 UINT16 ProcessorCharacteristics;\r
918 //\r
919 // Add for smbios 2.6\r
920 //\r
921 UINT16 ProcessorFamily2;\r
6cd35c62
EL		 922 //\r
923 // Add for smbios 3.0\r
924 //\r
925 UINT16 CoreCount2;\r
926 UINT16 EnabledCoreCount2;\r
927 UINT16 ThreadCount2;\r
61ce5861 928} SMBIOS_TABLE_TYPE4;\r
929\r
98cb9ae8 930///\r
af2dc6a7 931/// Memory Controller Error Detecting Method.\r
98cb9ae8 932///\r
9095d37b 933typedef enum {\r
98cb9ae8 934 ErrorDetectingMethodOther = 0x01,\r
935 ErrorDetectingMethodUnknown = 0x02,\r
936 ErrorDetectingMethodNone = 0x03,\r
937 ErrorDetectingMethodParity = 0x04,\r
938 ErrorDetectingMethod32Ecc = 0x05,\r
939 ErrorDetectingMethod64Ecc = 0x06,\r
940 ErrorDetectingMethod128Ecc = 0x07,\r
941 ErrorDetectingMethodCrc = 0x08\r
942} MEMORY_ERROR_DETECT_METHOD;\r
943\r
944///\r
af2dc6a7 945/// Memory Controller Error Correcting Capability.\r
98cb9ae8 946///\r
947typedef struct {\r
948 UINT8 Other :1;\r
949 UINT8 Unknown :1;\r
950 UINT8 None :1;\r
951 UINT8 SingleBitErrorCorrect :1;\r
952 UINT8 DoubleBitErrorCorrect :1;\r
953 UINT8 ErrorScrubbing :1;\r
954 UINT8 Reserved :2;\r
955} MEMORY_ERROR_CORRECT_CAPABILITY;\r
956\r
957///\r
af2dc6a7 958/// Memory Controller Information - Interleave Support.\r
98cb9ae8 959///\r
9095d37b 960typedef enum {\r
98cb9ae8 961 MemoryInterleaveOther = 0x01,\r
962 MemoryInterleaveUnknown = 0x02,\r
963 MemoryInterleaveOneWay = 0x03,\r
964 MemoryInterleaveTwoWay = 0x04,\r
965 MemoryInterleaveFourWay = 0x05,\r
966 MemoryInterleaveEightWay = 0x06,\r
967 MemoryInterleaveSixteenWay = 0x07\r
968} MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
969\r
970///\r
af2dc6a7 971/// Memory Controller Information - Memory Speeds.\r
98cb9ae8 972///\r
973typedef struct {\r
974 UINT16 Other :1;\r
975 UINT16 Unknown :1;\r
976 UINT16 SeventyNs:1;\r
977 UINT16 SixtyNs :1;\r
978 UINT16 FiftyNs :1;\r
979 UINT16 Reserved :11;\r
980} MEMORY_SPEED_TYPE;\r
981\r
4135253b 982///\r
af2dc6a7 983/// Memory Controller Information (Type 5, Obsolete).\r
4135253b 984///\r
9095d37b
LG		 985/// The information in this structure defines the attributes of the system's memory controller(s)\r
986/// and the supported attributes of any memory-modules present in the sockets controlled by\r
987/// this controller.\r
988/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),\r
af2dc6a7 989/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 990/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
991/// choose to implement both memory description types to allow existing DMI browsers\r
992/// to properly display the system's memory attributes.\r
993///\r
61ce5861 994typedef struct {\r
98cb9ae8 995 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 996 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r
98cb9ae8 997 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
af2dc6a7 998 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r
9095d37b 999 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .\r
98cb9ae8 1000 UINT8 MaxMemoryModuleSize;\r
1001 MEMORY_SPEED_TYPE SupportSpeed;\r
1002 UINT16 SupportMemoryType;\r
1003 UINT8 MemoryModuleVoltage;\r
1004 UINT8 AssociatedMemorySlotNum;\r
1005 UINT16 MemoryModuleConfigHandles[1];\r
61ce5861 1006} SMBIOS_TABLE_TYPE5;\r
1007\r
98cb9ae8 1008///\r
1009/// Memory Module Information - Memory Types\r
1010///\r
1011typedef struct {\r
1012 UINT16 Other :1;\r
1013 UINT16 Unknown :1;\r
1014 UINT16 Standard :1;\r
1015 UINT16 FastPageMode:1;\r
b4ab47ec 1016 UINT16 Edo :1;\r
98cb9ae8 1017 UINT16 Parity :1;\r
b4ab47ec 1018 UINT16 Ecc :1;\r
1019 UINT16 Simm :1;\r
1020 UINT16 Dimm :1;\r
98cb9ae8 1021 UINT16 BurstEdo :1;\r
b4ab47ec 1022 UINT16 Sdram :1;\r
98cb9ae8 1023 UINT16 Reserved :5;\r
1024} MEMORY_CURRENT_TYPE;\r
1025\r
1026///\r
af2dc6a7 1027/// Memory Module Information - Memory Size.\r
98cb9ae8 1028///\r
1029typedef struct {\r
6800ac83 1030 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r
98cb9ae8 1031 UINT8 SingleOrDoubleBank :1;\r
1032} MEMORY_INSTALLED_ENABLED_SIZE;\r
1033\r
4135253b 1034///\r
1035/// Memory Module Information (Type 6, Obsolete)\r
1036///\r
9095d37b 1037/// One Memory Module Information structure is included for each memory-module socket\r
98cb9ae8 1038/// in the system. The structure describes the speed, type, size, and error status\r
9095d37b
LG		 1039/// of each system memory module. The supported attributes of each module are described\r
1040/// by the "owning" Memory Controller Information structure.\r
1041/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),\r
af2dc6a7 1042/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 1043/// and Memory Device (Type 17) structures should be used instead.\r
1044///\r
61ce5861 1045typedef struct {\r
98cb9ae8 1046 SMBIOS_STRUCTURE Hdr;\r
1047 SMBIOS_TABLE_STRING SocketDesignation;\r
1048 UINT8 BankConnections;\r
1049 UINT8 CurrentSpeed;\r
1050 MEMORY_CURRENT_TYPE CurrentMemoryType;\r
1051 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r
1052 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r
1053 UINT8 ErrorStatus;\r
61ce5861 1054} SMBIOS_TABLE_TYPE6;\r
1055\r
98cb9ae8 1056///\r
af2dc6a7 1057/// Cache Information - SRAM Type.\r
98cb9ae8 1058///\r
1059typedef struct {\r
1060 UINT16 Other :1;\r
1061 UINT16 Unknown :1;\r
1062 UINT16 NonBurst :1;\r
1063 UINT16 Burst :1;\r
1064 UINT16 PipelineBurst :1;\r
98cb9ae8 1065 UINT16 Synchronous :1;\r
53d90f04 1066 UINT16 Asynchronous :1;\r
98cb9ae8 1067 UINT16 Reserved :9;\r
1068} CACHE_SRAM_TYPE_DATA;\r
1069\r
1070///\r
af2dc6a7 1071/// Cache Information - Error Correction Type.\r
98cb9ae8 1072///\r
1073typedef enum {\r
1074 CacheErrorOther = 0x01,\r
1075 CacheErrorUnknown = 0x02,\r
1076 CacheErrorNone = 0x03,\r
1077 CacheErrorParity = 0x04,\r
6800ac83 1078 CacheErrorSingleBit = 0x05, ///< ECC\r
1079 CacheErrorMultiBit = 0x06 ///< ECC\r
98cb9ae8 1080} CACHE_ERROR_TYPE_DATA;\r
1081\r
1082///\r
9095d37b 1083/// Cache Information - System Cache Type.\r
98cb9ae8 1084///\r
1085typedef enum {\r
1086 CacheTypeOther = 0x01,\r
1087 CacheTypeUnknown = 0x02,\r
1088 CacheTypeInstruction = 0x03,\r
1089 CacheTypeData = 0x04,\r
1090 CacheTypeUnified = 0x05\r
1091} CACHE_TYPE_DATA;\r
1092\r
1093///\r
9095d37b 1094/// Cache Information - Associativity.\r
98cb9ae8 1095///\r
1096typedef enum {\r
1097 CacheAssociativityOther = 0x01,\r
1098 CacheAssociativityUnknown = 0x02,\r
1099 CacheAssociativityDirectMapped = 0x03,\r
1100 CacheAssociativity2Way = 0x04,\r
1101 CacheAssociativity4Way = 0x05,\r
1102 CacheAssociativityFully = 0x06,\r
1103 CacheAssociativity8Way = 0x07,\r
1104 CacheAssociativity16Way = 0x08,\r
3507ab19 1105 CacheAssociativity12Way = 0x09,\r
1106 CacheAssociativity24Way = 0x0A,\r
1107 CacheAssociativity32Way = 0x0B,\r
1108 CacheAssociativity48Way = 0x0C,\r
7ddba202
SZ		 1109 CacheAssociativity64Way = 0x0D,\r
1110 CacheAssociativity20Way = 0x0E\r
98cb9ae8 1111} CACHE_ASSOCIATIVITY_DATA;\r
1112\r
4135253b 1113///\r
af2dc6a7 1114/// Cache Information (Type 7).\r
4135253b 1115///\r
9095d37b 1116/// The information in this structure defines the attributes of CPU cache device in the system.\r
98cb9ae8 1117/// One structure is specified for each such device, whether the device is internal to\r
1118/// or external to the CPU module. Cache modules can be associated with a processor structure\r
af2dc6a7 1119/// in one or two ways, depending on the SMBIOS version.\r
98cb9ae8 1120///\r
61ce5861 1121typedef struct {\r
98cb9ae8 1122 SMBIOS_STRUCTURE Hdr;\r
1123 SMBIOS_TABLE_STRING SocketDesignation;\r
1124 UINT16 CacheConfiguration;\r
1125 UINT16 MaximumCacheSize;\r
1126 UINT16 InstalledSize;\r
1127 CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r
1128 CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r
1129 UINT8 CacheSpeed;\r
af2dc6a7 1130 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r
1131 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r
1132 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r
ff6a1f32
SZ		 1133 //\r
1134 // Add for smbios 3.1.0\r
1135 //\r
1136 UINT32 MaximumCacheSize2;\r
1137 UINT32 InstalledSize2;\r
61ce5861 1138} SMBIOS_TABLE_TYPE7;\r
1139\r
98cb9ae8 1140///\r
9095d37b 1141/// Port Connector Information - Connector Types.\r
98cb9ae8 1142///\r
1143typedef enum {\r
1144 PortConnectorTypeNone = 0x00,\r
1145 PortConnectorTypeCentronics = 0x01,\r
1146 PortConnectorTypeMiniCentronics = 0x02,\r
1147 PortConnectorTypeProprietary = 0x03,\r
1148 PortConnectorTypeDB25Male = 0x04,\r
1149 PortConnectorTypeDB25Female = 0x05,\r
1150 PortConnectorTypeDB15Male = 0x06,\r
1151 PortConnectorTypeDB15Female = 0x07,\r
1152 PortConnectorTypeDB9Male = 0x08,\r
1153 PortConnectorTypeDB9Female = 0x09,\r
1154 PortConnectorTypeRJ11 = 0x0A,\r
1155 PortConnectorTypeRJ45 = 0x0B,\r
1156 PortConnectorType50PinMiniScsi = 0x0C,\r
1157 PortConnectorTypeMiniDin = 0x0D,\r
119c1688 1158 PortConnectorTypeMicroDin = 0x0E,\r
98cb9ae8 1159 PortConnectorTypePS2 = 0x0F,\r
1160 PortConnectorTypeInfrared = 0x10,\r
1161 PortConnectorTypeHpHil = 0x11,\r
1162 PortConnectorTypeUsb = 0x12,\r
1163 PortConnectorTypeSsaScsi = 0x13,\r
1164 PortConnectorTypeCircularDin8Male = 0x14,\r
1165 PortConnectorTypeCircularDin8Female = 0x15,\r
1166 PortConnectorTypeOnboardIde = 0x16,\r
1167 PortConnectorTypeOnboardFloppy = 0x17,\r
1168 PortConnectorType9PinDualInline = 0x18,\r
1169 PortConnectorType25PinDualInline = 0x19,\r
1170 PortConnectorType50PinDualInline = 0x1A,\r
1171 PortConnectorType68PinDualInline = 0x1B,\r
1172 PortConnectorTypeOnboardSoundInput = 0x1C,\r
1173 PortConnectorTypeMiniCentronicsType14 = 0x1D,\r
1174 PortConnectorTypeMiniCentronicsType26 = 0x1E,\r
1175 PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
1176 PortConnectorTypeBNC = 0x20,\r
1177 PortConnectorType1394 = 0x21,\r
119c1688 1178 PortConnectorTypeSasSata = 0x22,\r
cfcca3c2 1179 PortConnectorTypeUsbTypeC = 0x23,\r
98cb9ae8 1180 PortConnectorTypePC98 = 0xA0,\r
1181 PortConnectorTypePC98Hireso = 0xA1,\r
1182 PortConnectorTypePCH98 = 0xA2,\r
1183 PortConnectorTypePC98Note = 0xA3,\r
1184 PortConnectorTypePC98Full = 0xA4,\r
1185 PortConnectorTypeOther = 0xFF\r
1186} MISC_PORT_CONNECTOR_TYPE;\r
1187\r
1188///\r
9095d37b 1189/// Port Connector Information - Port Types\r
98cb9ae8 1190///\r
1191typedef enum {\r
1192 PortTypeNone = 0x00,\r
1193 PortTypeParallelXtAtCompatible = 0x01,\r
1194 PortTypeParallelPortPs2 = 0x02,\r
1195 PortTypeParallelPortEcp = 0x03,\r
1196 PortTypeParallelPortEpp = 0x04,\r
1197 PortTypeParallelPortEcpEpp = 0x05,\r
1198 PortTypeSerialXtAtCompatible = 0x06,\r
1199 PortTypeSerial16450Compatible = 0x07,\r
1200 PortTypeSerial16550Compatible = 0x08,\r
1201 PortTypeSerial16550ACompatible = 0x09,\r
1202 PortTypeScsi = 0x0A,\r
1203 PortTypeMidi = 0x0B,\r
1204 PortTypeJoyStick = 0x0C,\r
1205 PortTypeKeyboard = 0x0D,\r
1206 PortTypeMouse = 0x0E,\r
1207 PortTypeSsaScsi = 0x0F,\r
1208 PortTypeUsb = 0x10,\r
1209 PortTypeFireWire = 0x11,\r
1210 PortTypePcmciaTypeI = 0x12,\r
1211 PortTypePcmciaTypeII = 0x13,\r
1212 PortTypePcmciaTypeIII = 0x14,\r
1213 PortTypeCardBus = 0x15,\r
1214 PortTypeAccessBusPort = 0x16,\r
1215 PortTypeScsiII = 0x17,\r
1216 PortTypeScsiWide = 0x18,\r
1217 PortTypePC98 = 0x19,\r
1218 PortTypePC98Hireso = 0x1A,\r
1219 PortTypePCH98 = 0x1B,\r
1220 PortTypeVideoPort = 0x1C,\r
1221 PortTypeAudioPort = 0x1D,\r
1222 PortTypeModemPort = 0x1E,\r
1223 PortTypeNetworkPort = 0x1F,\r
23df19a7
SEHM		 1224 PortTypeSata = 0x20,\r
1225 PortTypeSas = 0x21,\r
cfcca3c2
SZ		 1226 PortTypeMfdp = 0x22, ///< Multi-Function Display Port\r
1227 PortTypeThunderbolt = 0x23,\r
98cb9ae8 1228 PortType8251Compatible = 0xA0,\r
1229 PortType8251FifoCompatible = 0xA1,\r
1230 PortTypeOther = 0xFF\r
1231} MISC_PORT_TYPE;\r
1232\r
4135253b 1233///\r
af2dc6a7 1234/// Port Connector Information (Type 8).\r
4135253b 1235///\r
9095d37b
LG		 1236/// The information in this structure defines the attributes of a system port connector,\r
1237/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information\r
98cb9ae8 1238/// are provided. One structure is present for each port provided by the system.\r
1239///\r
61ce5861 1240typedef struct {\r
98cb9ae8 1241 SMBIOS_STRUCTURE Hdr;\r
1242 SMBIOS_TABLE_STRING InternalReferenceDesignator;\r
af2dc6a7 1243 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
98cb9ae8 1244 SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r
af2dc6a7 1245 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
1246 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r
61ce5861 1247} SMBIOS_TABLE_TYPE8;\r
1248\r
98cb9ae8 1249///\r
1250/// System Slots - Slot Type\r
1251///\r
1252typedef enum {\r
1253 SlotTypeOther = 0x01,\r
1254 SlotTypeUnknown = 0x02,\r
1255 SlotTypeIsa = 0x03,\r
1256 SlotTypeMca = 0x04,\r
1257 SlotTypeEisa = 0x05,\r
1258 SlotTypePci = 0x06,\r
1259 SlotTypePcmcia = 0x07,\r
1260 SlotTypeVlVesa = 0x08,\r
1261 SlotTypeProprietary = 0x09,\r
1262 SlotTypeProcessorCardSlot = 0x0A,\r
1263 SlotTypeProprietaryMemoryCardSlot = 0x0B,\r
1264 SlotTypeIORiserCardSlot = 0x0C,\r
1265 SlotTypeNuBus = 0x0D,\r
1266 SlotTypePci66MhzCapable = 0x0E,\r
1267 SlotTypeAgp = 0x0F,\r
1268 SlotTypeApg2X = 0x10,\r
1269 SlotTypeAgp4X = 0x11,\r
1270 SlotTypePciX = 0x12,\r
0c8cd067 1271 SlotTypeAgp8X = 0x13,\r
6cd35c62
EL		 1272 SlotTypeM2Socket1_DP = 0x14,\r
1273 SlotTypeM2Socket1_SD = 0x15,\r
1274 SlotTypeM2Socket2 = 0x16,\r
1275 SlotTypeM2Socket3 = 0x17,\r
1276 SlotTypeMxmTypeI = 0x18,\r
1277 SlotTypeMxmTypeII = 0x19,\r
1278 SlotTypeMxmTypeIIIStandard = 0x1A,\r
1279 SlotTypeMxmTypeIIIHe = 0x1B,\r
1280 SlotTypeMxmTypeIV = 0x1C,\r
1281 SlotTypeMxm30TypeA = 0x1D,\r
1282 SlotTypeMxm30TypeB = 0x1E,\r
1283 SlotTypePciExpressGen2Sff_8639 = 0x1F,\r
1284 SlotTypePciExpressGen3Sff_8639 = 0x20,\r
ff6a1f32
SZ		 1285 SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.\r
1286 SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.\r
1287 SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.\r
9e50ef63 1288 SlotTypeCXLFlexbus10 = 0x30,\r
98cb9ae8 1289 SlotTypePC98C20 = 0xA0,\r
1290 SlotTypePC98C24 = 0xA1,\r
1291 SlotTypePC98E = 0xA2,\r
1292 SlotTypePC98LocalBus = 0xA3,\r
1293 SlotTypePC98Card = 0xA4,\r
1294 SlotTypePciExpress = 0xA5,\r
1295 SlotTypePciExpressX1 = 0xA6,\r
1296 SlotTypePciExpressX2 = 0xA7,\r
1297 SlotTypePciExpressX4 = 0xA8,\r
1298 SlotTypePciExpressX8 = 0xA9,\r
3507ab19 1299 SlotTypePciExpressX16 = 0xAA,\r
1300 SlotTypePciExpressGen2 = 0xAB,\r
1301 SlotTypePciExpressGen2X1 = 0xAC,\r
1302 SlotTypePciExpressGen2X2 = 0xAD,\r
1303 SlotTypePciExpressGen2X4 = 0xAE,\r
1304 SlotTypePciExpressGen2X8 = 0xAF,\r
7ddba202
SZ		 1305 SlotTypePciExpressGen2X16 = 0xB0,\r
1306 SlotTypePciExpressGen3 = 0xB1,\r
1307 SlotTypePciExpressGen3X1 = 0xB2,\r
1308 SlotTypePciExpressGen3X2 = 0xB3,\r
1309 SlotTypePciExpressGen3X4 = 0xB4,\r
1310 SlotTypePciExpressGen3X8 = 0xB5,\r
70c50f19
ZG		 1311 SlotTypePciExpressGen3X16 = 0xB6,\r
1312 SlotTypePciExpressGen4 = 0xB8,\r
1313 SlotTypePciExpressGen4X1 = 0xB9,\r
1314 SlotTypePciExpressGen4X2 = 0xBA,\r
1315 SlotTypePciExpressGen4X4 = 0xBB,\r
1316 SlotTypePciExpressGen4X8 = 0xBC,\r
1317 SlotTypePciExpressGen4X16 = 0xBD\r
98cb9ae8 1318} MISC_SLOT_TYPE;\r
1319\r
1320///\r
af2dc6a7 1321/// System Slots - Slot Data Bus Width.\r
98cb9ae8 1322///\r
1323typedef enum {\r
1324 SlotDataBusWidthOther = 0x01,\r
1325 SlotDataBusWidthUnknown = 0x02,\r
1326 SlotDataBusWidth8Bit = 0x03,\r
1327 SlotDataBusWidth16Bit = 0x04,\r
1328 SlotDataBusWidth32Bit = 0x05,\r
1329 SlotDataBusWidth64Bit = 0x06,\r
1330 SlotDataBusWidth128Bit = 0x07,\r
6800ac83 1331 SlotDataBusWidth1X = 0x08, ///< Or X1\r
1332 SlotDataBusWidth2X = 0x09, ///< Or X2\r
1333 SlotDataBusWidth4X = 0x0A, ///< Or X4\r
1334 SlotDataBusWidth8X = 0x0B, ///< Or X8\r
1335 SlotDataBusWidth12X = 0x0C, ///< Or X12\r
1336 SlotDataBusWidth16X = 0x0D, ///< Or X16\r
1337 SlotDataBusWidth32X = 0x0E ///< Or X32\r
98cb9ae8 1338} MISC_SLOT_DATA_BUS_WIDTH;\r
1339\r
1340///\r
af2dc6a7 1341/// System Slots - Current Usage.\r
98cb9ae8 1342///\r
1343typedef enum {\r
cfcca3c2
SZ		 1344 SlotUsageOther = 0x01,\r
1345 SlotUsageUnknown = 0x02,\r
1346 SlotUsageAvailable = 0x03,\r
1347 SlotUsageInUse = 0x04,\r
1348 SlotUsageUnavailable = 0x05\r
98cb9ae8 1349} MISC_SLOT_USAGE;\r
1350\r
1351///\r
9095d37b 1352/// System Slots - Slot Length.\r
98cb9ae8 1353///\r
1354typedef enum {\r
1355 SlotLengthOther = 0x01,\r
1356 SlotLengthUnknown = 0x02,\r
1357 SlotLengthShort = 0x03,\r
1358 SlotLengthLong = 0x04\r
1359} MISC_SLOT_LENGTH;\r
1360\r
1361///\r
9095d37b 1362/// System Slots - Slot Characteristics 1.\r
98cb9ae8 1363///\r
1364typedef struct {\r
1365 UINT8 CharacteristicsUnknown :1;\r
1366 UINT8 Provides50Volts :1;\r
1367 UINT8 Provides33Volts :1;\r
1368 UINT8 SharedSlot :1;\r
1369 UINT8 PcCard16Supported :1;\r
1370 UINT8 CardBusSupported :1;\r
1371 UINT8 ZoomVideoSupported :1;\r
1372 UINT8 ModemRingResumeSupported:1;\r
1373} MISC_SLOT_CHARACTERISTICS1;\r
1374///\r
9095d37b 1375/// System Slots - Slot Characteristics 2.\r
98cb9ae8 1376///\r
1377typedef struct {\r
1378 UINT8 PmeSignalSupported :1;\r
1379 UINT8 HotPlugDevicesSupported :1;\r
1380 UINT8 SmbusSignalSupported :1;\r
cfcca3c2
SZ		 1381 UINT8 BifurcationSupported :1;\r
1382 UINT8 Reserved :4; ///< Set to 0.\r
98cb9ae8 1383} MISC_SLOT_CHARACTERISTICS2;\r
1384\r
cfcca3c2
SZ		 1385///\r
1386/// System Slots - Peer Segment/Bus/Device/Function/Width Groups\r
1387///\r
1388typedef struct {\r
1389 UINT16 SegmentGroupNum;\r
1390 UINT8 BusNum;\r
1391 UINT8 DevFuncNum;\r
1392 UINT8 DataBusWidth;\r
1393} MISC_SLOT_PEER_GROUP;\r
1394\r
4135253b 1395///\r
1396/// System Slots (Type 9)\r
1397///\r
9095d37b 1398/// The information in this structure defines the attributes of a system slot.\r
98cb9ae8 1399/// One structure is provided for each slot in the system.\r
1400///\r
1401///\r
61ce5861 1402typedef struct {\r
98cb9ae8 1403 SMBIOS_STRUCTURE Hdr;\r
1404 SMBIOS_TABLE_STRING SlotDesignation;\r
af2dc6a7 1405 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
1406 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
1407 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
1408 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
98cb9ae8 1409 UINT16 SlotID;\r
1410 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r
1411 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r
61ce5861 1412 //\r
1413 // Add for smbios 2.6\r
1414 //\r
98cb9ae8 1415 UINT16 SegmentGroupNum;\r
1416 UINT8 BusNum;\r
1417 UINT8 DevFuncNum;\r
cfcca3c2
SZ		 1418 //\r
1419 // Add for smbios 3.2\r
1420 //\r
1421 UINT8 DataBusWidth;\r
1422 UINT8 PeerGroupingCount;\r
1423 MISC_SLOT_PEER_GROUP PeerGroups[1];\r
61ce5861 1424} SMBIOS_TABLE_TYPE9;\r
1425\r
98cb9ae8 1426///\r
9095d37b 1427/// On Board Devices Information - Device Types.\r
98cb9ae8 1428///\r
1429typedef enum {\r
1430 OnBoardDeviceTypeOther = 0x01,\r
1431 OnBoardDeviceTypeUnknown = 0x02,\r
1432 OnBoardDeviceTypeVideo = 0x03,\r
1433 OnBoardDeviceTypeScsiController = 0x04,\r
1434 OnBoardDeviceTypeEthernet = 0x05,\r
1435 OnBoardDeviceTypeTokenRing = 0x06,\r
119c1688
SZ		 1436 OnBoardDeviceTypeSound = 0x07,\r
1437 OnBoardDeviceTypePATAController = 0x08,\r
1438 OnBoardDeviceTypeSATAController = 0x09,\r
1439 OnBoardDeviceTypeSASController = 0x0A\r
98cb9ae8 1440} MISC_ONBOARD_DEVICE_TYPE;\r
1441\r
bf7ea009 1442///\r
1443/// Device Item Entry\r
1444///\r
61ce5861 1445typedef struct {\r
af2dc6a7 1446 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r
1447 ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r
98cb9ae8 1448 SMBIOS_TABLE_STRING DescriptionString;\r
61ce5861 1449} DEVICE_STRUCT;\r
1450\r
4135253b 1451///\r
af2dc6a7 1452/// On Board Devices Information (Type 10, obsolete).\r
4135253b 1453///\r
9095d37b
LG		 1454/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended\r
1455/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both\r
1456/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.\r
1457/// The information in this structure defines the attributes of devices that are onboard (soldered onto)\r
98cb9ae8 1458/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
1459/// has some level of control over the enabling of the associated device for use by the system.\r
1460///\r
61ce5861 1461typedef struct {\r
1462 SMBIOS_STRUCTURE Hdr;\r
1463 DEVICE_STRUCT Device[1];\r
1464} SMBIOS_TABLE_TYPE10;\r
1465\r
4135253b 1466///\r
af2dc6a7 1467/// OEM Strings (Type 11).\r
9095d37b
LG		 1468/// This structure contains free form strings defined by the OEM. Examples of this are:\r
1469/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.\r
4135253b 1470///\r
61ce5861 1471typedef struct {\r
1472 SMBIOS_STRUCTURE Hdr;\r
1473 UINT8 StringCount;\r
1474} SMBIOS_TABLE_TYPE11;\r
1475\r
4135253b 1476///\r
af2dc6a7 1477/// System Configuration Options (Type 12).\r
4135253b 1478///\r
9095d37b 1479/// This structure contains information required to configure the base board's Jumpers and Switches.\r
98cb9ae8 1480///\r
61ce5861 1481typedef struct {\r
1482 SMBIOS_STRUCTURE Hdr;\r
1483 UINT8 StringCount;\r
1484} SMBIOS_TABLE_TYPE12;\r
1485\r
98cb9ae8 1486\r
4135253b 1487///\r
af2dc6a7 1488/// BIOS Language Information (Type 13).\r
4135253b 1489///\r
9095d37b
LG		 1490/// The information in this structure defines the installable language attributes of the BIOS.\r
1491///\r
61ce5861 1492typedef struct {\r
1493 SMBIOS_STRUCTURE Hdr;\r
1494 UINT8 InstallableLanguages;\r
1495 UINT8 Flags;\r
fbfa4a1d 1496 UINT8 Reserved[15];\r
61ce5861 1497 SMBIOS_TABLE_STRING CurrentLanguages;\r
1498} SMBIOS_TABLE_TYPE13;\r
1499\r
119c1688
SZ		 1500///\r
1501/// Group Item Entry\r
1502///\r
1503typedef struct {\r
1504 UINT8 ItemType;\r
1505 UINT16 ItemHandle;\r
1506} GROUP_STRUCT;\r
1507\r
1508///\r
1509/// Group Associations (Type 14).\r
1510///\r
9095d37b
LG		 1511/// The Group Associations structure is provided for OEMs who want to specify\r
1512/// the arrangement or hierarchy of certain components (including other Group Associations)\r
1513/// within the system.\r
119c1688
SZ		 1514///\r
1515typedef struct {\r
1516 SMBIOS_STRUCTURE Hdr;\r
1517 SMBIOS_TABLE_STRING GroupName;\r
1518 GROUP_STRUCT Group[1];\r
1519} SMBIOS_TABLE_TYPE14;\r
1520\r
98cb9ae8 1521///\r
af2dc6a7 1522/// System Event Log - Event Log Types.\r
9095d37b 1523///\r
98cb9ae8 1524typedef enum {\r
1525 EventLogTypeReserved = 0x00,\r
1526 EventLogTypeSingleBitECC = 0x01,\r
1527 EventLogTypeMultiBitECC = 0x02,\r
1528 EventLogTypeParityMemErr = 0x03,\r
1529 EventLogTypeBusTimeOut = 0x04,\r
1530 EventLogTypeIOChannelCheck = 0x05,\r
1531 EventLogTypeSoftwareNMI = 0x06,\r
1532 EventLogTypePOSTMemResize = 0x07,\r
1533 EventLogTypePOSTErr = 0x08,\r
1534 EventLogTypePCIParityErr = 0x09,\r
1535 EventLogTypePCISystemErr = 0x0A,\r
1536 EventLogTypeCPUFailure = 0x0B,\r
1537 EventLogTypeEISATimeOut = 0x0C,\r
1538 EventLogTypeMemLogDisabled = 0x0D,\r
1539 EventLogTypeLoggingDisabled = 0x0E,\r
1540 EventLogTypeSysLimitExce = 0x10,\r
1541 EventLogTypeAsyncHWTimer = 0x11,\r
1542 EventLogTypeSysConfigInfo = 0x12,\r
1543 EventLogTypeHDInfo = 0x13,\r
1544 EventLogTypeSysReconfig = 0x14,\r
1545 EventLogTypeUncorrectCPUErr = 0x15,\r
1546 EventLogTypeAreaResetAndClr = 0x16,\r
1547 EventLogTypeSystemBoot = 0x17,\r
6800ac83 1548 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r
1549 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r
98cb9ae8 1550 EventLogTypeEndOfLog = 0xFF\r
1551} EVENT_LOG_TYPE_DATA;\r
1552\r
1553///\r
9095d37b
LG		 1554/// System Event Log - Variable Data Format Types.\r
1555///\r
98cb9ae8 1556typedef enum {\r
1557 EventLogVariableNone = 0x00,\r
1558 EventLogVariableHandle = 0x01,\r
1559 EventLogVariableMutilEvent = 0x02,\r
1560 EventLogVariableMutilEventHandle = 0x03,\r
1561 EventLogVariablePOSTResultBitmap = 0x04,\r
1562 EventLogVariableSysManagementType = 0x05,\r
9095d37b 1563 EventLogVariableMutliEventSysManagmentType = 0x06,\r
98cb9ae8 1564 EventLogVariableUnused = 0x07,\r
1565 EventLogVariableOEMAssigned = 0x80\r
55deb978 1566} EVENT_LOG_VARIABLE_DATA;\r
98cb9ae8 1567\r
98cb9ae8 1568///\r
1569/// Event Log Type Descriptors\r
1570///\r
1571typedef struct {\r
af2dc6a7 1572 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r
98cb9ae8 1573 UINT8 DataFormatType;\r
1574} EVENT_LOG_TYPE;\r
1575\r
4135253b 1576///\r
af2dc6a7 1577/// System Event Log (Type 15).\r
4135253b 1578///\r
9095d37b
LG		 1579/// The presence of this structure within the SMBIOS data returned for a system indicates\r
1580/// that the system supports an event log. An event log is a fixed-length area within a\r
1581/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header\r
1582/// record, followed by one or more variable-length log records.\r
98cb9ae8 1583///\r
61ce5861 1584typedef struct {\r
1585 SMBIOS_STRUCTURE Hdr;\r
1586 UINT16 LogAreaLength;\r
1587 UINT16 LogHeaderStartOffset;\r
1588 UINT16 LogDataStartOffset;\r
1589 UINT8 AccessMethod;\r
1590 UINT8 LogStatus;\r
1591 UINT32 LogChangeToken;\r
1592 UINT32 AccessMethodAddress;\r
1593 UINT8 LogHeaderFormat;\r
1594 UINT8 NumberOfSupportedLogTypeDescriptors;\r
1595 UINT8 LengthOfLogTypeDescriptor;\r
1596 EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r
1597} SMBIOS_TABLE_TYPE15;\r
1598\r
98cb9ae8 1599///\r
af2dc6a7 1600/// Physical Memory Array - Location.\r
98cb9ae8 1601///\r
1602typedef enum {\r
1603 MemoryArrayLocationOther = 0x01,\r
1604 MemoryArrayLocationUnknown = 0x02,\r
1605 MemoryArrayLocationSystemBoard = 0x03,\r
1606 MemoryArrayLocationIsaAddonCard = 0x04,\r
1607 MemoryArrayLocationEisaAddonCard = 0x05,\r
1608 MemoryArrayLocationPciAddonCard = 0x06,\r
1609 MemoryArrayLocationMcaAddonCard = 0x07,\r
1610 MemoryArrayLocationPcmciaAddonCard = 0x08,\r
1611 MemoryArrayLocationProprietaryAddonCard = 0x09,\r
1612 MemoryArrayLocationNuBus = 0x0A,\r
1613 MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1614 MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1615 MemoryArrayLocationPc98EAddonCard = 0xA2,\r
9e50ef63
ZG		 1616 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3,\r
1617 MemoryArrayLocationCXLFlexbus10AddonCard = 0xA4\r
98cb9ae8 1618} MEMORY_ARRAY_LOCATION;\r
1619\r
1620///\r
af2dc6a7 1621/// Physical Memory Array - Use.\r
98cb9ae8 1622///\r
1623typedef enum {\r
1624 MemoryArrayUseOther = 0x01,\r
1625 MemoryArrayUseUnknown = 0x02,\r
1626 MemoryArrayUseSystemMemory = 0x03,\r
1627 MemoryArrayUseVideoMemory = 0x04,\r
1628 MemoryArrayUseFlashMemory = 0x05,\r
1629 MemoryArrayUseNonVolatileRam = 0x06,\r
1630 MemoryArrayUseCacheMemory = 0x07\r
1631} MEMORY_ARRAY_USE;\r
1632\r
1633///\r
9095d37b 1634/// Physical Memory Array - Error Correction Types.\r
98cb9ae8 1635///\r
1636typedef enum {\r
1637 MemoryErrorCorrectionOther = 0x01,\r
1638 MemoryErrorCorrectionUnknown = 0x02,\r
1639 MemoryErrorCorrectionNone = 0x03,\r
1640 MemoryErrorCorrectionParity = 0x04,\r
1641 MemoryErrorCorrectionSingleBitEcc = 0x05,\r
1642 MemoryErrorCorrectionMultiBitEcc = 0x06,\r
1643 MemoryErrorCorrectionCrc = 0x07\r
1644} MEMORY_ERROR_CORRECTION;\r
1645\r
4135253b 1646///\r
af2dc6a7 1647/// Physical Memory Array (Type 16).\r
4135253b 1648///\r
9095d37b
LG		 1649/// This structure describes a collection of memory devices that operate\r
1650/// together to form a memory address space.\r
98cb9ae8 1651///\r
61ce5861 1652typedef struct {\r
98cb9ae8 1653 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1654 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r
1655 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r
1656 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r
98cb9ae8 1657 UINT32 MaximumCapacity;\r
1658 UINT16 MemoryErrorInformationHandle;\r
1659 UINT16 NumberOfMemoryDevices;\r
7ddba202
SZ		 1660 //\r
1661 // Add for smbios 2.7\r
1662 //\r
1663 UINT64 ExtendedMaximumCapacity;\r
61ce5861 1664} SMBIOS_TABLE_TYPE16;\r
1665\r
98cb9ae8 1666///\r
af2dc6a7 1667/// Memory Device - Form Factor.\r
98cb9ae8 1668///\r
1669typedef enum {\r
1670 MemoryFormFactorOther = 0x01,\r
1671 MemoryFormFactorUnknown = 0x02,\r
1672 MemoryFormFactorSimm = 0x03,\r
1673 MemoryFormFactorSip = 0x04,\r
1674 MemoryFormFactorChip = 0x05,\r
1675 MemoryFormFactorDip = 0x06,\r
1676 MemoryFormFactorZip = 0x07,\r
1677 MemoryFormFactorProprietaryCard = 0x08,\r
1678 MemoryFormFactorDimm = 0x09,\r
1679 MemoryFormFactorTsop = 0x0A,\r
1680 MemoryFormFactorRowOfChips = 0x0B,\r
1681 MemoryFormFactorRimm = 0x0C,\r
1682 MemoryFormFactorSodimm = 0x0D,\r
1683 MemoryFormFactorSrimm = 0x0E,\r
8019eb58
ZG		 1684 MemoryFormFactorFbDimm = 0x0F,\r
1685 MemoryFormFactorDie = 0x10\r
98cb9ae8 1686} MEMORY_FORM_FACTOR;\r
1687\r
1688///\r
1689/// Memory Device - Type\r
1690///\r
1691typedef enum {\r
1692 MemoryTypeOther = 0x01,\r
1693 MemoryTypeUnknown = 0x02,\r
1694 MemoryTypeDram = 0x03,\r
1695 MemoryTypeEdram = 0x04,\r
1696 MemoryTypeVram = 0x05,\r
1697 MemoryTypeSram = 0x06,\r
1698 MemoryTypeRam = 0x07,\r
1699 MemoryTypeRom = 0x08,\r
1700 MemoryTypeFlash = 0x09,\r
1701 MemoryTypeEeprom = 0x0A,\r
1702 MemoryTypeFeprom = 0x0B,\r
1703 MemoryTypeEprom = 0x0C,\r
1704 MemoryTypeCdram = 0x0D,\r
1705 MemoryType3Dram = 0x0E,\r
1706 MemoryTypeSdram = 0x0F,\r
1707 MemoryTypeSgram = 0x10,\r
1708 MemoryTypeRdram = 0x11,\r
1709 MemoryTypeDdr = 0x12,\r
1710 MemoryTypeDdr2 = 0x13,\r
3507ab19 1711 MemoryTypeDdr2FbDimm = 0x14,\r
1712 MemoryTypeDdr3 = 0x18,\r
6cd35c62
EL		 1713 MemoryTypeFbd2 = 0x19,\r
1714 MemoryTypeDdr4 = 0x1A,\r
1715 MemoryTypeLpddr = 0x1B,\r
1716 MemoryTypeLpddr2 = 0x1C,\r
1717 MemoryTypeLpddr3 = 0x1D,\r
cfcca3c2 1718 MemoryTypeLpddr4 = 0x1E,\r
8019eb58
ZG		 1719 MemoryTypeLogicalNonVolatileDevice = 0x1F,\r
1720 MemoryTypeHBM = 0x20,\r
1721 MemoryTypeHBM2 = 0x21\r
98cb9ae8 1722} MEMORY_DEVICE_TYPE;\r
1723\r
cfcca3c2
SZ		 1724///\r
1725/// Memory Device - Type Detail\r
1726///\r
98cb9ae8 1727typedef struct {\r
1728 UINT16 Reserved :1;\r
1729 UINT16 Other :1;\r
1730 UINT16 Unknown :1;\r
1731 UINT16 FastPaged :1;\r
1732 UINT16 StaticColumn :1;\r
1733 UINT16 PseudoStatic :1;\r
1734 UINT16 Rambus :1;\r
1735 UINT16 Synchronous :1;\r
1736 UINT16 Cmos :1;\r
1737 UINT16 Edo :1;\r
1738 UINT16 WindowDram :1;\r
1739 UINT16 CacheDram :1;\r
1740 UINT16 Nonvolatile :1;\r
7ddba202
SZ		 1741 UINT16 Registered :1;\r
1742 UINT16 Unbuffered :1;\r
4a228334 1743 UINT16 LrDimm :1;\r
98cb9ae8 1744} MEMORY_DEVICE_TYPE_DETAIL;\r
1745\r
cfcca3c2
SZ		 1746///\r
1747/// Memory Device - Memory Technology\r
1748///\r
1749typedef enum {\r
1750 MemoryTechnologyOther = 0x01,\r
1751 MemoryTechnologyUnknown = 0x02,\r
1752 MemoryTechnologyDram = 0x03,\r
1753 MemoryTechnologyNvdimmN = 0x04,\r
1754 MemoryTechnologyNvdimmF = 0x05,\r
1755 MemoryTechnologyNvdimmP = 0x06,\r
4b7edd78
ZG		 1756 //\r
1757 // This definition is updated to represent Intel\r
1758 // Optane DC Presistent Memory in SMBIOS spec 3.3.0\r
1759 //\r
cfcca3c2
SZ		 1760 MemoryTechnologyIntelPersistentMemory = 0x07\r
1761} MEMORY_DEVICE_TECHNOLOGY;\r
1762\r
1763///\r
1764/// Memory Device - Memory Operating Mode Capability\r
1765///\r
1766typedef union {\r
1767 ///\r
1768 /// Individual bit fields\r
1769 ///\r
1770 struct {\r
1771 UINT16 Reserved :1; ///< Set to 0.\r
1772 UINT16 Other :1;\r
1773 UINT16 Unknown :1;\r
1774 UINT16 VolatileMemory :1;\r
1775 UINT16 ByteAccessiblePersistentMemory :1;\r
1776 UINT16 BlockAccessiblePersistentMemory :1;\r
1777 UINT16 Reserved2 :10; ///< Set to 0.\r
1778 } Bits;\r
1779 ///\r
1780 /// All bit fields as a 16-bit value\r
1781 ///\r
1782 UINT16 Uint16;\r
1783} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY;\r
1784\r
4135253b 1785///\r
af2dc6a7 1786/// Memory Device (Type 17).\r
4135253b 1787///\r
9095d37b 1788/// This structure describes a single memory device that is part of\r
98cb9ae8 1789/// a larger Physical Memory Array (Type 16).\r
9095d37b
LG		 1790/// Note: If a system includes memory-device sockets, the SMBIOS implementation\r
1791/// includes a Memory Device structure instance for each slot, whether or not the\r
98cb9ae8 1792/// socket is currently populated.\r
1793///\r
61ce5861 1794typedef struct {\r
cfcca3c2
SZ		 1795 SMBIOS_STRUCTURE Hdr;\r
1796 UINT16 MemoryArrayHandle;\r
1797 UINT16 MemoryErrorInformationHandle;\r
1798 UINT16 TotalWidth;\r
1799 UINT16 DataWidth;\r
1800 UINT16 Size;\r
1801 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r
1802 UINT8 DeviceSet;\r
1803 SMBIOS_TABLE_STRING DeviceLocator;\r
1804 SMBIOS_TABLE_STRING BankLocator;\r
1805 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r
1806 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
1807 UINT16 Speed;\r
1808 SMBIOS_TABLE_STRING Manufacturer;\r
1809 SMBIOS_TABLE_STRING SerialNumber;\r
1810 SMBIOS_TABLE_STRING AssetTag;\r
1811 SMBIOS_TABLE_STRING PartNumber;\r
61ce5861 1812 //\r
1813 // Add for smbios 2.6\r
9095d37b 1814 //\r
cfcca3c2 1815 UINT8 Attributes;\r
7ddba202
SZ		 1816 //\r
1817 // Add for smbios 2.7\r
1818 //\r
cfcca3c2
SZ		 1819 UINT32 ExtendedSize;\r
1820 //\r
1821 // Keep using name "ConfiguredMemoryClockSpeed" for compatibility\r
1822 // although this field is renamed from "Configured Memory Clock Speed"\r
1823 // to "Configured Memory Speed" in smbios 3.2.0.\r
1824 //\r
1825 UINT16 ConfiguredMemoryClockSpeed;\r
4a228334
EL		 1826 //\r
1827 // Add for smbios 2.8.0\r
1828 //\r
cfcca3c2
SZ		 1829 UINT16 MinimumVoltage;\r
1830 UINT16 MaximumVoltage;\r
1831 UINT16 ConfiguredVoltage;\r
1832 //\r
1833 // Add for smbios 3.2.0\r
1834 //\r
1835 UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY\r
1836 MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability;\r
1837 SMBIOS_TABLE_STRING FirwareVersion;\r
1838 UINT16 ModuleManufacturerID;\r
1839 UINT16 ModuleProductID;\r
1840 UINT16 MemorySubsystemControllerManufacturerID;\r
1841 UINT16 MemorySubsystemControllerProductID;\r
1842 UINT64 NonVolatileSize;\r
1843 UINT64 VolatileSize;\r
1844 UINT64 CacheSize;\r
1845 UINT64 LogicalSize;\r
67ead55b
MC		 1846 //\r
1847 // Add for smbios 3.3.0\r
1848 //\r
1849 UINT32 ExtendedSpeed;\r
1850 UINT32 ExtendedConfiguredMemorySpeed;\r
61ce5861 1851} SMBIOS_TABLE_TYPE17;\r
1852\r
98cb9ae8 1853///\r
9095d37b 1854/// 32-bit Memory Error Information - Error Type.\r
98cb9ae8 1855///\r
9095d37b 1856typedef enum {\r
98cb9ae8 1857 MemoryErrorOther = 0x01,\r
1858 MemoryErrorUnknown = 0x02,\r
1859 MemoryErrorOk = 0x03,\r
1860 MemoryErrorBadRead = 0x04,\r
1861 MemoryErrorParity = 0x05,\r
1862 MemoryErrorSigleBit = 0x06,\r
1863 MemoryErrorDoubleBit = 0x07,\r
1864 MemoryErrorMultiBit = 0x08,\r
1865 MemoryErrorNibble = 0x09,\r
1866 MemoryErrorChecksum = 0x0A,\r
1867 MemoryErrorCrc = 0x0B,\r
1868 MemoryErrorCorrectSingleBit = 0x0C,\r
1869 MemoryErrorCorrected = 0x0D,\r
1870 MemoryErrorUnCorrectable = 0x0E\r
1871} MEMORY_ERROR_TYPE;\r
1872\r
1873///\r
9095d37b 1874/// 32-bit Memory Error Information - Error Granularity.\r
98cb9ae8 1875///\r
9095d37b 1876typedef enum {\r
98cb9ae8 1877 MemoryGranularityOther = 0x01,\r
1878 MemoryGranularityOtherUnknown = 0x02,\r
1879 MemoryGranularityDeviceLevel = 0x03,\r
1880 MemoryGranularityMemPartitionLevel = 0x04\r
1881} MEMORY_ERROR_GRANULARITY;\r
1882\r
1883///\r
9095d37b 1884/// 32-bit Memory Error Information - Error Operation.\r
98cb9ae8 1885///\r
9095d37b 1886typedef enum {\r
98cb9ae8 1887 MemoryErrorOperationOther = 0x01,\r
1888 MemoryErrorOperationUnknown = 0x02,\r
1889 MemoryErrorOperationRead = 0x03,\r
1890 MemoryErrorOperationWrite = 0x04,\r
1891 MemoryErrorOperationPartialWrite = 0x05\r
1892} MEMORY_ERROR_OPERATION;\r
1893\r
4135253b 1894///\r
af2dc6a7 1895/// 32-bit Memory Error Information (Type 18).\r
9095d37b
LG		 1896///\r
1897/// This structure identifies the specifics of an error that might be detected\r
98cb9ae8 1898/// within a Physical Memory Array.\r
4135253b 1899///\r
61ce5861 1900typedef struct {\r
98cb9ae8 1901 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1902 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
1903 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
1904 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
98cb9ae8 1905 UINT32 VendorSyndrome;\r
1906 UINT32 MemoryArrayErrorAddress;\r
1907 UINT32 DeviceErrorAddress;\r
1908 UINT32 ErrorResolution;\r
61ce5861 1909} SMBIOS_TABLE_TYPE18;\r
1910\r
4135253b 1911///\r
af2dc6a7 1912/// Memory Array Mapped Address (Type 19).\r
4135253b 1913///\r
9095d37b 1914/// This structure provides the address mapping for a Physical Memory Array.\r
98cb9ae8 1915/// One structure is present for each contiguous address range described.\r
1916///\r
61ce5861 1917typedef struct {\r
1918 SMBIOS_STRUCTURE Hdr;\r
1919 UINT32 StartingAddress;\r
1920 UINT32 EndingAddress;\r
1921 UINT16 MemoryArrayHandle;\r
1922 UINT8 PartitionWidth;\r
7ddba202
SZ		 1923 //\r
1924 // Add for smbios 2.7\r
1925 //\r
1926 UINT64 ExtendedStartingAddress;\r
1927 UINT64 ExtendedEndingAddress;\r
61ce5861 1928} SMBIOS_TABLE_TYPE19;\r
1929\r
4135253b 1930///\r
af2dc6a7 1931/// Memory Device Mapped Address (Type 20).\r
4135253b 1932///\r
9095d37b
LG		 1933/// This structure maps memory address space usually to a device-level granularity.\r
1934/// One structure is present for each contiguous address range described.\r
98cb9ae8 1935///\r
61ce5861 1936typedef struct {\r
1937 SMBIOS_STRUCTURE Hdr;\r
1938 UINT32 StartingAddress;\r
1939 UINT32 EndingAddress;\r
1940 UINT16 MemoryDeviceHandle;\r
1941 UINT16 MemoryArrayMappedAddressHandle;\r
1942 UINT8 PartitionRowPosition;\r
1943 UINT8 InterleavePosition;\r
1944 UINT8 InterleavedDataDepth;\r
7ddba202
SZ		 1945 //\r
1946 // Add for smbios 2.7\r
1947 //\r
1948 UINT64 ExtendedStartingAddress;\r
1949 UINT64 ExtendedEndingAddress;\r
61ce5861 1950} SMBIOS_TABLE_TYPE20;\r
1951\r
98cb9ae8 1952///\r
1953/// Built-in Pointing Device - Type\r
1954///\r
1955typedef enum {\r
1956 PointingDeviceTypeOther = 0x01,\r
1957 PointingDeviceTypeUnknown = 0x02,\r
1958 PointingDeviceTypeMouse = 0x03,\r
1959 PointingDeviceTypeTrackBall = 0x04,\r
1960 PointingDeviceTypeTrackPoint = 0x05,\r
1961 PointingDeviceTypeGlidePoint = 0x06,\r
1962 PointingDeviceTouchPad = 0x07,\r
1963 PointingDeviceTouchScreen = 0x08,\r
1964 PointingDeviceOpticalSensor = 0x09\r
1965} BUILTIN_POINTING_DEVICE_TYPE;\r
1966\r
1967///\r
af2dc6a7 1968/// Built-in Pointing Device - Interface.\r
98cb9ae8 1969///\r
1970typedef enum {\r
1971 PointingDeviceInterfaceOther = 0x01,\r
1972 PointingDeviceInterfaceUnknown = 0x02,\r
1973 PointingDeviceInterfaceSerial = 0x03,\r
1974 PointingDeviceInterfacePs2 = 0x04,\r
1975 PointingDeviceInterfaceInfrared = 0x05,\r
1976 PointingDeviceInterfaceHpHil = 0x06,\r
1977 PointingDeviceInterfaceBusMouse = 0x07,\r
1978 PointingDeviceInterfaceADB = 0x08,\r
1979 PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
1980 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
1981 PointingDeviceInterfaceUsb = 0xA2\r
1982} BUILTIN_POINTING_DEVICE_INTERFACE;\r
1983\r
4135253b 1984///\r
af2dc6a7 1985/// Built-in Pointing Device (Type 21).\r
4135253b 1986///\r
9095d37b 1987/// This structure describes the attributes of the built-in pointing device for the\r
af2dc6a7 1988/// system. The presence of this structure does not imply that the built-in\r
9095d37b 1989/// pointing device is active for the system's use!\r
98cb9ae8 1990///\r
61ce5861 1991typedef struct {\r
98cb9ae8 1992 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1993 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r
1994 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r
98cb9ae8 1995 UINT8 NumberOfButtons;\r
61ce5861 1996} SMBIOS_TABLE_TYPE21;\r
1997\r
98cb9ae8 1998///\r
1999/// Portable Battery - Device Chemistry\r
2000///\r
9095d37b 2001typedef enum {\r
98cb9ae8 2002 PortableBatteryDeviceChemistryOther = 0x01,\r
2003 PortableBatteryDeviceChemistryUnknown = 0x02,\r
2004 PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
2005 PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r
2006 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r
2007 PortableBatteryDeviceChemistryLithiumIon = 0x06,\r
2008 PortableBatteryDeviceChemistryZincAir = 0x07,\r
2009 PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r
2010} PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
2011\r
4135253b 2012///\r
af2dc6a7 2013/// Portable Battery (Type 22).\r
4135253b 2014///\r
9095d37b
LG		 2015/// This structure describes the attributes of the portable battery(s) for the system.\r
2016/// The structure contains the static attributes for the group. Each structure describes\r
1f9f8414 2017/// a single battery pack's attributes.\r
98cb9ae8 2018///\r
61ce5861 2019typedef struct {\r
98cb9ae8 2020 SMBIOS_STRUCTURE Hdr;\r
2021 SMBIOS_TABLE_STRING Location;\r
2022 SMBIOS_TABLE_STRING Manufacturer;\r
2023 SMBIOS_TABLE_STRING ManufactureDate;\r
2024 SMBIOS_TABLE_STRING SerialNumber;\r
2025 SMBIOS_TABLE_STRING DeviceName;\r
af2dc6a7 2026 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r
98cb9ae8 2027 UINT16 DeviceCapacity;\r
2028 UINT16 DesignVoltage;\r
2029 SMBIOS_TABLE_STRING SBDSVersionNumber;\r
2030 UINT8 MaximumErrorInBatteryData;\r
2031 UINT16 SBDSSerialNumber;\r
2032 UINT16 SBDSManufactureDate;\r
2033 SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r
2034 UINT8 DesignCapacityMultiplier;\r
2035 UINT32 OEMSpecific;\r
61ce5861 2036} SMBIOS_TABLE_TYPE22;\r
2037\r
4135253b 2038///\r
2039/// System Reset (Type 23)\r
2040///\r
9095d37b 2041/// This structure describes whether Automatic System Reset functions enabled (Status).\r
98cb9ae8 2042/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
9095d37b
LG		 2043/// before the Interval elapses, an automatic system reset will occur. The system will re-boot\r
2044/// according to the Boot Option. This function may repeat until the Limit is reached, at which time\r
2045/// the system will re-boot according to the Boot Option at Limit.\r
98cb9ae8 2046///\r
61ce5861 2047typedef struct {\r
2048 SMBIOS_STRUCTURE Hdr;\r
2049 UINT8 Capabilities;\r
2050 UINT16 ResetCount;\r
2051 UINT16 ResetLimit;\r
2052 UINT16 TimerInterval;\r
2053 UINT16 Timeout;\r
2054} SMBIOS_TABLE_TYPE23;\r
2055\r
4135253b 2056///\r
af2dc6a7 2057/// Hardware Security (Type 24).\r
4135253b 2058///\r
9095d37b 2059/// This structure describes the system-wide hardware security settings.\r
98cb9ae8 2060///\r
61ce5861 2061typedef struct {\r
2062 SMBIOS_STRUCTURE Hdr;\r
2063 UINT8 HardwareSecuritySettings;\r
2064} SMBIOS_TABLE_TYPE24;\r
2065\r
4135253b 2066///\r
af2dc6a7 2067/// System Power Controls (Type 25).\r
4135253b 2068///\r
9095d37b
LG		 2069/// This structure describes the attributes for controlling the main power supply to the system.\r
2070/// Software that interprets this structure uses the month, day, hour, minute, and second values\r
2071/// to determine the number of seconds until the next power-on of the system. The presence of\r
2072/// this structure implies that a timed power-on facility is available for the system.\r
98cb9ae8 2073///\r
61ce5861 2074typedef struct {\r
2075 SMBIOS_STRUCTURE Hdr;\r
2076 UINT8 NextScheduledPowerOnMonth;\r
2077 UINT8 NextScheduledPowerOnDayOfMonth;\r
2078 UINT8 NextScheduledPowerOnHour;\r
2079 UINT8 NextScheduledPowerOnMinute;\r
2080 UINT8 NextScheduledPowerOnSecond;\r
2081} SMBIOS_TABLE_TYPE25;\r
2082\r
98cb9ae8 2083///\r
af2dc6a7 2084/// Voltage Probe - Location and Status.\r
98cb9ae8 2085///\r
2086typedef struct {\r
2087 UINT8 VoltageProbeSite :5;\r
2088 UINT8 VoltageProbeStatus :3;\r
2089} MISC_VOLTAGE_PROBE_LOCATION;\r
2090\r
4135253b 2091///\r
2092/// Voltage Probe (Type 26)\r
2093///\r
9095d37b 2094/// This describes the attributes for a voltage probe in the system.\r
98cb9ae8 2095/// Each structure describes a single voltage probe.\r
2096///\r
61ce5861 2097typedef struct {\r
98cb9ae8 2098 SMBIOS_STRUCTURE Hdr;\r
2099 SMBIOS_TABLE_STRING Description;\r
2100 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r
2101 UINT16 MaximumValue;\r
2102 UINT16 MinimumValue;\r
2103 UINT16 Resolution;\r
2104 UINT16 Tolerance;\r
2105 UINT16 Accuracy;\r
2106 UINT32 OEMDefined;\r
2107 UINT16 NominalValue;\r
61ce5861 2108} SMBIOS_TABLE_TYPE26;\r
2109\r
98cb9ae8 2110///\r
af2dc6a7 2111/// Cooling Device - Device Type and Status.\r
98cb9ae8 2112///\r
2113typedef struct {\r
2114 UINT8 CoolingDevice :5;\r
2115 UINT8 CoolingDeviceStatus :3;\r
2116} MISC_COOLING_DEVICE_TYPE;\r
2117\r
4135253b 2118///\r
2119/// Cooling Device (Type 27)\r
2120///\r
9095d37b
LG		 2121/// This structure describes the attributes for a cooling device in the system.\r
2122/// Each structure describes a single cooling device.\r
2123///\r
61ce5861 2124typedef struct {\r
98cb9ae8 2125 SMBIOS_STRUCTURE Hdr;\r
2126 UINT16 TemperatureProbeHandle;\r
2127 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r
2128 UINT8 CoolingUnitGroup;\r
2129 UINT32 OEMDefined;\r
2130 UINT16 NominalSpeed;\r
7ddba202
SZ		 2131 //\r
2132 // Add for smbios 2.7\r
2133 //\r
2134 SMBIOS_TABLE_STRING Description;\r
61ce5861 2135} SMBIOS_TABLE_TYPE27;\r
2136\r
98cb9ae8 2137///\r
af2dc6a7 2138/// Temperature Probe - Location and Status.\r
98cb9ae8 2139///\r
2140typedef struct {\r
2141 UINT8 TemperatureProbeSite :5;\r
2142 UINT8 TemperatureProbeStatus :3;\r
2143} MISC_TEMPERATURE_PROBE_LOCATION;\r
2144\r
4135253b 2145///\r
af2dc6a7 2146/// Temperature Probe (Type 28).\r
4135253b 2147///\r
9095d37b
LG		 2148/// This structure describes the attributes for a temperature probe in the system.\r
2149/// Each structure describes a single temperature probe.\r
98cb9ae8 2150///\r
61ce5861 2151typedef struct {\r
98cb9ae8 2152 SMBIOS_STRUCTURE Hdr;\r
2153 SMBIOS_TABLE_STRING Description;\r
2154 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r
2155 UINT16 MaximumValue;\r
2156 UINT16 MinimumValue;\r
2157 UINT16 Resolution;\r
2158 UINT16 Tolerance;\r
2159 UINT16 Accuracy;\r
2160 UINT32 OEMDefined;\r
2161 UINT16 NominalValue;\r
61ce5861 2162} SMBIOS_TABLE_TYPE28;\r
2163\r
98cb9ae8 2164///\r
af2dc6a7 2165/// Electrical Current Probe - Location and Status.\r
98cb9ae8 2166///\r
2167typedef struct {\r
2168 UINT8 ElectricalCurrentProbeSite :5;\r
2169 UINT8 ElectricalCurrentProbeStatus :3;\r
2170} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
2171\r
4135253b 2172///\r
af2dc6a7 2173/// Electrical Current Probe (Type 29).\r
4135253b 2174///\r
98cb9ae8 2175/// This structure describes the attributes for an electrical current probe in the system.\r
9095d37b 2176/// Each structure describes a single electrical current probe.\r
98cb9ae8 2177///\r
61ce5861 2178typedef struct {\r
98cb9ae8 2179 SMBIOS_STRUCTURE Hdr;\r
2180 SMBIOS_TABLE_STRING Description;\r
2181 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r
2182 UINT16 MaximumValue;\r
2183 UINT16 MinimumValue;\r
2184 UINT16 Resolution;\r
2185 UINT16 Tolerance;\r
2186 UINT16 Accuracy;\r
2187 UINT32 OEMDefined;\r
2188 UINT16 NominalValue;\r
61ce5861 2189} SMBIOS_TABLE_TYPE29;\r
2190\r
4135253b 2191///\r
af2dc6a7 2192/// Out-of-Band Remote Access (Type 30).\r
4135253b 2193///\r
9095d37b
LG		 2194/// This structure describes the attributes and policy settings of a hardware facility\r
2195/// that may be used to gain remote access to a hardware system when the operating system\r
2196/// is not available due to power-down status, hardware failures, or boot failures.\r
98cb9ae8 2197///\r
61ce5861 2198typedef struct {\r
2199 SMBIOS_STRUCTURE Hdr;\r
2200 SMBIOS_TABLE_STRING ManufacturerName;\r
2201 UINT8 Connections;\r
2202} SMBIOS_TABLE_TYPE30;\r
2203\r
4135253b 2204///\r
af2dc6a7 2205/// Boot Integrity Services (BIS) Entry Point (Type 31).\r
4135253b 2206///\r
9095d37b
LG		 2207/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).\r
2208///\r
61ce5861 2209typedef struct {\r
2210 SMBIOS_STRUCTURE Hdr;\r
2211 UINT8 Checksum;\r
2212 UINT8 Reserved1;\r
2213 UINT16 Reserved2;\r
2214 UINT32 BisEntry16;\r
2215 UINT32 BisEntry32;\r
2216 UINT64 Reserved3;\r
2217 UINT32 Reserved4;\r
2218} SMBIOS_TABLE_TYPE31;\r
2219\r
98cb9ae8 2220///\r
af2dc6a7 2221/// System Boot Information - System Boot Status.\r
98cb9ae8 2222///\r
2223typedef enum {\r
2224 BootInformationStatusNoError = 0x00,\r
2225 BootInformationStatusNoBootableMedia = 0x01,\r
2226 BootInformationStatusNormalOSFailedLoading = 0x02,\r
2227 BootInformationStatusFirmwareDetectedFailure = 0x03,\r
2228 BootInformationStatusOSDetectedFailure = 0x04,\r
2229 BootInformationStatusUserRequestedBoot = 0x05,\r
2230 BootInformationStatusSystemSecurityViolation = 0x06,\r
2231 BootInformationStatusPreviousRequestedImage = 0x07,\r
2232 BootInformationStatusWatchdogTimerExpired = 0x08,\r
2233 BootInformationStatusStartReserved = 0x09,\r
2234 BootInformationStatusStartOemSpecific = 0x80,\r
2235 BootInformationStatusStartProductSpecific = 0xC0\r
2236} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
2237\r
4135253b 2238///\r
af2dc6a7 2239/// System Boot Information (Type 32).\r
4135253b 2240///\r
9095d37b
LG		 2241/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the\r
2242/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management\r
2243/// application via this structure. When used in the PXE environment, for example,\r
2244/// this code identifies the reason the PXE was initiated and can be used by boot-image\r
2245/// software to further automate an enterprise's PXE sessions. For example, an enterprise\r
2246/// could choose to automatically download a hardware-diagnostic image to a client whose\r
98cb9ae8 2247/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
2248///\r
61ce5861 2249typedef struct {\r
98cb9ae8 2250 SMBIOS_STRUCTURE Hdr;\r
2251 UINT8 Reserved[6];\r
af2dc6a7 2252 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r
61ce5861 2253} SMBIOS_TABLE_TYPE32;\r
2254\r
4135253b 2255///\r
af2dc6a7 2256/// 64-bit Memory Error Information (Type 33).\r
4135253b 2257///\r
9095d37b 2258/// This structure describes an error within a Physical Memory Array,\r
98cb9ae8 2259/// when the error address is above 4G (0xFFFFFFFF).\r
9095d37b 2260///\r
61ce5861 2261typedef struct {\r
98cb9ae8 2262 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 2263 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
2264 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
2265 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
98cb9ae8 2266 UINT32 VendorSyndrome;\r
2267 UINT64 MemoryArrayErrorAddress;\r
2268 UINT64 DeviceErrorAddress;\r
2269 UINT32 ErrorResolution;\r
61ce5861 2270} SMBIOS_TABLE_TYPE33;\r
2271\r
98cb9ae8 2272///\r
9095d37b 2273/// Management Device - Type.\r
98cb9ae8 2274///\r
2275typedef enum {\r
2276 ManagementDeviceTypeOther = 0x01,\r
2277 ManagementDeviceTypeUnknown = 0x02,\r
2278 ManagementDeviceTypeLm75 = 0x03,\r
2279 ManagementDeviceTypeLm78 = 0x04,\r
2280 ManagementDeviceTypeLm79 = 0x05,\r
2281 ManagementDeviceTypeLm80 = 0x06,\r
2282 ManagementDeviceTypeLm81 = 0x07,\r
2283 ManagementDeviceTypeAdm9240 = 0x08,\r
2284 ManagementDeviceTypeDs1780 = 0x09,\r
2285 ManagementDeviceTypeMaxim1617 = 0x0A,\r
2286 ManagementDeviceTypeGl518Sm = 0x0B,\r
2287 ManagementDeviceTypeW83781D = 0x0C,\r
2288 ManagementDeviceTypeHt82H791 = 0x0D\r
2289} MISC_MANAGEMENT_DEVICE_TYPE;\r
2290\r
2291///\r
9095d37b 2292/// Management Device - Address Type.\r
98cb9ae8 2293///\r
2294typedef enum {\r
2295 ManagementDeviceAddressTypeOther = 0x01,\r
2296 ManagementDeviceAddressTypeUnknown = 0x02,\r
2297 ManagementDeviceAddressTypeIOPort = 0x03,\r
2298 ManagementDeviceAddressTypeMemory = 0x04,\r
2299 ManagementDeviceAddressTypeSmbus = 0x05\r
2300} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
2301\r
4135253b 2302///\r
af2dc6a7 2303/// Management Device (Type 34).\r
4135253b 2304///\r
9095d37b 2305/// The information in this structure defines the attributes of a Management Device.\r
98cb9ae8 2306/// A Management Device might control one or more fans or voltage, current, or temperature\r
2307/// probes as defined by one or more Management Device Component structures.\r
2308///\r
61ce5861 2309typedef struct {\r
98cb9ae8 2310 SMBIOS_STRUCTURE Hdr;\r
2311 SMBIOS_TABLE_STRING Description;\r
af2dc6a7 2312 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r
98cb9ae8 2313 UINT32 Address;\r
af2dc6a7 2314 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r
61ce5861 2315} SMBIOS_TABLE_TYPE34;\r
2316\r
4135253b 2317///\r
2318/// Management Device Component (Type 35)\r
2319///\r
9095d37b
LG		 2320/// This structure associates a cooling device or environmental probe with structures\r
2321/// that define the controlling hardware device and (optionally) the component's thresholds.\r
98cb9ae8 2322///\r
61ce5861 2323typedef struct {\r
2324 SMBIOS_STRUCTURE Hdr;\r
2325 SMBIOS_TABLE_STRING Description;\r
2326 UINT16 ManagementDeviceHandle;\r
2327 UINT16 ComponentHandle;\r
2328 UINT16 ThresholdHandle;\r
2329} SMBIOS_TABLE_TYPE35;\r
2330\r
4135253b 2331///\r
af2dc6a7 2332/// Management Device Threshold Data (Type 36).\r
4135253b 2333///\r
9095d37b
LG		 2334/// The information in this structure defines threshold information for\r
2335/// a component (probe or cooling-unit) contained within a Management Device.\r
98cb9ae8 2336///\r
61ce5861 2337typedef struct {\r
2338 SMBIOS_STRUCTURE Hdr;\r
2339 UINT16 LowerThresholdNonCritical;\r
2340 UINT16 UpperThresholdNonCritical;\r
2341 UINT16 LowerThresholdCritical;\r
2342 UINT16 UpperThresholdCritical;\r
2343 UINT16 LowerThresholdNonRecoverable;\r
2344 UINT16 UpperThresholdNonRecoverable;\r
2345} SMBIOS_TABLE_TYPE36;\r
2346\r
bf7ea009 2347///\r
af2dc6a7 2348/// Memory Channel Entry.\r
bf7ea009 2349///\r
61ce5861 2350typedef struct {\r
2351 UINT8 DeviceLoad;\r
2352 UINT16 DeviceHandle;\r
2353} MEMORY_DEVICE;\r
2354\r
98cb9ae8 2355///\r
af2dc6a7 2356/// Memory Channel - Channel Type.\r
98cb9ae8 2357///\r
2358typedef enum {\r
2359 MemoryChannelTypeOther = 0x01,\r
2360 MemoryChannelTypeUnknown = 0x02,\r
2361 MemoryChannelTypeRambus = 0x03,\r
2362 MemoryChannelTypeSyncLink = 0x04\r
2363} MEMORY_CHANNEL_TYPE;\r
2364\r
4135253b 2365///\r
2366/// Memory Channel (Type 37)\r
2367///\r
98cb9ae8 2368/// The information in this structure provides the correlation between a Memory Channel\r
9095d37b 2369/// and its associated Memory Devices. Each device presents one or more loads to the channel.\r
af2dc6a7 2370/// The sum of all device loads cannot exceed the channel's defined maximum.\r
98cb9ae8 2371///\r
61ce5861 2372typedef struct {\r
2373 SMBIOS_STRUCTURE Hdr;\r
2374 UINT8 ChannelType;\r
2375 UINT8 MaximumChannelLoad;\r
2376 UINT8 MemoryDeviceCount;\r
2377 MEMORY_DEVICE MemoryDevice[1];\r
2378} SMBIOS_TABLE_TYPE37;\r
2379\r
98cb9ae8 2380///\r
2381/// IPMI Device Information - BMC Interface Type\r
2382///\r
2383typedef enum {\r
2384 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
af2dc6a7 2385 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r
2386 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r
2387 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r
cfcca3c2 2388 IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface\r
98cb9ae8 2389} BMC_INTERFACE_TYPE;\r
2390\r
4135253b 2391///\r
af2dc6a7 2392/// IPMI Device Information (Type 38).\r
4135253b 2393///\r
7ddba202 2394/// The information in this structure defines the attributes of an\r
98cb9ae8 2395/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r
7ddba202
SZ		 2396///\r
2397/// The Type 42 structure can also be used to describe a physical management controller\r
2398/// host interface and one or more protocols that share that interface. If IPMI is not\r
2399/// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r
2400/// Providing Type 38 is recommended for backward compatibility.\r
2401///\r
61ce5861 2402typedef struct {\r
2403 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 2404 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r
61ce5861 2405 UINT8 IPMISpecificationRevision;\r
2406 UINT8 I2CSlaveAddress;\r
2407 UINT8 NVStorageDeviceAddress;\r
2408 UINT64 BaseAddress;\r
2409 UINT8 BaseAddressModifier_InterruptInfo;\r
2410 UINT8 InterruptNumber;\r
2411} SMBIOS_TABLE_TYPE38;\r
2412\r
98cb9ae8 2413///\r
af2dc6a7 2414/// System Power Supply - Power Supply Characteristics.\r
98cb9ae8 2415///\r
2416typedef struct {\r
2417 UINT16 PowerSupplyHotReplaceable:1;\r
2418 UINT16 PowerSupplyPresent :1;\r
2419 UINT16 PowerSupplyUnplugged :1;\r
2420 UINT16 InputVoltageRangeSwitch :4;\r
2421 UINT16 PowerSupplyStatus :3;\r
2422 UINT16 PowerSupplyType :4;\r
2423 UINT16 Reserved :2;\r
2424} SYS_POWER_SUPPLY_CHARACTERISTICS;\r
2425\r
4135253b 2426///\r
af2dc6a7 2427/// System Power Supply (Type 39).\r
4135253b 2428///\r
7ddba202
SZ		 2429/// This structure identifies attributes of a system power supply. One instance\r
2430/// of this record is present for each possible power supply in a system.\r
98cb9ae8 2431///\r
61ce5861 2432typedef struct {\r
98cb9ae8 2433 SMBIOS_STRUCTURE Hdr;\r
2434 UINT8 PowerUnitGroup;\r
2435 SMBIOS_TABLE_STRING Location;\r
2436 SMBIOS_TABLE_STRING DeviceName;\r
2437 SMBIOS_TABLE_STRING Manufacturer;\r
2438 SMBIOS_TABLE_STRING SerialNumber;\r
2439 SMBIOS_TABLE_STRING AssetTagNumber;\r
2440 SMBIOS_TABLE_STRING ModelPartNumber;\r
2441 SMBIOS_TABLE_STRING RevisionLevel;\r
2442 UINT16 MaxPowerCapacity;\r
2443 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
2444 UINT16 InputVoltageProbeHandle;\r
2445 UINT16 CoolingDeviceHandle;\r
2446 UINT16 InputCurrentProbeHandle;\r
61ce5861 2447} SMBIOS_TABLE_TYPE39;\r
2448\r
bf7ea009 2449///\r
9095d37b 2450/// Additional Information Entry Format.\r
bf7ea009 2451///\r
9095d37b
LG		 2452typedef struct {\r
2453 UINT8 EntryLength;\r
61ce5861 2454 UINT16 ReferencedHandle;\r
2455 UINT8 ReferencedOffset;\r
2456 SMBIOS_TABLE_STRING EntryString;\r
2457 UINT8 Value[1];\r
cfcca3c2 2458} ADDITIONAL_INFORMATION_ENTRY;\r
61ce5861 2459\r
4135253b 2460///\r
af2dc6a7 2461/// Additional Information (Type 40).\r
4135253b 2462///\r
9095d37b
LG		 2463/// This structure is intended to provide additional information for handling unspecified\r
2464/// enumerated values and interim field updates in another structure.\r
98cb9ae8 2465///\r
61ce5861 2466typedef struct {\r
2467 SMBIOS_STRUCTURE Hdr;\r
2468 UINT8 NumberOfAdditionalInformationEntries;\r
9095d37b 2469 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];\r
61ce5861 2470} SMBIOS_TABLE_TYPE40;\r
2471\r
98cb9ae8 2472///\r
af2dc6a7 2473/// Onboard Devices Extended Information - Onboard Device Types.\r
98cb9ae8 2474///\r
2475typedef enum{\r
2476 OnBoardDeviceExtendedTypeOther = 0x01,\r
2477 OnBoardDeviceExtendedTypeUnknown = 0x02,\r
2478 OnBoardDeviceExtendedTypeVideo = 0x03,\r
2479 OnBoardDeviceExtendedTypeScsiController = 0x04,\r
2480 OnBoardDeviceExtendedTypeEthernet = 0x05,\r
2481 OnBoardDeviceExtendedTypeTokenRing = 0x06,\r
2482 OnBoardDeviceExtendedTypeSound = 0x07,\r
2483 OnBoardDeviceExtendedTypePATAController = 0x08,\r
2484 OnBoardDeviceExtendedTypeSATAController = 0x09,\r
2485 OnBoardDeviceExtendedTypeSASController = 0x0A\r
2486} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r
2487\r
4135253b 2488///\r
af2dc6a7 2489/// Onboard Devices Extended Information (Type 41).\r
4135253b 2490///\r
9095d37b
LG		 2491/// The information in this structure defines the attributes of devices that\r
2492/// are onboard (soldered onto) a system element, usually the baseboard.\r
2493/// In general, an entry in this table implies that the BIOS has some level of\r
2494/// control over the enabling of the associated device for use by the system.\r
98cb9ae8 2495///\r
61ce5861 2496typedef struct {\r
98cb9ae8 2497 SMBIOS_STRUCTURE Hdr;\r
2498 SMBIOS_TABLE_STRING ReferenceDesignation;\r
af2dc6a7 2499 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r
98cb9ae8 2500 UINT8 DeviceTypeInstance;\r
2501 UINT16 SegmentGroupNum;\r
2502 UINT8 BusNum;\r
7ddba202 2503 UINT8 DevFuncNum;\r
61ce5861 2504} SMBIOS_TABLE_TYPE41;\r
2505\r
78ab44cb
AC		 2506///\r
2507/// Management Controller Host Interface - Protocol Record Data Format.\r
2508///\r
2509typedef struct {\r
2510 UINT8 ProtocolType;\r
2511 UINT8 ProtocolTypeDataLen;\r
2512 UINT8 ProtocolTypeData[1];\r
2513} MC_HOST_INTERFACE_PROTOCOL_RECORD;\r
2514\r
043026ac
SZ		 2515///\r
2516/// Management Controller Host Interface - Interface Types.\r
2517/// 00h - 3Fh: MCTP Host Interfaces\r
2518///\r
2519typedef enum{\r
2520 MCHostInterfaceTypeNetworkHostInterface = 0x40,\r
2521 MCHostInterfaceTypeOemDefined = 0xF0\r
2522} MC_HOST_INTERFACE_TYPE;\r
2523\r
2524///\r
2525/// Management Controller Host Interface - Protocol Types.\r
2526///\r
2527typedef enum{\r
2528 MCHostInterfaceProtocolTypeIPMI = 0x02,\r
2529 MCHostInterfaceProtocolTypeMCTP = 0x03,\r
2530 MCHostInterfaceProtocolTypeRedfishOverIP = 0x04,\r
2531 MCHostInterfaceProtocolTypeOemDefined = 0xF0\r
2532} MC_HOST_INTERFACE_PROTOCOL_TYPE;\r
2533\r
7ddba202
SZ		 2534///\r
2535/// Management Controller Host Interface (Type 42).\r
2536///\r
2537/// The information in this structure defines the attributes of a Management\r
2538/// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r
2539///\r
2540/// Type 42 should be used for management controller host interfaces that use protocols\r
2541/// other than IPMI or that use multiple protocols on a single host interface type.\r
2542///\r
2543/// This structure should also be provided if IPMI is shared with other protocols\r
2544/// over the same interface hardware. If IPMI is not shared with other protocols,\r
2545/// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r
2546/// recommended for backward compatibility. The structures are not required to\r
2547/// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r
2548/// simultaneously to provide backward compatibility with IPMI applications or drivers\r
2549/// that do not yet recognize the Type 42 structure.\r
2550///\r
2551typedef struct {\r
2552 SMBIOS_STRUCTURE Hdr;\r
cfcca3c2
SZ		 2553 UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE\r
2554 UINT8 InterfaceTypeSpecificDataLength;\r
2555 UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes\r
7ddba202
SZ		 2556} SMBIOS_TABLE_TYPE42;\r
2557\r
f06c92a6
AC		 2558\r
2559///\r
2560/// Processor Specific Block - Processor Architecture Type\r
2561///\r
2562typedef enum{\r
2563 ProcessorSpecificBlockArchTypeReserved = 0x00,\r
2564 ProcessorSpecificBlockArchTypeIa32 = 0x01,\r
2565 ProcessorSpecificBlockArchTypeX64 = 0x02,\r
2566 ProcessorSpecificBlockArchTypeItanium = 0x03,\r
2567 ProcessorSpecificBlockArchTypeAarch32 = 0x04,\r
2568 ProcessorSpecificBlockArchTypeAarch64 = 0x05,\r
2569 ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06,\r
2570 ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07,\r
2571 ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08\r
2572} PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;\r
2573\r
2574///\r
2575/// Processor Specific Block is the standard container of processor-specific data.\r
2576///\r
2577typedef struct {\r
2578 UINT8 Length;\r
2579 UINT8 ProcessorArchType;\r
2580 ///\r
2581 /// Below followed by Processor-specific data\r
2582 ///\r
2583 ///\r
2584} PROCESSOR_SPECIFIC_BLOCK;\r
2585\r
2586///\r
2587/// Processor Additional Information(Type 44).\r
2588///\r
2589/// The information in this structure defines the processor additional information in case\r
2590/// SMBIOS type 4 is not sufficient to describe processor characteristics.\r
2591/// The SMBIOS type 44 structure has a reference handle field to link back to the related\r
2592/// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the\r
2593/// same SMBIOS type 4 structure. For example, when cores are not identical in a processor,\r
2594/// SMBIOS type 44 structures describe different core-specific information.\r
2595///\r
2596/// SMBIOS type 44 defines the standard header for the processor-specific block, while the\r
2597/// contents of processor-specific data are maintained by processor\r
2598/// architecture workgroups or vendors in separate documents.\r
2599///\r
2600typedef struct {\r
2601 SMBIOS_STRUCTURE Hdr;\r
2602 SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4\r
2603 ///\r
2604 /// Below followed by Processor-specific block\r
2605 ///\r
2606 PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock;\r
2607} SMBIOS_TABLE_TYPE44;\r
2608\r
713e4b00
LA		 2609///\r
2610/// TPM Device (Type 43).\r
2611///\r
2612typedef struct {\r
2613 SMBIOS_STRUCTURE Hdr;\r
2614 UINT8 VendorID[4];\r
2615 UINT8 MajorSpecVersion;\r
2616 UINT8 MinorSpecVersion;\r
2617 UINT32 FirmwareVersion1;\r
2618 UINT32 FirmwareVersion2;\r
2619 SMBIOS_TABLE_STRING Description;\r
2620 UINT64 Characteristics;\r
2621 UINT32 OemDefined;\r
2622} SMBIOS_TABLE_TYPE43;\r
2623\r
4135253b 2624///\r
2625/// Inactive (Type 126)\r
2626///\r
61ce5861 2627typedef struct {\r
2628 SMBIOS_STRUCTURE Hdr;\r
2629} SMBIOS_TABLE_TYPE126;\r
2630\r
4135253b 2631///\r
2632/// End-of-Table (Type 127)\r
2633///\r
61ce5861 2634typedef struct {\r
2635 SMBIOS_STRUCTURE Hdr;\r
2636} SMBIOS_TABLE_TYPE127;\r
2637\r
4135253b 2638///\r
af2dc6a7 2639/// Union of all the possible SMBIOS record types.\r
4135253b 2640///\r
61ce5861 2641typedef union {\r
2642 SMBIOS_STRUCTURE *Hdr;\r
2643 SMBIOS_TABLE_TYPE0 *Type0;\r
2644 SMBIOS_TABLE_TYPE1 *Type1;\r
2645 SMBIOS_TABLE_TYPE2 *Type2;\r
2646 SMBIOS_TABLE_TYPE3 *Type3;\r
2647 SMBIOS_TABLE_TYPE4 *Type4;\r
2648 SMBIOS_TABLE_TYPE5 *Type5;\r
2649 SMBIOS_TABLE_TYPE6 *Type6;\r
2650 SMBIOS_TABLE_TYPE7 *Type7;\r
2651 SMBIOS_TABLE_TYPE8 *Type8;\r
2652 SMBIOS_TABLE_TYPE9 *Type9;\r
2653 SMBIOS_TABLE_TYPE10 *Type10;\r
2654 SMBIOS_TABLE_TYPE11 *Type11;\r
2655 SMBIOS_TABLE_TYPE12 *Type12;\r
2656 SMBIOS_TABLE_TYPE13 *Type13;\r
2657 SMBIOS_TABLE_TYPE14 *Type14;\r
2658 SMBIOS_TABLE_TYPE15 *Type15;\r
2659 SMBIOS_TABLE_TYPE16 *Type16;\r
2660 SMBIOS_TABLE_TYPE17 *Type17;\r
2661 SMBIOS_TABLE_TYPE18 *Type18;\r
2662 SMBIOS_TABLE_TYPE19 *Type19;\r
2663 SMBIOS_TABLE_TYPE20 *Type20;\r
2664 SMBIOS_TABLE_TYPE21 *Type21;\r
2665 SMBIOS_TABLE_TYPE22 *Type22;\r
2666 SMBIOS_TABLE_TYPE23 *Type23;\r
2667 SMBIOS_TABLE_TYPE24 *Type24;\r
2668 SMBIOS_TABLE_TYPE25 *Type25;\r
2669 SMBIOS_TABLE_TYPE26 *Type26;\r
2670 SMBIOS_TABLE_TYPE27 *Type27;\r
2671 SMBIOS_TABLE_TYPE28 *Type28;\r
2672 SMBIOS_TABLE_TYPE29 *Type29;\r
2673 SMBIOS_TABLE_TYPE30 *Type30;\r
2674 SMBIOS_TABLE_TYPE31 *Type31;\r
2675 SMBIOS_TABLE_TYPE32 *Type32;\r
2676 SMBIOS_TABLE_TYPE33 *Type33;\r
2677 SMBIOS_TABLE_TYPE34 *Type34;\r
2678 SMBIOS_TABLE_TYPE35 *Type35;\r
2679 SMBIOS_TABLE_TYPE36 *Type36;\r
2680 SMBIOS_TABLE_TYPE37 *Type37;\r
2681 SMBIOS_TABLE_TYPE38 *Type38;\r
2682 SMBIOS_TABLE_TYPE39 *Type39;\r
2683 SMBIOS_TABLE_TYPE40 *Type40;\r
2684 SMBIOS_TABLE_TYPE41 *Type41;\r
884f9295 2685 SMBIOS_TABLE_TYPE42 *Type42;\r
713e4b00 2686 SMBIOS_TABLE_TYPE43 *Type43;\r
f06c92a6 2687 SMBIOS_TABLE_TYPE44 *Type44;\r
61ce5861 2688 SMBIOS_TABLE_TYPE126 *Type126;\r
2689 SMBIOS_TABLE_TYPE127 *Type127;\r
2690 UINT8 *Raw;\r
2691} SMBIOS_STRUCTURE_POINTER;\r
2692\r
766f4bc1 2693#pragma pack()\r
2694\r
a7ed1e2e 2695#endif\r
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