]> git.proxmox.com Git - mirror_edk2.git/blame - MdePkg/Include/Ppi/SecPlatformInformation.h
MdePkg: Minor update to the Data parameter for PEI GetVariable()
[mirror_edk2.git] / MdePkg / Include / Ppi / SecPlatformInformation.h
CommitLineData
5879b875 1/** @file\r
2 This file declares Sec Platform Information PPI.\r
3\r
1c8e0459
JF
4 This service is the primary handoff state into the PEI Foundation.\r
5 The Security (SEC) component creates the early, transitory memory\r
6 environment and also encapsulates knowledge of at least the\r
d7132512
LG
7 location of the Boot Firmware Volume (BFV).\r
8\r
1c8e0459
JF
9Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
10This program and the accompanying materials are licensed and made available under\r
11the terms and conditions of the BSD License that accompanies this distribution.\r
af2dc6a7 12The full text of the license may be found at\r
1c8e0459 13http://opensource.org/licenses/bsd-license.php.\r
5879b875 14\r
1c8e0459
JF
15THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
16WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
5879b875 17\r
5879b875 18 @par Revision Reference:\r
0047820e 19 This PPI is introduced in PI Version 1.0.\r
5879b875 20\r
21**/\r
22\r
23#ifndef __SEC_PLATFORM_INFORMATION_PPI_H__\r
24#define __SEC_PLATFORM_INFORMATION_PPI_H__\r
25\r
1c8e0459
JF
26#include <Pi/PiPeiCis.h>\r
27\r
5879b875 28#define EFI_SEC_PLATFORM_INFORMATION_GUID \\r
29 { \\r
30 0x6f8c2b35, 0xfef4, 0x448d, {0x82, 0x56, 0xe1, 0x1b, 0x19, 0xd6, 0x10, 0x77 } \\r
31 }\r
32\r
33typedef struct _EFI_SEC_PLATFORM_INFORMATION_PPI EFI_SEC_PLATFORM_INFORMATION_PPI;\r
34\r
35\r
06889842 36///\r
37/// EFI_HEALTH_FLAGS\r
38/// Contains information generated by microcode, hardware, and/or the Itanium\r
39/// processor PAL code about the state of the processor upon reset.\r
40///\r
5879b875 41typedef union {\r
42 struct {\r
13c38031 43 ///\r
44 /// A 2-bit field indicating self-test state after reset.\r
45 ///\r
5879b875 46 UINT32 Status : 2;\r
13c38031 47 ///\r
48 /// A 1-bit field indicating whether testing has occurred.\r
49 /// If this field is zero, the processor has not been tested,\r
50 /// and no further fields in the self-test State parameter are valid.\r
51 ///\r
5879b875 52 UINT32 Tested : 1;\r
13c38031 53 ///\r
54 /// Reserved 13 bits.\r
55 ///\r
5879b875 56 UINT32 Reserved1 :13;\r
13c38031 57 ///\r
af2dc6a7 58 /// A 1-bit field. If set to 1, this indicates that virtual\r
13c38031 59 /// memory features are not available.\r
60 ///\r
5879b875 61 UINT32 VirtualMemoryUnavailable : 1;\r
13c38031 62 ///\r
af2dc6a7 63 /// A 1-bit field. If set to 1, this indicates that IA-32 execution\r
13c38031 64 /// is not available.\r
65 ///\r
5879b875 66 UINT32 Ia32ExecutionUnavailable : 1;\r
13c38031 67 ///\r
af2dc6a7 68 /// A 1-bit field. If set to 1, this indicates that the floating\r
13c38031 69 /// point unit is not available.\r
70 ///\r
5879b875 71 UINT32 FloatingPointUnavailable : 1;\r
13c38031 72 ///\r
af2dc6a7 73 /// A 1-bit field. If set to 1, this indicates miscellaneous\r
13c38031 74 /// functional failure other than vm, ia, or fp.\r
75 /// The test status field provides additional information on\r
76 /// test failures when the State field returns a value of\r
77 /// performance restricted or functionally restricted.\r
78 /// The value returned is implementation dependent.\r
79 ///\r
5879b875 80 UINT32 MiscFeaturesUnavailable : 1;\r
13c38031 81 ///\r
82 /// Reserved 12 bits.\r
83 ///\r
5879b875 84 UINT32 Reserved2 :12;\r
85 } Bits;\r
86 UINT32 Uint32;\r
87} EFI_HEALTH_FLAGS;\r
88\r
d936a70c 89#define NORMAL_BOOT_CALL 0x0\r
90#define RECOVERY_CHECK_CALL 0x3\r
91\r
53f32495 92typedef EFI_HEALTH_FLAGS X64_HANDOFF_STATUS;\r
93typedef EFI_HEALTH_FLAGS IA32_HANDOFF_STATUS;\r
94///\r
95/// The hand-off status structure for Itanium architecture.\r
96///\r
d936a70c 97typedef struct {\r
53f32495 98 ///\r
99 /// SALE_ENTRY state : 3 = Recovery_Check\r
100 /// and 0 = RESET or Normal_Boot phase.\r
101 ///\r
d936a70c 102 UINT8 BootPhase;\r
53f32495 103 ///\r
104 /// Firmware status on entry to SALE.\r
105 ///\r
d936a70c 106 UINT8 FWStatus;\r
107 UINT16 Reserved1;\r
108 UINT32 Reserved2;\r
53f32495 109 ///\r
110 /// Geographically significant unique processor ID assigned by PAL.\r
111 ///\r
d936a70c 112 UINT16 ProcId;\r
113 UINT16 Reserved3;\r
114 UINT8 IdMask;\r
115 UINT8 EidMask;\r
116 UINT16 Reserved4;\r
53f32495 117 ///\r
af2dc6a7 118 /// Address to make PAL calls.\r
53f32495 119 ///\r
d936a70c 120 UINT64 PalCallAddress;\r
53f32495 121 ///\r
122 /// If the entry state is RECOVERY_CHECK, this contains the PAL_RESET\r
123 /// return address, and if entry state is RESET, this contains\r
124 /// address for PAL_authentication call.\r
125 ///\r
d936a70c 126 UINT64 PalSpecialAddress;\r
53f32495 127 ///\r
af2dc6a7 128 /// GR35 from PALE_EXIT state.\r
53f32495 129 ///\r
d936a70c 130 UINT64 SelfTestStatus;\r
53f32495 131 ///\r
132 /// GR37 from PALE_EXIT state.\r
133 ///\r
d936a70c 134 UINT64 SelfTestControl;\r
135 UINT64 MemoryBufferRequired;\r
53f32495 136} ITANIUM_HANDOFF_STATUS;\r
d936a70c 137\r
13c38031 138///\r
af2dc6a7 139/// EFI_SEC_PLATFORM_INFORMATION_RECORD.\r
13c38031 140///\r
53f32495 141typedef union {\r
142 IA32_HANDOFF_STATUS IA32HealthFlags;\r
143 X64_HANDOFF_STATUS x64HealthFlags;\r
144 ITANIUM_HANDOFF_STATUS ItaniumHealthFlags;\r
5879b875 145} EFI_SEC_PLATFORM_INFORMATION_RECORD;\r
146\r
5879b875 147/**\r
148 This interface conveys state information out of the Security (SEC) phase into PEI.\r
149\r
13c38031 150 This service is published by the SEC phase. The SEC phase handoff has an optional\r
151 EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the\r
152 PEI Foundation. As such, if the platform supports the built-in self test (BIST) on IA-32 Intel\r
153 architecture or the PAL-A handoff state for Itanium architecture, this information is encapsulated\r
154 into the data structure abstracted by this service. This information is collected for the boot-strap\r
af2dc6a7 155 processor (BSP) on IA-32. For Itanium architecture, it is available on all processors that execute\r
13c38031 156 the PEI Foundation.\r
157\r
af2dc6a7 158 @param PeiServices The pointer to the PEI Services Table.\r
159 @param StructureSize The pointer to the variable describing size of the input buffer.\r
160 @param PlatformInformationRecord The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.\r
5879b875 161\r
13c38031 162 @retval EFI_SUCCESS The data was successfully returned.\r
53f32495 163 @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to\r
164 hold the record is returned in StructureSize.\r
5879b875 165\r
166**/\r
167typedef\r
168EFI_STATUS\r
8b13229b 169(EFIAPI *EFI_SEC_PLATFORM_INFORMATION)(\r
00edb218
A
170 IN CONST EFI_PEI_SERVICES **PeiServices,\r
171 IN OUT UINT64 *StructureSize,\r
172 OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord\r
5879b875 173);\r
174\r
175\r
13c38031 176///\r
1c8e0459
JF
177/// This service abstracts platform-specific information. It is necessary\r
178/// to convey this information to the PEI Foundation so that it can\r
13c38031 179/// discover where to begin dispatching PEIMs.\r
180///\r
5879b875 181struct _EFI_SEC_PLATFORM_INFORMATION_PPI {\r
182 EFI_SEC_PLATFORM_INFORMATION PlatformInformation;\r
183};\r
184\r
185\r
186extern EFI_GUID gEfiSecPlatformInformationPpiGuid;\r
187\r
188#endif\r