projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| e3aad9b3 | 1 | /** @file\r |
| 2 | EFI SMM Control2 Protocol as defined in the PI 1.2 specification.\r | |
| 3 | \r | |
| 4 | This protocol is used initiate synchronous SMI activations. This protocol could be published by a\r | |
| 5 | processor driver to abstract the SMI IPI or a driver which abstracts the ASIC that is supporting the\r | |
| 9095d37b | 6 | APM port. Because of the possibility of performing SMI IPI transactions, the ability to generate this\r |
| e3aad9b3 | 7 | event from a platform chipset agent is an optional capability for both IA-32 and x64-based systems.\r |
| 8 | \r | |
| 9095d37b LG |
9 | The EFI_SMM_CONTROL2_PROTOCOL is produced by a runtime driver. It provides an\r |
| 10 | abstraction of the platform hardware that generates an SMI. There are often I/O ports that, when\r | |
| 11 | accessed, will generate the SMI. Also, the hardware optionally supports the periodic generation of\r | |
| e3aad9b3 | 12 | these signals.\r |
| 13 | \r | |
| 9095d37b | 14 | Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r |
| 9344f092 | 15 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| e3aad9b3 | 16 | \r |
| 17 | **/\r | |
| 18 | \r | |
| 19 | #ifndef _SMM_CONTROL2_H_\r | |
| 20 | #define _SMM_CONTROL2_H_\r | |
| 21 | \r | |
| 2f208e59 | 22 | #include <Protocol/MmControl.h>\r |
| e3aad9b3 | 23 | \r |
| 2f88bd3a | 24 | #define EFI_SMM_CONTROL2_PROTOCOL_GUID EFI_MM_CONTROL_PROTOCOL_GUID\r |
| e3aad9b3 | 25 | \r |
| 2f208e59 | 26 | typedef EFI_MM_CONTROL_PROTOCOL EFI_SMM_CONTROL2_PROTOCOL;\r |
| 2f88bd3a | 27 | typedef EFI_MM_PERIOD EFI_SMM_PERIOD;\r |
| e3aad9b3 | 28 | \r |
| 2f208e59 | 29 | typedef EFI_MM_ACTIVATE EFI_SMM_ACTIVATE2;\r |
| e3aad9b3 | 30 | \r |
| 2f208e59 | 31 | typedef EFI_MM_DEACTIVATE EFI_SMM_DEACTIVATE2;\r |
| 2f88bd3a | 32 | extern EFI_GUID gEfiSmmControl2ProtocolGuid;\r |
| e3aad9b3 | 33 | \r |
| 34 | #endif\r |