add internal command header reference
[mirror_edk2.git] / MdePkg / Library / BaseLib / Ebc / CpuBreakpoint.c
CommitLineData
f1baef62 1/** @file\r
2 Base Library CPU Functions for EBC\r
3\r
4 Copyright (c) 2006, Intel Corporation<BR>\r
5 All rights reserved. This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
c6aa36b6 14//\r
15// Include common header file for this module.\r
16//\r
17#include <BaseLibInternals.h>\r
f1baef62 18\r
19extern\r
20UINT64\r
21_break (\r
22 CHAR8 BreakCode\r
23 );\r
24\r
25/**\r
26 Generates a breakpoint on the CPU.\r
27\r
28 Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
29 that code can resume normal execution after the breakpoint.\r
30\r
31**/\r
32VOID\r
33EFIAPI\r
34CpuBreakpoint (\r
35 VOID\r
36 )\r
37{\r
38 _break (3);\r
39}\r
40\r
41/**\r
42 Used to serialize load and store operations.\r
43\r
44 All loads and stores that proceed calls to this function are guaranteed to be\r
45 globally visible when this function returns.\r
46\r
47**/\r
48VOID\r
49EFIAPI\r
50MemoryFence (\r
51 VOID\r
52 )\r
53{\r
54}\r
55\r
56/**\r
57 Disables CPU interrupts.\r
58\r
59 Disables CPU interrupts.\r
60\r
61**/\r
62VOID\r
63EFIAPI\r
64DisableInterrupts (\r
65 VOID\r
66 )\r
67{\r
68 ASSERT (FALSE);\r
69}\r
70\r
71/**\r
72 Enables CPU interrupts.\r
73\r
74 Enables CPU interrupts.\r
75\r
76**/\r
77VOID\r
78EFIAPI\r
79EnableInterrupts (\r
80 VOID\r
81 )\r
82{\r
83 ASSERT (FALSE);\r
84}\r
85\r
86/**\r
87 Retrieves the current CPU interrupt state.\r
88\r
89 Retrieves the current CPU interrupt state. Returns TRUE is interrupts are\r
90 currently enabled. Otherwise returns FALSE.\r
91\r
92 @retval TRUE CPU interrupts are enabled.\r
93 @retval FALSE CPU interrupts are disabled.\r
94\r
95**/\r
96BOOLEAN\r
97EFIAPI\r
98GetInterruptState (\r
99 VOID\r
100 )\r
101{\r
102 ASSERT (FALSE);\r
103 return FALSE;\r
104}\r
105\r
106/**\r
107 Enables CPU interrupts for the smallest window required to capture any\r
108 pending interrupts.\r
109\r
110 Enables CPU interrupts for the smallest window required to capture any\r
111 pending interrupts.\r
112\r
113**/\r
114VOID\r
115EFIAPI\r
116EnableDisableInterrupts (\r
117 VOID\r
118 )\r
119{\r
120 EnableInterrupts ();\r
121 DisableInterrupts ();\r
122}\r
123\r
124/**\r
125 Requests CPU to pause for a short period of time.\r
126\r
127 Requests CPU to pause for a short period of time. Typically used in MP\r
128 systems to prevent memory starvation while waiting for a spin lock.\r
129\r
130**/\r
131VOID\r
132EFIAPI\r
133CpuPause (\r
134 VOID\r
135 )\r
136{\r
137}\r
138\r
139/**\r
140 Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r
141\r
142 Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r
143\r
144**/\r
145VOID\r
146EFIAPI\r
147CpuFlushTlb (\r
148 VOID\r
149 )\r
150{\r
151 ASSERT (FALSE);\r
152}\r
153\r
154/**\r
155 Places the CPU in a sleep state until an interrupt is received.\r
156\r
157 Places the CPU in a sleep state until an interrupt is received. If interrupts\r
158 are disabled prior to calling this function, then the CPU will be placed in a\r
159 sleep state indefinitely.\r
160\r
161**/\r
162VOID\r
163EFIAPI\r
164CpuSleep (\r
165 VOID\r
166 )\r
167{\r
168}\r