Initial import.
[mirror_edk2.git] / MdePkg / Library / BaseLib / Ipf / setjmp.s
CommitLineData
878ddf1f 1/// @file\r
2/// Contains an implementation of setjmp and longjmp for the\r
3/// Itanium-based architecture.\r
4///\r
5/// Copyright (c) 2006, Intel Corporation \r
6/// All rights reserved. This program and the accompanying materials \r
7/// are licensed and made available under the terms and conditions of the BSD License \r
8/// which accompanies this distribution. The full text of the license may be found at \r
9/// http://opensource.org/licenses/bsd-license.php \r
10/// \r
11/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
12/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
13/// \r
14/// Module Name: setjmp.s\r
15///\r
16///\r
17\r
18 .file "setjmp.s"\r
19\r
20#include "asm.h"\r
21#include "ia_64gen.h"\r
22\r
23/// int SetJump(struct jmp_buffer save)\r
24///\r
25/// Setup a non-local goto.\r
26///\r
27/// Description:\r
28///\r
29/// SetJump stores the current register set in the area pointed to\r
30/// by "save". It returns zero. Subsequent calls to "LongJump" will\r
31/// restore the registers and return non-zero to the same location.\r
32///\r
33/// On entry, r32 contains the pointer to the jmp_buffer\r
34///\r
35\r
36PROCEDURE_ENTRY(SetJump)\r
37 //\r
38 // Make sure buffer is aligned at 16byte boundary\r
39 //\r
40 mov r32 = r33 \r
41\r
42 add r10 = -0x10,r0 ;; // mask the lower 4 bits\r
43 and r32 = r32, r10;; \r
44 add r32 = 0x10, r32;; // move to next 16 byte boundary\r
45\r
46 add r10 = J_PREDS, r32 // skip Unats & pfs save area\r
47 add r11 = J_BSP, r32\r
48 //\r
49 // save immediate context\r
50 //\r
51 mov r2 = ar.bsp // save backing store pointer\r
52 mov r3 = pr // save predicates\r
53 ;;\r
54 //\r
55 // save user Unat register\r
56 //\r
57 mov r16 = ar.lc // save loop count register\r
58 mov r14 = ar.unat // save user Unat register\r
59\r
60 st8 [r10] = r3, J_LC-J_PREDS\r
61 st8 [r11] = r2, J_R4-J_BSP\r
62 ;;\r
63 st8 [r10] = r16, J_R5-J_LC\r
64 st8 [r32] = r14, J_NATS // Note: Unat at the \r
65 // beginning of the save area\r
66 mov r15 = ar.pfs\r
67 ;;\r
68 //\r
69 // save preserved general registers & NaT's\r
70 //\r
71 st8.spill [r11] = r4, J_R6-J_R4\r
72 ;;\r
73 st8.spill [r10] = r5, J_R7-J_R5 \r
74 ;;\r
75 st8.spill [r11] = r6, J_SP-J_R6\r
76 ;;\r
77 st8.spill [r10] = r7, J_F3-J_R7 \r
78 ;;\r
79 st8.spill [r11] = sp, J_F2-J_SP\r
80 ;;\r
81 //\r
82 // save spilled Unat and pfs registers\r
83 //\r
84 mov r2 = ar.unat // save Unat register after spill\r
85 ;;\r
86 st8 [r32] = r2, J_PFS-J_NATS // save unat for spilled regs\r
87 ;;\r
88 st8 [r32] = r15 // save pfs\r
89 //\r
90 // save floating registers \r
91 //\r
92 stf.spill [r11] = f2, J_F4-J_F2\r
93 stf.spill [r10] = f3, J_F5-J_F3 \r
94 ;;\r
95 stf.spill [r11] = f4, J_F16-J_F4\r
96 stf.spill [r10] = f5, J_F17-J_F5 \r
97 ;;\r
98 stf.spill [r11] = f16, J_F18-J_F16\r
99 stf.spill [r10] = f17, J_F19-J_F17 \r
100 ;;\r
101 stf.spill [r11] = f18, J_F20-J_F18\r
102 stf.spill [r10] = f19, J_F21-J_F19 \r
103 ;;\r
104 stf.spill [r11] = f20, J_F22-J_F20\r
105 stf.spill [r10] = f21, J_F23-J_F21 \r
106 ;;\r
107 stf.spill [r11] = f22, J_F24-J_F22\r
108 stf.spill [r10] = f23, J_F25-J_F23 \r
109 ;;\r
110 stf.spill [r11] = f24, J_F26-J_F24\r
111 stf.spill [r10] = f25, J_F27-J_F25 \r
112 ;;\r
113 stf.spill [r11] = f26, J_F28-J_F26\r
114 stf.spill [r10] = f27, J_F29-J_F27 \r
115 ;;\r
116 stf.spill [r11] = f28, J_F30-J_F28\r
117 stf.spill [r10] = f29, J_F31-J_F29 \r
118 ;;\r
119 stf.spill [r11] = f30, J_FPSR-J_F30\r
120 stf.spill [r10] = f31, J_B0-J_F31 // size of f31 + fpsr\r
121 //\r
122 // save FPSR register & branch registers\r
123 //\r
124 mov r2 = ar.fpsr // save fpsr register\r
125 mov r3 = b0 \r
126 ;;\r
127 st8 [r11] = r2, J_B1-J_FPSR\r
128 st8 [r10] = r3, J_B2-J_B0\r
129 mov r2 = b1\r
130 mov r3 = b2 \r
131 ;;\r
132 st8 [r11] = r2, J_B3-J_B1\r
133 st8 [r10] = r3, J_B4-J_B2\r
134 mov r2 = b3\r
135 mov r3 = b4 \r
136 ;;\r
137 st8 [r11] = r2, J_B5-J_B3\r
138 st8 [r10] = r3\r
139 mov r2 = b5 \r
140 ;;\r
141 st8 [r11] = r2\r
142 ;;\r
143 //\r
144 // return\r
145 //\r
146 mov r8 = r0 // return 0 from setjmp\r
147 mov ar.unat = r14 // restore unat\r
148 br.ret.sptk b0\r
149\r
150PROCEDURE_EXIT(SetJump)\r
151\r
152\r
153//\r
154// void LongJump(struct jmp_buffer *)\r
155//\r
156// Perform a non-local goto.\r
157//\r
158// Description:\r
159//\r
160// LongJump initializes the register set to the values saved by a\r
161// previous 'SetJump' and jumps to the return location saved by that\r
162// 'SetJump'. This has the effect of unwinding the stack and returning\r
163// for a second time to the 'SetJump'.\r
164//\r
165\r
166PROCEDURE_ENTRY(LongJump)\r
167 //\r
168 // Make sure buffer is aligned at 16byte boundary\r
169 //\r
170 mov r32 = r33 \r
171\r
172 add r10 = -0x10,r0 ;; // mask the lower 4 bits\r
173 and r32 = r32, r10;; \r
174 add r32 = 0x10, r32;; // move to next 16 byte boundary\r
175\r
176 //\r
177 // caching the return value as we do invala in the end\r
178 //\r
179/// mov r8 = r33 // return value\r
180 mov r8 = 1 // For now return hard coded 1\r
181\r
182 //\r
183 // get immediate context\r
184 //\r
185 mov r14 = ar.rsc // get user RSC conf \r
186 add r10 = J_PFS, r32 // get address of pfs\r
187 add r11 = J_NATS, r32\r
188 ;;\r
189 ld8 r15 = [r10], J_BSP-J_PFS // get pfs\r
190 ld8 r2 = [r11], J_LC-J_NATS // get unat for spilled regs\r
191 ;;\r
192 mov ar.unat = r2\r
193 ;;\r
194 ld8 r16 = [r10], J_PREDS-J_BSP // get backing store pointer\r
195 mov ar.rsc = r0 // put RSE in enforced lazy \r
196 mov ar.pfs = r15\r
197 ;;\r
198 \r
199 //\r
200 // while returning from longjmp the BSPSTORE and BSP needs to be\r
201 // same and discard all the registers allocated after we did\r
202 // setjmp. Also, we need to generate the RNAT register since we\r
203 // did not flushed the RSE on setjmp.\r
204 //\r
205 mov r17 = ar.bspstore // get current BSPSTORE\r
206 ;;\r
207 cmp.ltu p6,p7 = r17, r16 // is it less than BSP of \r
208(p6) br.spnt.few .flush_rse\r
209 mov r19 = ar.rnat // get current RNAT\r
210 ;;\r
211 loadrs // invalidate dirty regs\r
212 br.sptk.many .restore_rnat // restore RNAT\r
213\r
214.flush_rse:\r
215 flushrs\r
216 ;;\r
217 mov r19 = ar.rnat // get current RNAT\r
218 mov r17 = r16 // current BSPSTORE\r
219 ;;\r
220.restore_rnat:\r
221 //\r
222 // check if RNAT is saved between saved BSP and curr BSPSTORE\r
223 //\r
224 dep r18 = 1,r16,3,6 // get RNAT address\r
225 ;;\r
226 cmp.ltu p8,p9 = r18, r17 // RNAT saved on RSE\r
227 ;;\r
228(p8) ld8 r19 = [r18] // get RNAT from RSE\r
229 ;;\r
230 mov ar.bspstore = r16 // set new BSPSTORE \r
231 ;;\r
232 mov ar.rnat = r19 // restore RNAT\r
233 mov ar.rsc = r14 // restore RSC conf\r
234\r
235\r
236 ld8 r3 = [r11], J_R4-J_LC // get lc register\r
237 ld8 r2 = [r10], J_R5-J_PREDS // get predicates\r
238 ;;\r
239 mov pr = r2, -1\r
240 mov ar.lc = r3\r
241 //\r
242 // restore preserved general registers & NaT's\r
243 //\r
244 ld8.fill r4 = [r11], J_R6-J_R4\r
245 ;;\r
246 ld8.fill r5 = [r10], J_R7-J_R5 \r
247 ld8.fill r6 = [r11], J_SP-J_R6\r
248 ;;\r
249 ld8.fill r7 = [r10], J_F2-J_R7\r
250 ld8.fill sp = [r11], J_F3-J_SP\r
251 ;;\r
252 //\r
253 // restore floating registers \r
254 //\r
255 ldf.fill f2 = [r10], J_F4-J_F2\r
256 ldf.fill f3 = [r11], J_F5-J_F3 \r
257 ;;\r
258 ldf.fill f4 = [r10], J_F16-J_F4\r
259 ldf.fill f5 = [r11], J_F17-J_F5 \r
260 ;;\r
261 ldf.fill f16 = [r10], J_F18-J_F16\r
262 ldf.fill f17 = [r11], J_F19-J_F17\r
263 ;;\r
264 ldf.fill f18 = [r10], J_F20-J_F18\r
265 ldf.fill f19 = [r11], J_F21-J_F19\r
266 ;;\r
267 ldf.fill f20 = [r10], J_F22-J_F20\r
268 ldf.fill f21 = [r11], J_F23-J_F21\r
269 ;;\r
270 ldf.fill f22 = [r10], J_F24-J_F22\r
271 ldf.fill f23 = [r11], J_F25-J_F23 \r
272 ;;\r
273 ldf.fill f24 = [r10], J_F26-J_F24\r
274 ldf.fill f25 = [r11], J_F27-J_F25\r
275 ;;\r
276 ldf.fill f26 = [r10], J_F28-J_F26\r
277 ldf.fill f27 = [r11], J_F29-J_F27\r
278 ;;\r
279 ldf.fill f28 = [r10], J_F30-J_F28\r
280 ldf.fill f29 = [r11], J_F31-J_F29 \r
281 ;;\r
282 ldf.fill f30 = [r10], J_FPSR-J_F30\r
283 ldf.fill f31 = [r11], J_B0-J_F31 ;;\r
284\r
285 //\r
286 // restore branch registers and fpsr\r
287 //\r
288 ld8 r16 = [r10], J_B1-J_FPSR // get fpsr\r
289 ld8 r17 = [r11], J_B2-J_B0 // get return pointer\r
290 ;;\r
291 mov ar.fpsr = r16\r
292 mov b0 = r17\r
293 ld8 r2 = [r10], J_B3-J_B1\r
294 ld8 r3 = [r11], J_B4-J_B2\r
295 ;;\r
296 mov b1 = r2\r
297 mov b2 = r3\r
298 ld8 r2 = [r10], J_B5-J_B3\r
299 ld8 r3 = [r11]\r
300 ;;\r
301 mov b3 = r2\r
302 mov b4 = r3 \r
303 ld8 r2 = [r10]\r
304 ld8 r21 = [r32] // get user unat\r
305 ;;\r
306 mov b5 = r2\r
307 mov ar.unat = r21\r
308\r
309 //\r
310 // invalidate ALAT\r
311 //\r
312 invala ;;\r
313\r
314 br.ret.sptk b0\r
315PROCEDURE_EXIT(LongJump)\r
316\r
317\r