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1 | //------------------------------------------------------------------------------\r |
2 | //\r | |
3 | // CPU scratch register related functions for RISC-V\r | |
4 | //\r | |
5 | // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r | |
6 | //\r | |
7 | // SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
8 | //\r | |
9 | //------------------------------------------------------------------------------\r | |
10 | \r | |
11 | #include <Register/RiscV64/RiscVImpl.h>\r | |
12 | \r | |
13 | .data\r | |
14 | .align 3\r | |
15 | .section .text\r | |
16 | \r | |
17 | //\r | |
18 | // Set Supervisor mode scratch.\r | |
19 | // @param a0 : Value set to Supervisor mode scratch\r | |
20 | //\r | |
21 | ASM_FUNC (RiscVSetSupervisorScratch)\r | |
22 | csrw CSR_SSCRATCH, a0\r | |
23 | ret\r | |
24 | \r | |
25 | //\r | |
26 | // Get Supervisor mode scratch.\r | |
27 | // @retval a0 : Value in Supervisor mode scratch\r | |
28 | //\r | |
29 | ASM_FUNC (RiscVGetSupervisorScratch)\r | |
30 | csrr a0, CSR_SSCRATCH\r | |
31 | ret\r |