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1;------------------------------------------------------------------------------\r
2;\r
d3febfd9 3; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>\r
9344f092 4; SPDX-License-Identifier: BSD-2-Clause-Patent\r
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5;\r
6; Module Name:\r
7;\r
8; DisablePaging64.Asm\r
9;\r
10; Abstract:\r
11;\r
12; AsmDisablePaging64 function\r
13;\r
14; Notes:\r
15;\r
16;------------------------------------------------------------------------------\r
17\r
18 DEFAULT REL\r
19 SECTION .text\r
20\r
21;------------------------------------------------------------------------------\r
22; VOID\r
23; EFIAPI\r
24; InternalX86DisablePaging64 (\r
25; IN UINT16 Cs,\r
26; IN UINT32 EntryPoint,\r
27; IN UINT32 Context1, OPTIONAL\r
28; IN UINT32 Context2, OPTIONAL\r
29; IN UINT32 NewStack\r
30; );\r
31;------------------------------------------------------------------------------\r
32global ASM_PFX(InternalX86DisablePaging64)\r
33ASM_PFX(InternalX86DisablePaging64):\r
34 cli\r
35 lea rsi, [.0] ; rsi <- The start address of transition code\r
36 mov edi, [rsp + 0x28] ; rdi <- New stack\r
37 lea rax, [mTransitionEnd] ; rax <- end of transition code\r
38 sub rax, rsi ; rax <- The size of transition piece code\r
39 add rax, 4 ; Round RAX up to the next 4 byte boundary\r
40 and al, 0xfc\r
41 sub rdi, rax ; rdi <- Use stack to hold transition code\r
42 mov r10d, edi ; r10 <- The start address of transicition code below 4G\r
43 push rcx ; save rcx to stack\r
44 mov rcx, rax ; rcx <- The size of transition piece code\r
45 rep movsb ; copy transition code to top of new stack which must be below 4GB\r
46 pop rcx ; restore rcx\r
47\r
48 mov esi, r8d\r
49 mov edi, r9d\r
50 mov eax, r10d ; eax <- start of the transition code on the stack\r
51 sub eax, 4 ; eax <- One slot below transition code on the stack\r
52 push rcx ; push Cs to stack\r
53 push r10 ; push address of tansition code on stack\r
d3febfd9 54 retfq\r
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55\r
56; Start of transition code\r
57.0:\r
58 mov esp, eax ; set up new stack\r
59 mov rax, cr0\r
60 btr eax, 31 ; Clear CR0.PG\r
61 mov cr0, rax ; disable paging and caches\r
62\r
63 mov ebx, edx ; save EntryPoint to rbx, for rdmsr will overwrite rdx\r
64 mov ecx, 0xc0000080\r
65 rdmsr\r
66 and ah, ~ 1 ; clear LME\r
67 wrmsr\r
68 mov rax, cr4\r
69 and al, ~ (1 << 5) ; clear PAE\r
70 mov cr4, rax\r
71 push rdi ; push Context2\r
72 push rsi ; push Context1\r
73 call rbx ; transfer control to EntryPoint\r
74 hlt ; no one should get here\r
75\r
76mTransitionEnd:\r
77\r