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f1baef62 | 1 | /** @file\r |
2 | CpuBreakpoint function.\r | |
3 | \r | |
dc4d4230 | 4 | Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>\r |
9344f092 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
f1baef62 | 6 | \r |
7 | **/\r | |
8 | \r | |
42eedea9 | 9 | /**\r |
10 | Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.\r | |
11 | **/\r | |
7e43ed89 | 12 | \r |
dc4d4230 DB |
13 | #include <Library/RegisterFilterLib.h>\r |
14 | \r | |
f1baef62 | 15 | unsigned __int64 __readmsr (int register);\r |
16 | \r | |
17 | #pragma intrinsic(__readmsr)\r | |
18 | \r | |
42eedea9 | 19 | /**\r |
20 | Read data to MSR.\r | |
21 | \r | |
22 | @param Index Register index of MSR.\r | |
23 | \r | |
24 | @return Value read from MSR.\r | |
25 | \r | |
26 | **/\r | |
f1baef62 | 27 | UINT64\r |
28 | EFIAPI\r | |
29 | AsmReadMsr64 (\r | |
30 | IN UINT32 Index\r | |
31 | )\r | |
32 | {\r | |
dc4d4230 DB |
33 | UINT64 Value;\r |
34 | BOOLEAN Flag;\r | |
35 | \r | |
36 | Flag = FilterBeforeMsrRead (Index, &Value);\r | |
37 | if (Flag) {\r | |
38 | Value = __readmsr (Index);\r | |
39 | }\r | |
40 | FilterAfterMsrRead (Index, &Value);\r | |
41 | \r | |
42 | return Value;\r | |
f1baef62 | 43 | }\r |
44 | \r |