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1 | ;------------------------------------------------------------------------------\r |
2 | ;\r | |
3 | ; Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>\r | |
4 | ;\r | |
5 | ; This program and the accompanying materials are licensed and made available\r | |
6 | ; under the terms and conditions of the BSD License which accompanies this\r | |
7 | ; distribution. The full text of the license may be found at\r | |
8 | ; http://opensource.org/licenses/bsd-license.php\r | |
9 | ;\r | |
10 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | ;\r | |
13 | ;------------------------------------------------------------------------------\r | |
14 | \r | |
15 | EXPORT InternalMemZeroMem\r | |
16 | EXPORT InternalMemSetMem\r | |
17 | EXPORT InternalMemSetMem16\r | |
18 | EXPORT InternalMemSetMem32\r | |
19 | EXPORT InternalMemSetMem64\r | |
20 | \r | |
21 | AREA SetMem, CODE, READONLY, CODEALIGN, ALIGN=5\r | |
22 | THUMB\r | |
23 | \r | |
24 | InternalMemZeroMem\r | |
25 | movs r2, #0\r | |
26 | \r | |
27 | InternalMemSetMem\r | |
28 | uxtb r2, r2\r | |
29 | orr r2, r2, r2, lsl #8\r | |
30 | \r | |
31 | InternalMemSetMem16\r | |
32 | uxth r2, r2\r | |
33 | orr r2, r2, r2, lsr #16\r | |
34 | \r | |
35 | InternalMemSetMem32\r | |
36 | mov r3, r2\r | |
37 | \r | |
38 | InternalMemSetMem64\r | |
39 | push {r4, lr}\r | |
40 | cmp r1, #16 ; fewer than 16 bytes of input?\r | |
41 | add r1, r1, r0 ; r1 := dst + length\r | |
42 | add lr, r0, #16\r | |
43 | blt L2\r | |
44 | bic lr, lr, #15 ; align output pointer\r | |
45 | \r | |
46 | str r2, [r0] ; potentially unaligned store of 4 bytes\r | |
47 | str r3, [r0, #4] ; potentially unaligned store of 4 bytes\r | |
48 | str r2, [r0, #8] ; potentially unaligned store of 4 bytes\r | |
49 | str r3, [r0, #12] ; potentially unaligned store of 4 bytes\r | |
50 | beq L1\r | |
51 | \r | |
52 | L0\r | |
53 | add lr, lr, #16 ; advance the output pointer by 16 bytes\r | |
54 | subs r4, r1, lr ; past the output?\r | |
55 | blt L3 ; break out of the loop\r | |
56 | strd r2, r3, [lr, #-16] ; aligned store of 16 bytes\r | |
57 | strd r2, r3, [lr, #-8]\r | |
58 | bne L0 ; goto beginning of loop\r | |
59 | L1\r | |
60 | pop {r4, pc}\r | |
61 | \r | |
62 | L2\r | |
63 | subs r4, r1, lr\r | |
64 | L3\r | |
65 | adds r4, r4, #16\r | |
66 | subs r1, r1, #8\r | |
67 | cmp r4, #4 ; between 4 and 15 bytes?\r | |
68 | blt L4\r | |
69 | cmp r4, #8 ; between 8 and 15 bytes?\r | |
70 | str r2, [lr, #-16] ; overlapping store of 4 + (4 + 4) + 4 bytes\r | |
71 | itt gt\r | |
72 | strgt r3, [lr, #-12]\r | |
73 | strgt r2, [r1]\r | |
74 | str r3, [r1, #4]\r | |
75 | pop {r4, pc}\r | |
76 | \r | |
77 | L4\r | |
78 | cmp r4, #2 ; 2 or 3 bytes?\r | |
79 | strb r2, [lr, #-16] ; store 1 byte\r | |
80 | it ge\r | |
81 | strhge r2, [r1, #6] ; store 2 bytes\r | |
82 | pop {r4, pc}\r | |
83 | \r | |
84 | END\r |