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ba9f8351 1/** @file\r
2 I/O Library instance based on EFI_CPU_IO2_PROTOCOL.\r
3 \r
4 Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials are licensed and made available\r
6 under the terms and conditions of the BSD License which accompanies this\r
7 distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php.\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "DxeCpuIo2LibInternal.h"\r
16\r
17//\r
18// Globle varible to cache pointer to CpuIo2 protocol.\r
19//\r
20EFI_CPU_IO2_PROTOCOL *mCpuIo = NULL;\r
21\r
22/**\r
23 The constructor function caches the pointer to CpuIo2 protocol.\r
24\r
25 The constructor function locates CpuIo2 protocol from protocol database.\r
26 It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.\r
27\r
28 @param ImageHandle The firmware allocated handle for the EFI image.\r
29 @param SystemTable A pointer to the EFI System Table.\r
30\r
31 @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r
32\r
33**/\r
34EFI_STATUS\r
35EFIAPI\r
36IoLibConstructor (\r
37 IN EFI_HANDLE ImageHandle,\r
38 IN EFI_SYSTEM_TABLE *SystemTable\r
39 )\r
40{\r
41 EFI_STATUS Status;\r
42\r
43 Status = gBS->LocateProtocol (&gEfiCpuIo2ProtocolGuid, NULL, (VOID **) &mCpuIo);\r
44 ASSERT_EFI_ERROR (Status);\r
45\r
46 return Status;\r
47}\r
48\r
49/**\r
50 Reads registers in the EFI CPU I/O space.\r
51\r
52 Reads the I/O port specified by Port with registers width specified by Width.\r
53 The read value is returned. If such operations are not supported, then ASSERT().\r
54 This function must guarantee that all I/O read and write operations are serialized.\r
55\r
56 @param Port The base address of the I/O operation.\r
57 The caller is responsible for aligning the Address if required.\r
58 @param Width The width of the I/O operation.\r
59\r
60 @return Data read from registers in the EFI CPU I/O space.\r
61\r
62**/\r
63UINT64\r
64EFIAPI\r
65IoReadWorker (\r
66 IN UINTN Port,\r
67 IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
68 )\r
69{\r
70 EFI_STATUS Status;\r
71 UINT64 Data;\r
72\r
73 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r
74 ASSERT_EFI_ERROR (Status);\r
75\r
76 return Data;\r
77}\r
78\r
79/**\r
80 Writes registers in the EFI CPU I/O space.\r
81\r
82 Writes the I/O port specified by Port with registers width and value specified by Width\r
83 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
84 This function must guarantee that all I/O read and write operations are serialized.\r
85\r
86 @param Port The base address of the I/O operation.\r
87 The caller is responsible for aligning the Address if required.\r
88 @param Width The width of the I/O operation.\r
89 @param Data The value to write to the I/O port.\r
90\r
a750b4ae 91 @return The parameter of Data.\r
ba9f8351 92\r
93**/\r
94UINT64\r
95EFIAPI\r
96IoWriteWorker (\r
97 IN UINTN Port,\r
98 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
99 IN UINT64 Data\r
100 )\r
101{\r
102 EFI_STATUS Status;\r
103\r
104 Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r
105 ASSERT_EFI_ERROR (Status);\r
106\r
107 return Data;\r
108}\r
109\r
110/**\r
111 Reads memory-mapped registers in the EFI system memory space.\r
112\r
113 Reads the MMIO registers specified by Address with registers width specified by Width.\r
114 The read value is returned. If such operations are not supported, then ASSERT().\r
115 This function must guarantee that all MMIO read and write operations are serialized.\r
116\r
117 @param Address The MMIO register to read.\r
118 The caller is responsible for aligning the Address if required.\r
119 @param Width The width of the I/O operation.\r
120\r
121 @return Data read from registers in the EFI system memory space.\r
122\r
123**/\r
124UINT64\r
125EFIAPI\r
126MmioReadWorker (\r
127 IN UINTN Address,\r
128 IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
129 )\r
130{\r
131 EFI_STATUS Status;\r
132 UINT64 Data;\r
133\r
134 Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r
135 ASSERT_EFI_ERROR (Status);\r
136\r
137 return Data;\r
138}\r
139\r
140/**\r
141 Writes memory-mapped registers in the EFI system memory space.\r
142\r
143 Writes the MMIO registers specified by Address with registers width and value specified by Width\r
144 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
145 This function must guarantee that all MMIO read and write operations are serialized.\r
146\r
147 @param Address The MMIO register to read.\r
148 The caller is responsible for aligning the Address if required.\r
149 @param Width The width of the I/O operation.\r
150 @param Data The value to write to the I/O port.\r
151 \r
152 @return Data read from registers in the EFI system memory space.\r
153\r
154**/\r
155UINT64\r
156EFIAPI\r
157MmioWriteWorker (\r
158 IN UINTN Address,\r
159 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
160 IN UINT64 Data\r
161 )\r
162{\r
163 EFI_STATUS Status;\r
164\r
165 Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r
166 ASSERT_EFI_ERROR (Status);\r
167\r
168 return Data;\r
169}\r
170\r
171/**\r
172 Reads an 8-bit I/O port.\r
173\r
174 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
175 This function must guarantee that all I/O read and write operations are\r
176 serialized.\r
177\r
178 If 8-bit I/O port operations are not supported, then ASSERT().\r
179\r
180 @param Port The I/O port to read.\r
181\r
182 @return The value read.\r
183\r
184**/\r
185UINT8\r
186EFIAPI\r
187IoRead8 (\r
188 IN UINTN Port\r
189 )\r
190{\r
191 return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r
192}\r
193\r
194/**\r
195 Writes an 8-bit I/O port.\r
196\r
197 Writes the 8-bit I/O port specified by Port with the value specified by Value\r
198 and returns Value. This function must guarantee that all I/O read and write\r
199 operations are serialized.\r
200\r
201 If 8-bit I/O port operations are not supported, then ASSERT().\r
202\r
203 @param Port The I/O port to write.\r
204 @param Value The value to write to the I/O port.\r
205\r
206 @return The value written the I/O port.\r
207\r
208**/\r
209UINT8\r
210EFIAPI\r
211IoWrite8 (\r
212 IN UINTN Port,\r
213 IN UINT8 Value\r
214 )\r
215{\r
216 return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r
217}\r
218\r
219/**\r
220 Reads a 16-bit I/O port.\r
221\r
222 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
223 This function must guarantee that all I/O read and write operations are\r
224 serialized.\r
225\r
226 If Port is not aligned on a 16-bit boundary, then ASSERT().\r
227 \r
228 If 16-bit I/O port operations are not supported, then ASSERT().\r
229\r
230 @param Port The I/O port to read.\r
231\r
232 @return The value read.\r
233\r
234**/\r
235UINT16\r
236EFIAPI\r
237IoRead16 (\r
238 IN UINTN Port\r
239 )\r
240{\r
241 //\r
242 // Make sure Port is aligned on a 16-bit boundary.\r
243 //\r
244 ASSERT ((Port & 1) == 0);\r
245 return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r
246}\r
247\r
248/**\r
249 Writes a 16-bit I/O port.\r
250\r
251 Writes the 16-bit I/O port specified by Port with the value specified by Value\r
252 and returns Value. This function must guarantee that all I/O read and write\r
253 operations are serialized.\r
254\r
255 If Port is not aligned on a 16-bit boundary, then ASSERT().\r
256\r
257 If 16-bit I/O port operations are not supported, then ASSERT().\r
258\r
259 @param Port The I/O port to write.\r
260 @param Value The value to write to the I/O port.\r
261\r
262 @return The value written the I/O port.\r
263\r
264**/\r
265UINT16\r
266EFIAPI\r
267IoWrite16 (\r
268 IN UINTN Port,\r
269 IN UINT16 Value\r
270 )\r
271{\r
272 //\r
273 // Make sure Port is aligned on a 16-bit boundary.\r
274 //\r
275 ASSERT ((Port & 1) == 0);\r
276 return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r
277}\r
278\r
279/**\r
280 Reads a 32-bit I/O port.\r
281\r
282 Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
283 This function must guarantee that all I/O read and write operations are\r
284 serialized.\r
285 \r
286 If Port is not aligned on a 32-bit boundary, then ASSERT().\r
287\r
288 If 32-bit I/O port operations are not supported, then ASSERT().\r
289\r
290 @param Port The I/O port to read.\r
291\r
292 @return The value read.\r
293\r
294**/\r
295UINT32\r
296EFIAPI\r
297IoRead32 (\r
298 IN UINTN Port\r
299 )\r
300{\r
301 //\r
302 // Make sure Port is aligned on a 32-bit boundary.\r
303 //\r
304 ASSERT ((Port & 3) == 0);\r
305 return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r
306}\r
307\r
308/**\r
309 Writes a 32-bit I/O port.\r
310\r
311 Writes the 32-bit I/O port specified by Port with the value specified by Value\r
312 and returns Value. This function must guarantee that all I/O read and write\r
313 operations are serialized.\r
314\r
315 If Port is not aligned on a 32-bit boundary, then ASSERT().\r
316\r
317 If 32-bit I/O port operations are not supported, then ASSERT().\r
318\r
319 @param Port The I/O port to write.\r
320 @param Value The value to write to the I/O port.\r
321\r
322 @return The value written the I/O port.\r
323\r
324**/\r
325UINT32\r
326EFIAPI\r
327IoWrite32 (\r
328 IN UINTN Port,\r
329 IN UINT32 Value\r
330 )\r
331{\r
332 //\r
333 // Make sure Port is aligned on a 32-bit boundary.\r
334 //\r
335 ASSERT ((Port & 3) == 0);\r
336 return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r
337}\r
338\r
339/**\r
340 Reads a 64-bit I/O port.\r
341\r
342 Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r
343 This function must guarantee that all I/O read and write operations are\r
344 serialized.\r
345\r
346 If Port is not aligned on a 64-bit boundary, then ASSERT().\r
347\r
348 If 64-bit I/O port operations are not supported, then ASSERT().\r
349\r
350 @param Port The I/O port to read.\r
351\r
352 @return The value read.\r
353\r
354**/\r
355UINT64\r
356EFIAPI\r
357IoRead64 (\r
358 IN UINTN Port\r
359 )\r
360{\r
361 //\r
362 // Make sure Port is aligned on a 64-bit boundary.\r
363 //\r
364 ASSERT ((Port & 7) == 0);\r
365 return IoReadWorker (Port, EfiCpuIoWidthUint64);\r
366}\r
367\r
368/**\r
369 Writes a 64-bit I/O port.\r
370\r
371 Writes the 64-bit I/O port specified by Port with the value specified by Value\r
372 and returns Value. This function must guarantee that all I/O read and write\r
373 operations are serialized.\r
374\r
375 If Port is not aligned on a 64-bit boundary, then ASSERT().\r
376 \r
377 If 64-bit I/O port operations are not supported, then ASSERT().\r
378\r
379 @param Port The I/O port to write.\r
380 @param Value The value to write to the I/O port.\r
381\r
382 @return The value written the I/O port.\r
383\r
384**/\r
385UINT64\r
386EFIAPI\r
387IoWrite64 (\r
388 IN UINTN Port,\r
389 IN UINT64 Value\r
390 )\r
391{\r
392 //\r
393 // Make sure Port is aligned on a 64-bit boundary.\r
394 //\r
395 ASSERT ((Port & 7) == 0);\r
396 return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r
397}\r
398\r
399/**\r
400 Reads an 8-bit MMIO register.\r
401\r
402 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
403 returned. This function must guarantee that all MMIO read and write\r
404 operations are serialized.\r
405\r
406 If 8-bit MMIO register operations are not supported, then ASSERT().\r
407\r
408 @param Address The MMIO register to read.\r
409\r
410 @return The value read.\r
411\r
412**/\r
413UINT8\r
414EFIAPI\r
415MmioRead8 (\r
416 IN UINTN Address\r
417 )\r
418{\r
419 return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r
420}\r
421\r
422/**\r
423 Writes an 8-bit MMIO register.\r
424\r
425 Writes the 8-bit MMIO register specified by Address with the value specified\r
426 by Value and returns Value. This function must guarantee that all MMIO read\r
427 and write operations are serialized.\r
428\r
429 If 8-bit MMIO register operations are not supported, then ASSERT().\r
430\r
431 @param Address The MMIO register to write.\r
432 @param Value The value to write to the MMIO register.\r
433\r
434**/\r
435UINT8\r
436EFIAPI\r
437MmioWrite8 (\r
438 IN UINTN Address,\r
439 IN UINT8 Value\r
440 )\r
441{\r
442 return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r
443}\r
444\r
445/**\r
446 Reads a 16-bit MMIO register.\r
447\r
448 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
449 returned. This function must guarantee that all MMIO read and write\r
450 operations are serialized.\r
451\r
452 If Address is not aligned on a 16-bit boundary, then ASSERT().\r
453 \r
454 If 16-bit MMIO register operations are not supported, then ASSERT().\r
455\r
456 @param Address The MMIO register to read.\r
457\r
458 @return The value read.\r
459\r
460**/\r
461UINT16\r
462EFIAPI\r
463MmioRead16 (\r
464 IN UINTN Address\r
465 )\r
466{\r
467 //\r
468 // Make sure Address is aligned on a 16-bit boundary.\r
469 //\r
470 ASSERT ((Address & 1) == 0);\r
471 return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r
472}\r
473\r
474/**\r
475 Writes a 16-bit MMIO register.\r
476\r
477 Writes the 16-bit MMIO register specified by Address with the value specified\r
478 by Value and returns Value. This function must guarantee that all MMIO read\r
479 and write operations are serialized.\r
480\r
481 If Address is not aligned on a 16-bit boundary, then ASSERT().\r
482 \r
483 If 16-bit MMIO register operations are not supported, then ASSERT().\r
484\r
485 @param Address The MMIO register to write.\r
486 @param Value The value to write to the MMIO register.\r
487\r
488**/\r
489UINT16\r
490EFIAPI\r
491MmioWrite16 (\r
492 IN UINTN Address,\r
493 IN UINT16 Value\r
494 )\r
495{\r
496 //\r
497 // Make sure Address is aligned on a 16-bit boundary.\r
498 //\r
499 ASSERT ((Address & 1) == 0);\r
500 return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r
501}\r
502\r
503/**\r
504 Reads a 32-bit MMIO register.\r
505\r
506 Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
507 returned. This function must guarantee that all MMIO read and write\r
508 operations are serialized.\r
509\r
510 If Address is not aligned on a 32-bit boundary, then ASSERT().\r
511 \r
512 If 32-bit MMIO register operations are not supported, then ASSERT().\r
513\r
514 @param Address The MMIO register to read.\r
515\r
516 @return The value read.\r
517\r
518**/\r
519UINT32\r
520EFIAPI\r
521MmioRead32 (\r
522 IN UINTN Address\r
523 )\r
524{\r
525 //\r
526 // Make sure Address is aligned on a 32-bit boundary.\r
527 //\r
528 ASSERT ((Address & 3) == 0);\r
529 return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r
530}\r
531\r
532/**\r
533 Writes a 32-bit MMIO register.\r
534\r
535 Writes the 32-bit MMIO register specified by Address with the value specified\r
536 by Value and returns Value. This function must guarantee that all MMIO read\r
537 and write operations are serialized.\r
538\r
539 If Address is not aligned on a 32-bit boundary, then ASSERT().\r
540 \r
541 If 32-bit MMIO register operations are not supported, then ASSERT().\r
542\r
543 @param Address The MMIO register to write.\r
544 @param Value The value to write to the MMIO register.\r
545\r
546**/\r
547UINT32\r
548EFIAPI\r
549MmioWrite32 (\r
550 IN UINTN Address,\r
551 IN UINT32 Value\r
552 )\r
553{\r
554 //\r
555 // Make sure Address is aligned on a 32-bit boundary.\r
556 //\r
557 ASSERT ((Address & 3) == 0);\r
558 return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r
559}\r
560\r
561/**\r
562 Reads a 64-bit MMIO register.\r
563\r
564 Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
565 returned. This function must guarantee that all MMIO read and write\r
566 operations are serialized.\r
567\r
568 If Address is not aligned on a 64-bit boundary, then ASSERT().\r
569 \r
570 If 64-bit MMIO register operations are not supported, then ASSERT().\r
571\r
572 @param Address The MMIO register to read.\r
573\r
574 @return The value read.\r
575\r
576**/\r
577UINT64\r
578EFIAPI\r
579MmioRead64 (\r
580 IN UINTN Address\r
581 )\r
582{\r
583 //\r
584 // Make sure Address is aligned on a 64-bit boundary.\r
585 //\r
586 ASSERT ((Address & 7) == 0);\r
587 return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r
588}\r
589\r
590/**\r
591 Writes a 64-bit MMIO register.\r
592\r
593 Writes the 64-bit MMIO register specified by Address with the value specified\r
594 by Value and returns Value. This function must guarantee that all MMIO read\r
595 and write operations are serialized.\r
596\r
597 If Address is not aligned on a 64-bit boundary, then ASSERT().\r
598 \r
599 If 64-bit MMIO register operations are not supported, then ASSERT().\r
600\r
601 @param Address The MMIO register to write.\r
602 @param Value The value to write to the MMIO register.\r
603\r
604**/\r
605UINT64\r
606EFIAPI\r
607MmioWrite64 (\r
608 IN UINTN Address,\r
609 IN UINT64 Value\r
610 )\r
611{\r
612 //\r
613 // Make sure Address is aligned on a 64-bit boundary.\r
614 //\r
615 ASSERT ((Address & 7) == 0);\r
616 return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r
617}\r