[mirror_edk2.git] / Omap35xxPkg / Library / OmapDmaLib / OmapDmaLib.c

/** @file\r
  OMAP35xx DMA abstractions modeled on PCI IO protocol. EnableDma()/DisableDma()\r
  are from OMAP35xx TRM. \r
\r
  Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
  \r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include <Base.h>\r
#include <Library/DebugLib.h>\r
#include <Library/OmapDmaLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <Library/UncachedMemoryAllocationLib.h>\r
#include <Library/IoLib.h>\r
#include <Omap3530/Omap3530.h>\r
\r
#include <Protocol/Cpu.h>\r
\r
typedef struct {\r
  EFI_PHYSICAL_ADDRESS      HostAddress;\r
  EFI_PHYSICAL_ADDRESS      DeviceAddress;\r
  UINTN                     NumberOfBytes;\r
  DMA_MAP_OPERATION         Operation;\r
} MAP_INFO_INSTANCE;\r
\r
\r
\r
EFI_CPU_ARCH_PROTOCOL      *gCpu;
\r
/**                                                                 \r
  Configure OMAP DMA Channel\r
            \r
  @param  Channel               DMA Channel to configure\r
  @param  Dma4                  Pointer to structure used to initialize DMA registers for the Channel                                                \r
                                  \r
  @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.\r
  @retval EFI_INVALID_PARAMETER Channel is not valid\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested information.\r
                                   \r
**/
EFI_STATUS
EFIAPI
EnableDmaChannel (
  IN  UINTN       Channel,
  IN  OMAP_DMA4   *DMA4
  )
{
  UINT32  RegVal;


  if (Channel > DMA4_MAX_CHANNEL) {
    return EFI_INVALID_PARAMETER;
  }

  /* 1) Configure the transfer parameters in the logical DMA registers */\r
  /*-------------------------------------------------------------------*/\r
\r
  /* a) Set the data type CSDP[1:0], the Read/Write Port access type \r
        CSDP[8:7]/[15:14], the Source/dest endianism CSDP[21]/CSDP[19], \r
        write mode CSDP[17:16], source/dest packed or nonpacked CSDP[6]/CSDP[13] */\r
  \r
  // Read CSDP\r
  RegVal = MmioRead32 (DMA4_CSDP (Channel));\r
  \r
  // Build reg\r
  RegVal = ((RegVal & ~ 0x3) | DMA4->DataType );\r
  RegVal = ((RegVal & ~(0x3 <<  7)) | (DMA4->ReadPortAccessType << 7));\r
  RegVal = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessType << 14));\r
  RegVal = ((RegVal & ~(0x1 << 21)) | (DMA4->SourceEndiansim << 21));\r
  RegVal = ((RegVal & ~(0x1 << 19)) | (DMA4->DestinationEndianism << 19));\r
  RegVal = ((RegVal & ~(0x3 << 16)) | (DMA4->WriteMode << 16));\r
  RegVal = ((RegVal & ~(0x1 <<  6)) | (DMA4->SourcePacked << 6));\r
  RegVal = ((RegVal & ~(0x1 << 13)) | (DMA4->DestinationPacked << 13));\r
  // Write CSDP\r
  MmioWrite32 (DMA4_CSDP (Channel), RegVal);\r
  \r
  /* b) Set the number of element per frame CEN[23:0]*/\r
  MmioWrite32 (DMA4_CEN (Channel), DMA4->NumberOfElementPerFrame);\r
 \r
  /* c) Set the number of frame per block CFN[15:0]*/\r
  MmioWrite32 (DMA4_CFN (Channel), DMA4->NumberOfFramePerTransferBlock);\r
  \r
  /* d) Set the Source/dest start address index CSSA[31:0]/CDSA[31:0]*/\r
  MmioWrite32 (DMA4_CSSA (Channel), DMA4->SourceStartAddress);\r
  MmioWrite32 (DMA4_CDSA (Channel), DMA4->DestinationStartAddress);\r
  \r
  /* e) Set the Read Port addressing mode CCR[13:12], the Write Port addressing mode CCR[15:14],\r
        read/write priority CCR[6]/CCR[26]\r
        I changed LCH CCR[20:19]=00 and CCR[4:0]=00000 to \r
        LCH CCR[20:19]= DMA4->WriteRequestNumber and CCR[4:0]=DMA4->ReadRequestNumber\r
  */\r
  \r
  // Read CCR\r
  RegVal = MmioRead32 (DMA4_CCR (Channel));\r
\r
  // Build reg\r
  RegVal  = ((RegVal &  ~0x1f)            | DMA4->ReadRequestNumber);\r
  RegVal  = ((RegVal &  ~(BIT20 | BIT19)) | DMA4->WriteRequestNumber << 19);\r
  RegVal  = ((RegVal & ~(0x3 << 12)) | (DMA4->ReadPortAccessMode << 12));\r
  RegVal  = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessMode << 14));\r
  RegVal  = ((RegVal & ~(0x1 <<  6)) | (DMA4->ReadPriority << 6));\r
  RegVal  = ((RegVal & ~(0x1 << 26)) | (DMA4->WritePriority << 26));\r
  \r
  // Write CCR\r
  MmioWrite32 (DMA4_CCR (Channel), RegVal);\r
  \r
  /* f)- Set the source element index CSEI[15:0]*/\r
  MmioWrite32 (DMA4_CSEI (Channel), DMA4->SourceElementIndex);\r
  \r
  /* - Set the source frame index CSFI[15:0]*/\r
  MmioWrite32 (DMA4_CSFI (Channel), DMA4->SourceFrameIndex);\r
\r
\r
  /* - Set the destination element index CDEI[15:0]*/\r
  MmioWrite32 (DMA4_CDEI (Channel), DMA4->DestinationElementIndex);\r
\r
  /* - Set the destination frame index CDFI[31:0]*/\r
  MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);\r
  \r
  /* 2) Start the DMA transfer by Setting the enable bit CCR[7]=1 */\r
  /*--------------------------------------------------------------*/\r
  //write enable bit\r
  MmioOr32 (DMA4_CCR(0), DMA4_CCR_ENABLE); //Launch transfer

  return EFI_SUCCESS;
}

/**                                                                 \r
  Turn of DMA channel configured by EnableDma().\r
            \r
  @param  Channel               DMA Channel to configure\r
                                  \r
  @retval EFI_SUCCESS           DMA hardware disabled\r
  @retval EFI_INVALID_PARAMETER Channel is not valid\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested information.\r
                                   \r
**/
EFI_STATUS
EFIAPI
DisableDmaChannel (
  IN  UINTN       Channel
  )
{
  if (Channel > DMA4_MAX_CHANNEL) {
    return EFI_INVALID_PARAMETER;
  }

  MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE | DMA4_CCR_RD_ACTIVE | DMA4_CCR_WR_ACTIVE)); 
  return EFI_SUCCESS;
}

/**                                                                 \r
  Provides the DMA controller-specific addresses needed to access system memory.\r
  \r
  Operation is relative to the DMA bus master.\r
            \r
  @param  Operation             Indicates if the bus master is going to read or write to system memory.\r
  @param  HostAddress           The system memory address to map to the DMA controller.\r
  @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes\r
                                that were mapped.                                                 \r
  @param  DeviceAddress         The resulting map address for the bus master controller to use to\r
                                access the hosts HostAddress.                                        \r
  @param  Mapping               A resulting value to pass to Unmap().\r
                                  \r
  @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.\r
  @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.                                \r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.\r
                                   \r
**/
EFI_STATUS
EFIAPI
DmaMap (
  IN     DMA_MAP_OPERATION              Operation,
  IN     VOID                           *HostAddress,\r
  IN OUT UINTN                          *NumberOfBytes,\r
  OUT    PHYSICAL_ADDRESS               *DeviceAddress,\r
  OUT    VOID                           **Mapping\r
  )
{
  MAP_INFO_INSTANCE     *Map;

  if ( HostAddress == NULL || NumberOfBytes == NULL || 
       DeviceAddress == NULL || Mapping == NULL ) {
    return EFI_INVALID_PARAMETER;
  }
  

  if (Operation >= MapOperationMaximum) {
    return EFI_INVALID_PARAMETER;
  }

  *DeviceAddress = ConvertToPhysicalAddress (HostAddress);

  // Remember range so we can flush on the other side
  Map = AllocatePool (sizeof (MAP_INFO_INSTANCE));
  if (Map == NULL) {
    return  EFI_OUT_OF_RESOURCES;
  }
  
  *Mapping = Map;

  Map->HostAddress   = (UINTN)HostAddress;
  Map->DeviceAddress = *DeviceAddress;
  Map->NumberOfBytes = *NumberOfBytes;
  Map->Operation     = Operation;

  // EfiCpuFlushTypeWriteBack, EfiCpuFlushTypeInvalidate
  gCpu->FlushDataCache (gCpu, (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);
  
  return EFI_SUCCESS;
}


/**                                                                 \r
  Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or DmaMapBusMasterCommonBuffer()\r
  operation and releases any corresponding resources.\r
            \r
  @param  Mapping               The mapping value returned from DmaMap*().\r
                                  \r
  @retval EFI_SUCCESS           The range was unmapped.\r
  @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.\r
                                   \r
**/
EFI_STATUS
EFIAPI
DmaUnmap (
  IN  VOID                         *Mapping\r
  )
{
  MAP_INFO_INSTANCE *Map;
  
  if (Mapping == NULL) {
    ASSERT (FALSE);
    return EFI_INVALID_PARAMETER;
  }
  
  Map = (MAP_INFO_INSTANCE *)Mapping;
  if (Map->Operation == MapOperationBusMasterWrite) {
    //
    // Make sure we read buffer from uncached memory and not the cache
    //
    gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate);
  } 
  
  FreePool (Map);

  return EFI_SUCCESS;
}

/**                                                                 \r
  Allocates pages that are suitable for an DmaMap() of type MapOperationBusMasterCommonBuffer.\r
  mapping.                                                                       \r
            \r
  @param  MemoryType            The type of memory to allocate, EfiBootServicesData or\r
                                EfiRuntimeServicesData.                               \r
  @param  Pages                 The number of pages to allocate.                                \r
  @param  HostAddress           A pointer to store the base system memory address of the\r
                                allocated range.                                        \r
\r
                                @retval EFI_SUCCESS           The requested memory pages were allocated.\r
  @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are\r
                                MEMORY_WRITE_COMBINE and MEMORY_CACHED.                     \r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.  \r
                                   \r
**/EFI_STATUS
EFIAPI
DmaAllocateBuffer (
  IN  EFI_MEMORY_TYPE              MemoryType,
  IN  UINTN                        Pages,\r
  OUT VOID                         **HostAddress\r
  )\r
{
  if (HostAddress == NULL) {
    return EFI_INVALID_PARAMETER;
  }

  //
  // The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
  //
  // We used uncached memory to keep coherency
  //
  if (MemoryType == EfiBootServicesData) {
    *HostAddress = UncachedAllocatePages (Pages);
  } else if (MemoryType != EfiRuntimeServicesData) {
    *HostAddress = UncachedAllocateRuntimePages (Pages);
  } else {
    return EFI_INVALID_PARAMETER;
  }

  return EFI_SUCCESS;
}


/**                                                                 \r
  Frees memory that was allocated with DmaAllocateBuffer().\r
            \r
  @param  Pages                 The number of pages to free.                                \r
  @param  HostAddress           The base system memory address of the allocated range.                                    \r
                                  \r
  @retval EFI_SUCCESS           The requested memory pages were freed.\r
  @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
                                was not allocated with DmaAllocateBuffer().\r
                                     \r
**/\r
EFI_STATUS
EFIAPI
DmaFreeBuffer (
  IN  UINTN                        Pages,\r
  IN  VOID                         *HostAddress\r
  )\r
{
  if (HostAddress == NULL) {
     return EFI_INVALID_PARAMETER;
  } 
  
  UncachedFreePages (HostAddress, Pages);
  return EFI_SUCCESS;
}


EFI_STATUS
EFIAPI
OmapDmaLibConstructor (
  IN EFI_HANDLE       ImageHandle,
  IN EFI_SYSTEM_TABLE *SystemTable
  )
{
  EFI_STATUS              Status;

  // Get the Cpu protocol for later use
  Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
  ASSERT_EFI_ERROR(Status);

  return EFI_SUCCESS;
}
Commit	Line	Data
7f814ffd	1	/** @file\r
	2	OMAP35xx DMA abstractions modeled on PCI IO protocol. EnableDma()/DisableDma()\r
	3	are from OMAP35xx TRM. \r
	4	\r
	5	Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
	6	\r
	7	This program and the accompanying materials\r
	8	are licensed and made available under the terms and conditions of the BSD License\r
	9	which accompanies this distribution. The full text of the license may be found at\r
	10	http://opensource.org/licenses/bsd-license.php\r
	11	\r
	12	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	13	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	14	\r
	15	**/\r
	16	\r
	17	#include <Base.h>\r
	18	#include <Library/DebugLib.h>\r
	19	#include <Library/OmapDmaLib.h>\r
	20	#include <Library/MemoryAllocationLib.h>\r
	21	#include <Library/UefiBootServicesTableLib.h>\r
	22	#include <Library/UncachedMemoryAllocationLib.h>\r
	23	#include <Library/IoLib.h>\r
	24	#include <Omap3530/Omap3530.h>\r
	25	\r
	26	#include <Protocol/Cpu.h>\r
	27	\r
	28	typedef struct {\r
	29	EFI_PHYSICAL_ADDRESS HostAddress;\r
	30	EFI_PHYSICAL_ADDRESS DeviceAddress;\r
	31	UINTN NumberOfBytes;\r
	32	DMA_MAP_OPERATION Operation;\r
	33	} MAP_INFO_INSTANCE;\r
	34	\r
	35	\r
	36	\r
	37	EFI_CPU_ARCH_PROTOCOL *gCpu;
	38	\r
	39	/** \r
	40	Configure OMAP DMA Channel\r
	41	\r
	42	@param Channel DMA Channel to configure\r
	43	@param Dma4 Pointer to structure used to initialize DMA registers for the Channel \r
	44	\r
	45	@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
	46	@retval EFI_INVALID_PARAMETER Channel is not valid\r
	47	@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.\r
	48	\r
	49	**/
	50	EFI_STATUS
	51	EFIAPI
	52	EnableDmaChannel (
	53	IN UINTN Channel,
	54	IN OMAP_DMA4 *DMA4
	55	)
	56	{
	57	UINT32 RegVal;
	58
	59
	60	if (Channel > DMA4_MAX_CHANNEL) {
	61	return EFI_INVALID_PARAMETER;
	62	}
	63
	64	/* 1) Configure the transfer parameters in the logical DMA registers */\r
65	/-------------------------------------------------------------------/\r
66	\r
67	/* a) Set the data type CSDP[1:0], the Read/Write Port access type \r
68	CSDP[8:7]/[15:14], the Source/dest endianism CSDP[21]/CSDP[19], \r
69	write mode CSDP[17:16], source/dest packed or nonpacked CSDP[6]/CSDP[13] */\r
70	\r
71	// Read CSDP\r
72	RegVal = MmioRead32 (DMA4_CSDP (Channel));\r
73	\r
74	// Build reg\r
75	RegVal = ((RegVal & ~ 0x3) \| DMA4->DataType );\r
76	RegVal = ((RegVal & ~(0x3 << 7)) \| (DMA4->ReadPortAccessType << 7));\r
77	RegVal = ((RegVal & ~(0x3 << 14)) \| (DMA4->WritePortAccessType << 14));\r
78	RegVal = ((RegVal & ~(0x1 << 21)) \| (DMA4->SourceEndiansim << 21));\r
79	RegVal = ((RegVal & ~(0x1 << 19)) \| (DMA4->DestinationEndianism << 19));\r
80	RegVal = ((RegVal & ~(0x3 << 16)) \| (DMA4->WriteMode << 16));\r
81	RegVal = ((RegVal & ~(0x1 << 6)) \| (DMA4->SourcePacked << 6));\r
82	RegVal = ((RegVal & ~(0x1 << 13)) \| (DMA4->DestinationPacked << 13));\r
83	// Write CSDP\r
84	MmioWrite32 (DMA4_CSDP (Channel), RegVal);\r
85	\r
86	/* b) Set the number of element per frame CEN[23:0]*/\r
87	MmioWrite32 (DMA4_CEN (Channel), DMA4->NumberOfElementPerFrame);\r
88	\r
89	/* c) Set the number of frame per block CFN[15:0]*/\r
90	MmioWrite32 (DMA4_CFN (Channel), DMA4->NumberOfFramePerTransferBlock);\r
91	\r
92	/* d) Set the Source/dest start address index CSSA[31:0]/CDSA[31:0]*/\r
93	MmioWrite32 (DMA4_CSSA (Channel), DMA4->SourceStartAddress);\r
94	MmioWrite32 (DMA4_CDSA (Channel), DMA4->DestinationStartAddress);\r
95	\r
96	/* e) Set the Read Port addressing mode CCR[13:12], the Write Port addressing mode CCR[15:14],\r
97	read/write priority CCR[6]/CCR[26]\r
98	I changed LCH CCR[20:19]=00 and CCR[4:0]=00000 to \r
99	LCH CCR[20:19]= DMA4->WriteRequestNumber and CCR[4:0]=DMA4->ReadRequestNumber\r
100	*/\r
101	\r
102	// Read CCR\r
103	RegVal = MmioRead32 (DMA4_CCR (Channel));\r
104	\r
105	// Build reg\r
106	RegVal = ((RegVal & ~0x1f) \| DMA4->ReadRequestNumber);\r
107	RegVal = ((RegVal & ~(BIT20 \| BIT19)) \| DMA4->WriteRequestNumber << 19);\r
108	RegVal = ((RegVal & ~(0x3 << 12)) \| (DMA4->ReadPortAccessMode << 12));\r
109	RegVal = ((RegVal & ~(0x3 << 14)) \| (DMA4->WritePortAccessMode << 14));\r
110	RegVal = ((RegVal & ~(0x1 << 6)) \| (DMA4->ReadPriority << 6));\r
111	RegVal = ((RegVal & ~(0x1 << 26)) \| (DMA4->WritePriority << 26));\r
112	\r
113	// Write CCR\r
114	MmioWrite32 (DMA4_CCR (Channel), RegVal);\r
115	\r
116	/* f)- Set the source element index CSEI[15:0]*/\r
117	MmioWrite32 (DMA4_CSEI (Channel), DMA4->SourceElementIndex);\r
118	\r
119	/* - Set the source frame index CSFI[15:0]*/\r
120	MmioWrite32 (DMA4_CSFI (Channel), DMA4->SourceFrameIndex);\r
121	\r
122	\r
123	/* - Set the destination element index CDEI[15:0]*/\r
124	MmioWrite32 (DMA4_CDEI (Channel), DMA4->DestinationElementIndex);\r
125	\r
126	/* - Set the destination frame index CDFI[31:0]*/\r
127	MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);\r
128	\r
129	/* 2) Start the DMA transfer by Setting the enable bit CCR[7]=1 */\r
130	/--------------------------------------------------------------/\r
131	//write enable bit\r
132	MmioOr32 (DMA4_CCR(0), DMA4_CCR_ENABLE); //Launch transfer
133
134	return EFI_SUCCESS;
135	}
136
137	/** \r
138	Turn of DMA channel configured by EnableDma().\r
139	\r
140	@param Channel DMA Channel to configure\r
141	\r
142	@retval EFI_SUCCESS DMA hardware disabled\r
143	@retval EFI_INVALID_PARAMETER Channel is not valid\r
144	@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.\r
145	\r
146	**/
147	EFI_STATUS
148	EFIAPI
149	DisableDmaChannel (
150	IN UINTN Channel
151	)
152	{
153	if (Channel > DMA4_MAX_CHANNEL) {
154	return EFI_INVALID_PARAMETER;
155	}
156
157	MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE \| DMA4_CCR_RD_ACTIVE \| DMA4_CCR_WR_ACTIVE));
158	return EFI_SUCCESS;
159	}
160
161	/** \r
162	Provides the DMA controller-specific addresses needed to access system memory.\r
163	\r
164	Operation is relative to the DMA bus master.\r
165	\r
166	@param Operation Indicates if the bus master is going to read or write to system memory.\r
167	@param HostAddress The system memory address to map to the DMA controller.\r
168	@param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r
169	that were mapped. \r
170	@param DeviceAddress The resulting map address for the bus master controller to use to\r
171	access the hosts HostAddress. \r
172	@param Mapping A resulting value to pass to Unmap().\r
173	\r
174	@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
175	@retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer. \r
176	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
177	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
178	@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
179	\r
180	**/
181	EFI_STATUS
182	EFIAPI
183	DmaMap (
184	IN DMA_MAP_OPERATION Operation,
185	IN VOID *HostAddress,\r
186	IN OUT UINTN *NumberOfBytes,\r
187	OUT PHYSICAL_ADDRESS *DeviceAddress,\r
188	OUT VOID **Mapping\r
189	)
190	{
191	MAP_INFO_INSTANCE *Map;
192
193	if ( HostAddress == NULL \|\| NumberOfBytes == NULL \|\|
194	DeviceAddress == NULL \|\| Mapping == NULL ) {
195	return EFI_INVALID_PARAMETER;
196	}
197
198
199	if (Operation >= MapOperationMaximum) {
200	return EFI_INVALID_PARAMETER;
201	}
202
203	*DeviceAddress = ConvertToPhysicalAddress (HostAddress);
204
205	// Remember range so we can flush on the other side
206	Map = AllocatePool (sizeof (MAP_INFO_INSTANCE));
207	if (Map == NULL) {
208	return EFI_OUT_OF_RESOURCES;
209	}
210
211	*Mapping = Map;
212
213	Map->HostAddress = (UINTN)HostAddress;
214	Map->DeviceAddress = *DeviceAddress;
215	Map->NumberOfBytes = *NumberOfBytes;
216	Map->Operation = Operation;
217
218	// EfiCpuFlushTypeWriteBack, EfiCpuFlushTypeInvalidate
219	gCpu->FlushDataCache (gCpu, (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);
220
221	return EFI_SUCCESS;
222	}
223
224
225	/** \r
226	Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or DmaMapBusMasterCommonBuffer()\r
227	operation and releases any corresponding resources.\r
228	\r
229	@param Mapping The mapping value returned from DmaMap*().\r
230	\r
231	@retval EFI_SUCCESS The range was unmapped.\r
232	@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
233	\r
234	**/
235	EFI_STATUS
236	EFIAPI
237	DmaUnmap (
238	IN VOID *Mapping\r
239	)
240	{
241	MAP_INFO_INSTANCE *Map;
242
243	if (Mapping == NULL) {
244	ASSERT (FALSE);
245	return EFI_INVALID_PARAMETER;
246	}
247
248	Map = (MAP_INFO_INSTANCE *)Mapping;
249	if (Map->Operation == MapOperationBusMasterWrite) {
250	//
251	// Make sure we read buffer from uncached memory and not the cache
252	//
253	gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate);
254	}
255
256	FreePool (Map);
257
258	return EFI_SUCCESS;
259	}
260
261	/** \r
262	Allocates pages that are suitable for an DmaMap() of type MapOperationBusMasterCommonBuffer.\r
263	mapping. \r
264	\r
265	@param MemoryType The type of memory to allocate, EfiBootServicesData or\r
266	EfiRuntimeServicesData. \r
267	@param Pages The number of pages to allocate. \r
268	@param HostAddress A pointer to store the base system memory address of the\r
269	allocated range. \r
270	\r
271	@retval EFI_SUCCESS The requested memory pages were allocated.\r
272	@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
273	MEMORY_WRITE_COMBINE and MEMORY_CACHED. \r
274	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
275	@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. \r
276	\r
277	**/EFI_STATUS
278	EFIAPI
279	DmaAllocateBuffer (
280	IN EFI_MEMORY_TYPE MemoryType,
281	IN UINTN Pages,\r
282	OUT VOID **HostAddress\r
283	)\r
284	{
285	if (HostAddress == NULL) {
286	return EFI_INVALID_PARAMETER;
287	}
288
289	//
290	// The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
291	//
292	// We used uncached memory to keep coherency
293	//
294	if (MemoryType == EfiBootServicesData) {
295	*HostAddress = UncachedAllocatePages (Pages);
296	} else if (MemoryType != EfiRuntimeServicesData) {
297	*HostAddress = UncachedAllocateRuntimePages (Pages);
298	} else {
299	return EFI_INVALID_PARAMETER;
300	}
301
302	return EFI_SUCCESS;
303	}
304
305
306	/** \r
307	Frees memory that was allocated with DmaAllocateBuffer().\r
308	\r
309	@param Pages The number of pages to free. \r
310	@param HostAddress The base system memory address of the allocated range. \r
311	\r
312	@retval EFI_SUCCESS The requested memory pages were freed.\r
313	@retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
314	was not allocated with DmaAllocateBuffer().\r
315	\r
316	**/\r
317	EFI_STATUS
318	EFIAPI
319	DmaFreeBuffer (
320	IN UINTN Pages,\r
321	IN VOID *HostAddress\r
322	)\r
323	{
324	if (HostAddress == NULL) {
325	return EFI_INVALID_PARAMETER;
326	}
327
328	UncachedFreePages (HostAddress, Pages);
329	return EFI_SUCCESS;
330	}
331
332
333	EFI_STATUS
334	EFIAPI
335	OmapDmaLibConstructor (
336	IN EFI_HANDLE ImageHandle,
337	IN EFI_SYSTEM_TABLE *SystemTable
338	)
339	{
340	EFI_STATUS Status;
341
342	// Get the Cpu protocol for later use
343	Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
344	ASSERT_EFI_ERROR(Status);
345
346	return EFI_SUCCESS;
347	}
348