[mirror_edk2.git] / Omap35xxPkg / Library / OmapDmaLib / OmapDmaLib.c

/** @file\r
  OMAP35xx DMA abstractions modeled on PCI IO protocol. EnableDma()/DisableDma()\r
  are from OMAP35xx TRM. \r
\r
  Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
  \r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include <Base.h>\r
#include <Library/DebugLib.h>\r
#include <Library/OmapDmaLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <Library/UncachedMemoryAllocationLib.h>\r
#include <Library/IoLib.h>\r
#include <Omap3530/Omap3530.h>\r
\r
#include <Protocol/Cpu.h>\r
\r
typedef struct {\r
  EFI_PHYSICAL_ADDRESS      HostAddress;\r
  EFI_PHYSICAL_ADDRESS      DeviceAddress;\r
  UINTN                     NumberOfBytes;\r
  DMA_MAP_OPERATION         Operation;\r
} MAP_INFO_INSTANCE;\r
\r
\r
\r
EFI_CPU_ARCH_PROTOCOL      *gCpu;
\r
/**                                                                 \r
  Configure OMAP DMA Channel\r
            \r
  @param  Channel               DMA Channel to configure\r
  @param  Dma4                  Pointer to structure used to initialize DMA registers for the Channel                                                \r
                                  \r
  @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.\r
  @retval EFI_INVALID_PARAMETER Channel is not valid\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested information.\r
                                   \r
**/
EFI_STATUS
EFIAPI
EnableDmaChannel (
  IN  UINTN       Channel,
  IN  OMAP_DMA4   *DMA4
  )
{
  UINT32  RegVal;


  if (Channel > DMA4_MAX_CHANNEL) {
    return EFI_INVALID_PARAMETER;
  }

  /* 1) Configure the transfer parameters in the logical DMA registers */\r
  /*-------------------------------------------------------------------*/\r
\r
  /* a) Set the data type CSDP[1:0], the Read/Write Port access type \r
        CSDP[8:7]/[15:14], the Source/dest endianism CSDP[21]/CSDP[19], \r
        write mode CSDP[17:16], source/dest packed or nonpacked CSDP[6]/CSDP[13] */\r
  \r
  // Read CSDP\r
  RegVal = MmioRead32 (DMA4_CSDP (Channel));\r
  \r
  // Build reg\r
  RegVal = ((RegVal & ~ 0x3) | DMA4->DataType );\r
  RegVal = ((RegVal & ~(0x3 <<  7)) | (DMA4->ReadPortAccessType << 7));\r
  RegVal = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessType << 14));\r
  RegVal = ((RegVal & ~(0x1 << 21)) | (DMA4->SourceEndiansim << 21));\r
  RegVal = ((RegVal & ~(0x1 << 19)) | (DMA4->DestinationEndianism << 19));\r
  RegVal = ((RegVal & ~(0x3 << 16)) | (DMA4->WriteMode << 16));\r
  RegVal = ((RegVal & ~(0x1 <<  6)) | (DMA4->SourcePacked << 6));\r
  RegVal = ((RegVal & ~(0x1 << 13)) | (DMA4->DestinationPacked << 13));\r
  // Write CSDP\r
  MmioWrite32 (DMA4_CSDP (Channel), RegVal);\r
  \r
  /* b) Set the number of element per frame CEN[23:0]*/\r
  MmioWrite32 (DMA4_CEN (Channel), DMA4->NumberOfElementPerFrame);\r
 \r
  /* c) Set the number of frame per block CFN[15:0]*/\r
  MmioWrite32 (DMA4_CFN (Channel), DMA4->NumberOfFramePerTransferBlock);\r
  \r
  /* d) Set the Source/dest start address index CSSA[31:0]/CDSA[31:0]*/\r
  MmioWrite32 (DMA4_CSSA (Channel), DMA4->SourceStartAddress);\r
  MmioWrite32 (DMA4_CDSA (Channel), DMA4->DestinationStartAddress);\r
  \r
  /* e) Set the Read Port addressing mode CCR[13:12], the Write Port addressing mode CCR[15:14],\r
        read/write priority CCR[6]/CCR[26]\r
        I changed LCH CCR[20:19]=00 and CCR[4:0]=00000 to \r
        LCH CCR[20:19]= DMA4->WriteRequestNumber and CCR[4:0]=DMA4->ReadRequestNumber\r
  */\r
  \r
  // Read CCR\r
  RegVal = MmioRead32 (DMA4_CCR (Channel));\r
\r
  // Build reg\r
  RegVal  = ((RegVal &  ~0x1f)            | DMA4->ReadRequestNumber);\r
  RegVal  = ((RegVal &  ~(BIT20 | BIT19)) | DMA4->WriteRequestNumber << 19);\r
  RegVal  = ((RegVal & ~(0x3 << 12)) | (DMA4->ReadPortAccessMode << 12));\r
  RegVal  = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessMode << 14));\r
  RegVal  = ((RegVal & ~(0x1 <<  6)) | (DMA4->ReadPriority << 6));\r
  RegVal  = ((RegVal & ~(0x1 << 26)) | (DMA4->WritePriority << 26));\r
  \r
  // Write CCR\r
  MmioWrite32 (DMA4_CCR (Channel), RegVal);\r
  \r
  /* f)- Set the source element index CSEI[15:0]*/\r
  MmioWrite32 (DMA4_CSEI (Channel), DMA4->SourceElementIndex);\r
  \r
  /* - Set the source frame index CSFI[15:0]*/\r
  MmioWrite32 (DMA4_CSFI (Channel), DMA4->SourceFrameIndex);\r
\r
\r
  /* - Set the destination element index CDEI[15:0]*/\r
  MmioWrite32 (DMA4_CDEI (Channel), DMA4->DestinationElementIndex);\r
\r
  /* - Set the destination frame index CDFI[31:0]*/\r
  MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);\r
 \r
  MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);\r
\r
  // Enable all the status bits since we are polling\r
  MmioWrite32 (DMA4_CICR (Channel), DMA4_CICR_ENABLE_ALL);\r
  MmioWrite32 (DMA4_CSR (Channel),  DMA4_CSR_RESET);\r
\r
  /* 2) Start the DMA transfer by Setting the enable bit CCR[7]=1 */\r
  /*--------------------------------------------------------------*/\r
  //write enable bit\r
  MmioOr32 (DMA4_CCR(Channel), DMA4_CCR_ENABLE); //Launch transfer

  return EFI_SUCCESS;
}

/**                                                                 \r
  Turn of DMA channel configured by EnableDma().\r
            \r
  @param  Channel               DMA Channel to configure\r
  @param  SuccesMask            Bits in DMA4_CSR register indicate EFI_SUCCESS\r
  @param  ErrorMask             Bits in DMA4_CSR register indicate EFI_DEVICE_ERROR\r
                                  \r
  @retval EFI_SUCCESS           DMA hardware disabled\r
  @retval EFI_INVALID_PARAMETER Channel is not valid\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested information.\r
                                   \r
**/
EFI_STATUS
EFIAPI
DisableDmaChannel (
  IN  UINTN       Channel,
  IN  UINT32      SuccessMask,
  IN  UINT32      ErrorMask
  )
{
  EFI_STATUS  Status = EFI_SUCCESS;
  UINT32      Reg;


  if (Channel > DMA4_MAX_CHANNEL) {
    return EFI_INVALID_PARAMETER;
  }

  do {
    Reg = MmioRead32 (DMA4_CSR(Channel));
    if ((Reg & ErrorMask) != 0) {
      Status = EFI_DEVICE_ERROR;
      DEBUG ((EFI_D_ERROR, "DMA Error (%d) %x\n", Channel, Reg));
      break;
    }
  } while ((Reg & SuccessMask) != SuccessMask);


  // Disable all status bits and clear them
  MmioWrite32 (DMA4_CICR (Channel), 0);\r
  MmioWrite32 (DMA4_CSR (Channel),  DMA4_CSR_RESET);

  MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE | DMA4_CCR_RD_ACTIVE | DMA4_CCR_WR_ACTIVE)); 
  return Status;
}


/**                                                                 \r
  Provides the DMA controller-specific addresses needed to access system memory.\r
  \r
  Operation is relative to the DMA bus master.\r
            \r
  @param  Operation             Indicates if the bus master is going to read or write to system memory.\r
  @param  HostAddress           The system memory address to map to the DMA controller.\r
  @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes\r
                                that were mapped.                                                 \r
  @param  DeviceAddress         The resulting map address for the bus master controller to use to\r
                                access the hosts HostAddress.                                        \r
  @param  Mapping               A resulting value to pass to Unmap().\r
                                  \r
  @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.\r
  @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.                                \r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.\r
                                   \r
**/
EFI_STATUS
EFIAPI
DmaMap (
  IN     DMA_MAP_OPERATION              Operation,
  IN     VOID                           *HostAddress,\r
  IN OUT UINTN                          *NumberOfBytes,\r
  OUT    PHYSICAL_ADDRESS               *DeviceAddress,\r
  OUT    VOID                           **Mapping\r
  )
{
  MAP_INFO_INSTANCE     *Map;

  if ( HostAddress == NULL || NumberOfBytes == NULL || 
       DeviceAddress == NULL || Mapping == NULL ) {
    return EFI_INVALID_PARAMETER;
  }
  

  if (Operation >= MapOperationMaximum) {
    return EFI_INVALID_PARAMETER;
  }

  *DeviceAddress = ConvertToPhysicalAddress (HostAddress);

  // Remember range so we can flush on the other side
  Map = AllocatePool (sizeof (MAP_INFO_INSTANCE));
  if (Map == NULL) {
    return  EFI_OUT_OF_RESOURCES;
  }
  
  *Mapping = Map;

  Map->HostAddress   = (UINTN)HostAddress;
  Map->DeviceAddress = *DeviceAddress;
  Map->NumberOfBytes = *NumberOfBytes;
  Map->Operation     = Operation;

  // EfiCpuFlushTypeWriteBack, EfiCpuFlushTypeInvalidate
  gCpu->FlushDataCache (gCpu, (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);
  
  return EFI_SUCCESS;
}


/**                                                                 \r
  Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or DmaMapBusMasterCommonBuffer()\r
  operation and releases any corresponding resources.\r
            \r
  @param  Mapping               The mapping value returned from DmaMap*().\r
                                  \r
  @retval EFI_SUCCESS           The range was unmapped.\r
  @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.\r
                                   \r
**/
EFI_STATUS
EFIAPI
DmaUnmap (
  IN  VOID                         *Mapping\r
  )
{
  MAP_INFO_INSTANCE *Map;
  
  if (Mapping == NULL) {
    ASSERT (FALSE);
    return EFI_INVALID_PARAMETER;
  }
  
  Map = (MAP_INFO_INSTANCE *)Mapping;
  if (Map->Operation == MapOperationBusMasterWrite) {
    //
    // Make sure we read buffer from uncached memory and not the cache
    //
    gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate);
  } 
  
  FreePool (Map);

  return EFI_SUCCESS;
}

/**                                                                 \r
  Allocates pages that are suitable for an DmaMap() of type MapOperationBusMasterCommonBuffer.\r
  mapping.                                                                       \r
            \r
  @param  MemoryType            The type of memory to allocate, EfiBootServicesData or\r
                                EfiRuntimeServicesData.                               \r
  @param  Pages                 The number of pages to allocate.                                \r
  @param  HostAddress           A pointer to store the base system memory address of the\r
                                allocated range.                                        \r
\r
                                @retval EFI_SUCCESS           The requested memory pages were allocated.\r
  @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are\r
                                MEMORY_WRITE_COMBINE and MEMORY_CACHED.                     \r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.  \r
                                   \r
**/EFI_STATUS
EFIAPI
DmaAllocateBuffer (
  IN  EFI_MEMORY_TYPE              MemoryType,
  IN  UINTN                        Pages,\r
  OUT VOID                         **HostAddress\r
  )\r
{
  if (HostAddress == NULL) {
    return EFI_INVALID_PARAMETER;
  }

  //
  // The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
  //
  // We used uncached memory to keep coherency
  //
  if (MemoryType == EfiBootServicesData) {
    *HostAddress = UncachedAllocatePages (Pages);
  } else if (MemoryType != EfiRuntimeServicesData) {
    *HostAddress = UncachedAllocateRuntimePages (Pages);
  } else {
    return EFI_INVALID_PARAMETER;
  }

  return EFI_SUCCESS;
}


/**                                                                 \r
  Frees memory that was allocated with DmaAllocateBuffer().\r
            \r
  @param  Pages                 The number of pages to free.                                \r
  @param  HostAddress           The base system memory address of the allocated range.                                    \r
                                  \r
  @retval EFI_SUCCESS           The requested memory pages were freed.\r
  @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
                                was not allocated with DmaAllocateBuffer().\r
                                     \r
**/\r
EFI_STATUS
EFIAPI
DmaFreeBuffer (
  IN  UINTN                        Pages,\r
  IN  VOID                         *HostAddress\r
  )\r
{
  if (HostAddress == NULL) {
     return EFI_INVALID_PARAMETER;
  } 
  
  UncachedFreePages (HostAddress, Pages);
  return EFI_SUCCESS;
}


EFI_STATUS
EFIAPI
OmapDmaLibConstructor (
  IN EFI_HANDLE       ImageHandle,
  IN EFI_SYSTEM_TABLE *SystemTable
  )
{
  EFI_STATUS              Status;

  // Get the Cpu protocol for later use
  Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
  ASSERT_EFI_ERROR(Status);

  return EFI_SUCCESS;
}
Commit	Line	Data
7f814ffd	1	/** @file\r
	2	OMAP35xx DMA abstractions modeled on PCI IO protocol. EnableDma()/DisableDma()\r
	3	are from OMAP35xx TRM. \r
	4	\r
	5	Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
	6	\r
	7	This program and the accompanying materials\r
	8	are licensed and made available under the terms and conditions of the BSD License\r
	9	which accompanies this distribution. The full text of the license may be found at\r
	10	http://opensource.org/licenses/bsd-license.php\r
	11	\r
	12	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	13	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	14	\r
	15	**/\r
	16	\r
	17	#include <Base.h>\r
	18	#include <Library/DebugLib.h>\r
	19	#include <Library/OmapDmaLib.h>\r
	20	#include <Library/MemoryAllocationLib.h>\r
	21	#include <Library/UefiBootServicesTableLib.h>\r
	22	#include <Library/UncachedMemoryAllocationLib.h>\r
	23	#include <Library/IoLib.h>\r
	24	#include <Omap3530/Omap3530.h>\r
	25	\r
	26	#include <Protocol/Cpu.h>\r
	27	\r
	28	typedef struct {\r
	29	EFI_PHYSICAL_ADDRESS HostAddress;\r
	30	EFI_PHYSICAL_ADDRESS DeviceAddress;\r
	31	UINTN NumberOfBytes;\r
	32	DMA_MAP_OPERATION Operation;\r
	33	} MAP_INFO_INSTANCE;\r
	34	\r
	35	\r
	36	\r
	37	EFI_CPU_ARCH_PROTOCOL *gCpu;
	38	\r
	39	/** \r
	40	Configure OMAP DMA Channel\r
	41	\r
	42	@param Channel DMA Channel to configure\r
	43	@param Dma4 Pointer to structure used to initialize DMA registers for the Channel \r
	44	\r
	45	@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
	46	@retval EFI_INVALID_PARAMETER Channel is not valid\r
	47	@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.\r
	48	\r
	49	**/
	50	EFI_STATUS
	51	EFIAPI
	52	EnableDmaChannel (
	53	IN UINTN Channel,
	54	IN OMAP_DMA4 *DMA4
	55	)
	56	{
	57	UINT32 RegVal;
	58
	59
	60	if (Channel > DMA4_MAX_CHANNEL) {
	61	return EFI_INVALID_PARAMETER;
	62	}
	63
	64	/* 1) Configure the transfer parameters in the logical DMA registers */\r
65	/-------------------------------------------------------------------/\r
66	\r
67	/* a) Set the data type CSDP[1:0], the Read/Write Port access type \r
68	CSDP[8:7]/[15:14], the Source/dest endianism CSDP[21]/CSDP[19], \r
69	write mode CSDP[17:16], source/dest packed or nonpacked CSDP[6]/CSDP[13] */\r
70	\r
71	// Read CSDP\r
72	RegVal = MmioRead32 (DMA4_CSDP (Channel));\r
73	\r
74	// Build reg\r
75	RegVal = ((RegVal & ~ 0x3) \| DMA4->DataType );\r
76	RegVal = ((RegVal & ~(0x3 << 7)) \| (DMA4->ReadPortAccessType << 7));\r
77	RegVal = ((RegVal & ~(0x3 << 14)) \| (DMA4->WritePortAccessType << 14));\r
78	RegVal = ((RegVal & ~(0x1 << 21)) \| (DMA4->SourceEndiansim << 21));\r
79	RegVal = ((RegVal & ~(0x1 << 19)) \| (DMA4->DestinationEndianism << 19));\r
80	RegVal = ((RegVal & ~(0x3 << 16)) \| (DMA4->WriteMode << 16));\r
81	RegVal = ((RegVal & ~(0x1 << 6)) \| (DMA4->SourcePacked << 6));\r
82	RegVal = ((RegVal & ~(0x1 << 13)) \| (DMA4->DestinationPacked << 13));\r
83	// Write CSDP\r
84	MmioWrite32 (DMA4_CSDP (Channel), RegVal);\r
85	\r
86	/* b) Set the number of element per frame CEN[23:0]*/\r
87	MmioWrite32 (DMA4_CEN (Channel), DMA4->NumberOfElementPerFrame);\r
88	\r
89	/* c) Set the number of frame per block CFN[15:0]*/\r
90	MmioWrite32 (DMA4_CFN (Channel), DMA4->NumberOfFramePerTransferBlock);\r
91	\r
92	/* d) Set the Source/dest start address index CSSA[31:0]/CDSA[31:0]*/\r
93	MmioWrite32 (DMA4_CSSA (Channel), DMA4->SourceStartAddress);\r
94	MmioWrite32 (DMA4_CDSA (Channel), DMA4->DestinationStartAddress);\r
95	\r
96	/* e) Set the Read Port addressing mode CCR[13:12], the Write Port addressing mode CCR[15:14],\r
97	read/write priority CCR[6]/CCR[26]\r
98	I changed LCH CCR[20:19]=00 and CCR[4:0]=00000 to \r
99	LCH CCR[20:19]= DMA4->WriteRequestNumber and CCR[4:0]=DMA4->ReadRequestNumber\r
100	*/\r
101	\r
102	// Read CCR\r
103	RegVal = MmioRead32 (DMA4_CCR (Channel));\r
104	\r
105	// Build reg\r
106	RegVal = ((RegVal & ~0x1f) \| DMA4->ReadRequestNumber);\r
107	RegVal = ((RegVal & ~(BIT20 \| BIT19)) \| DMA4->WriteRequestNumber << 19);\r
108	RegVal = ((RegVal & ~(0x3 << 12)) \| (DMA4->ReadPortAccessMode << 12));\r
109	RegVal = ((RegVal & ~(0x3 << 14)) \| (DMA4->WritePortAccessMode << 14));\r
110	RegVal = ((RegVal & ~(0x1 << 6)) \| (DMA4->ReadPriority << 6));\r
111	RegVal = ((RegVal & ~(0x1 << 26)) \| (DMA4->WritePriority << 26));\r
112	\r
113	// Write CCR\r
114	MmioWrite32 (DMA4_CCR (Channel), RegVal);\r
115	\r
116	/* f)- Set the source element index CSEI[15:0]*/\r
117	MmioWrite32 (DMA4_CSEI (Channel), DMA4->SourceElementIndex);\r
118	\r
119	/* - Set the source frame index CSFI[15:0]*/\r
120	MmioWrite32 (DMA4_CSFI (Channel), DMA4->SourceFrameIndex);\r
121	\r
122	\r
123	/* - Set the destination element index CDEI[15:0]*/\r
124	MmioWrite32 (DMA4_CDEI (Channel), DMA4->DestinationElementIndex);\r
125	\r
126	/* - Set the destination frame index CDFI[31:0]*/\r
127	MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);\r
9f6b977f	128	\r
	129	MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);\r
	130	\r
	131	// Enable all the status bits since we are polling\r
	132	MmioWrite32 (DMA4_CICR (Channel), DMA4_CICR_ENABLE_ALL);\r
	133	MmioWrite32 (DMA4_CSR (Channel), DMA4_CSR_RESET);\r
	134	\r
7f814ffd	135	/* 2) Start the DMA transfer by Setting the enable bit CCR[7]=1 */\r
	136	/--------------------------------------------------------------/\r
	137	//write enable bit\r
9f6b977f	138	MmioOr32 (DMA4_CCR(Channel), DMA4_CCR_ENABLE); //Launch transfer
7f814ffd	139
	140	return EFI_SUCCESS;
	141	}
	142
	143	/** \r
	144	Turn of DMA channel configured by EnableDma().\r
	145	\r
	146	@param Channel DMA Channel to configure\r
9f6b977f	147	@param SuccesMask Bits in DMA4_CSR register indicate EFI_SUCCESS\r
9f6b977f	148	@param ErrorMask Bits in DMA4_CSR register indicate EFI_DEVICE_ERROR\r
7f814ffd	149	\r
	150	@retval EFI_SUCCESS DMA hardware disabled\r
	151	@retval EFI_INVALID_PARAMETER Channel is not valid\r
	152	@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.\r
	153	\r
	154	**/
	155	EFI_STATUS
	156	EFIAPI
	157	DisableDmaChannel (
9f6b977f	158	IN UINTN Channel,
	159	IN UINT32 SuccessMask,
	160	IN UINT32 ErrorMask
7f814ffd	161	)
7f814ffd	162	{
9f6b977f	163	EFI_STATUS Status = EFI_SUCCESS;
	164	UINT32 Reg;
	165
	166
7f814ffd	167	if (Channel > DMA4_MAX_CHANNEL) {
	168	return EFI_INVALID_PARAMETER;
	169	}
	170
9f6b977f	171	do {
	172	Reg = MmioRead32 (DMA4_CSR(Channel));
	173	if ((Reg & ErrorMask) != 0) {
	174	Status = EFI_DEVICE_ERROR;
	175	DEBUG ((EFI_D_ERROR, "DMA Error (%d) %x\n", Channel, Reg));
	176	break;
	177	}
	178	} while ((Reg & SuccessMask) != SuccessMask);
	179
	180
	181	// Disable all status bits and clear them
	182	MmioWrite32 (DMA4_CICR (Channel), 0);\r
	183	MmioWrite32 (DMA4_CSR (Channel), DMA4_CSR_RESET);
	184
7f814ffd	185	MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE \| DMA4_CCR_RD_ACTIVE \| DMA4_CCR_WR_ACTIVE));
9f6b977f	186	return Status;
7f814ffd	187	}
7f814ffd	188
9f6b977f	189
9f6b977f	190
7f814ffd	191	/** \r
	192	Provides the DMA controller-specific addresses needed to access system memory.\r
	193	\r
	194	Operation is relative to the DMA bus master.\r
	195	\r
	196	@param Operation Indicates if the bus master is going to read or write to system memory.\r
	197	@param HostAddress The system memory address to map to the DMA controller.\r
	198	@param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r
	199	that were mapped. \r
	200	@param DeviceAddress The resulting map address for the bus master controller to use to\r
	201	access the hosts HostAddress. \r
	202	@param Mapping A resulting value to pass to Unmap().\r
	203	\r
	204	@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
	205	@retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer. \r
	206	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
	207	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
	208	@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
	209	\r
	210	**/
	211	EFI_STATUS
	212	EFIAPI
	213	DmaMap (
	214	IN DMA_MAP_OPERATION Operation,
	215	IN VOID *HostAddress,\r
	216	IN OUT UINTN *NumberOfBytes,\r
	217	OUT PHYSICAL_ADDRESS *DeviceAddress,\r
	218	OUT VOID **Mapping\r
	219	)
	220	{
	221	MAP_INFO_INSTANCE *Map;
	222
	223	if ( HostAddress == NULL \|\| NumberOfBytes == NULL \|\|
	224	DeviceAddress == NULL \|\| Mapping == NULL ) {
	225	return EFI_INVALID_PARAMETER;
	226	}
	227
	228
	229	if (Operation >= MapOperationMaximum) {
	230	return EFI_INVALID_PARAMETER;
	231	}
	232
	233	*DeviceAddress = ConvertToPhysicalAddress (HostAddress);
	234
	235	// Remember range so we can flush on the other side
	236	Map = AllocatePool (sizeof (MAP_INFO_INSTANCE));
	237	if (Map == NULL) {
	238	return EFI_OUT_OF_RESOURCES;
	239	}
	240
	241	*Mapping = Map;
	242
	243	Map->HostAddress = (UINTN)HostAddress;
	244	Map->DeviceAddress = *DeviceAddress;
	245	Map->NumberOfBytes = *NumberOfBytes;
	246	Map->Operation = Operation;
	247
	248	// EfiCpuFlushTypeWriteBack, EfiCpuFlushTypeInvalidate
	249	gCpu->FlushDataCache (gCpu, (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);
	250
	251	return EFI_SUCCESS;
	252	}
	253
	254
255	/** \r
256	Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or DmaMapBusMasterCommonBuffer()\r
257	operation and releases any corresponding resources.\r
258	\r
259	@param Mapping The mapping value returned from DmaMap*().\r
260	\r
261	@retval EFI_SUCCESS The range was unmapped.\r
262	@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
263	\r
264	**/
265	EFI_STATUS
266	EFIAPI
267	DmaUnmap (
268	IN VOID *Mapping\r
269	)
270	{
271	MAP_INFO_INSTANCE *Map;
272
273	if (Mapping == NULL) {
274	ASSERT (FALSE);
275	return EFI_INVALID_PARAMETER;
276	}
277
278	Map = (MAP_INFO_INSTANCE *)Mapping;
279	if (Map->Operation == MapOperationBusMasterWrite) {
280	//
281	// Make sure we read buffer from uncached memory and not the cache
282	//
283	gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate);
284	}
285
286	FreePool (Map);
287
288	return EFI_SUCCESS;
289	}
290
291	/** \r
292	Allocates pages that are suitable for an DmaMap() of type MapOperationBusMasterCommonBuffer.\r
293	mapping. \r
294	\r
295	@param MemoryType The type of memory to allocate, EfiBootServicesData or\r
296	EfiRuntimeServicesData. \r
297	@param Pages The number of pages to allocate. \r
298	@param HostAddress A pointer to store the base system memory address of the\r
299	allocated range. \r
300	\r
301	@retval EFI_SUCCESS The requested memory pages were allocated.\r
302	@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
303	MEMORY_WRITE_COMBINE and MEMORY_CACHED. \r
304	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
305	@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. \r
306	\r
307	**/EFI_STATUS
308	EFIAPI
309	DmaAllocateBuffer (
310	IN EFI_MEMORY_TYPE MemoryType,
311	IN UINTN Pages,\r
312	OUT VOID **HostAddress\r
313	)\r
314	{
315	if (HostAddress == NULL) {
316	return EFI_INVALID_PARAMETER;
317	}
318
319	//
320	// The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
321	//
322	// We used uncached memory to keep coherency
323	//
324	if (MemoryType == EfiBootServicesData) {
325	*HostAddress = UncachedAllocatePages (Pages);
326	} else if (MemoryType != EfiRuntimeServicesData) {
327	*HostAddress = UncachedAllocateRuntimePages (Pages);
328	} else {
329	return EFI_INVALID_PARAMETER;
330	}
331
332	return EFI_SUCCESS;
333	}
334
335
336	/** \r
337	Frees memory that was allocated with DmaAllocateBuffer().\r
338	\r
339	@param Pages The number of pages to free. \r
340	@param HostAddress The base system memory address of the allocated range. \r
341	\r
342	@retval EFI_SUCCESS The requested memory pages were freed.\r
343	@retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
344	was not allocated with DmaAllocateBuffer().\r
345	\r
346	**/\r
347	EFI_STATUS
348	EFIAPI
349	DmaFreeBuffer (
350	IN UINTN Pages,\r
351	IN VOID *HostAddress\r
352	)\r
353	{
354	if (HostAddress == NULL) {
355	return EFI_INVALID_PARAMETER;
356	}
357
358	UncachedFreePages (HostAddress, Pages);
359	return EFI_SUCCESS;
360	}
361
362
363	EFI_STATUS
364	EFIAPI
365	OmapDmaLibConstructor (
366	IN EFI_HANDLE ImageHandle,
367	IN EFI_SYSTEM_TABLE *SystemTable
368	)
369	{
370	EFI_STATUS Status;
371
372	// Get the Cpu protocol for later use
373	Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
374	ASSERT_EFI_ERROR(Status);
375
376	return EFI_SUCCESS;
377	}
378