[mirror_edk2.git] / Omap35xxPkg / MMCHSDxe / MMCHS.h

/** @file\r
\r
  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef _MMCHS_H_\r
#define _MMCHS_H_\r
\r
#include <Uefi.h>\r
\r
#include <Library/BaseLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/OmapLib.h>\r
#include <Library/OmapDmaLib.h>\r
#include <Library/DmaLib.h>\r
\r
#include <Protocol/EmbeddedExternalDevice.h>\r
#include <Protocol/BlockIo.h>\r
#include <Protocol/DevicePath.h>\r
\r
#include <Omap3530/Omap3530.h>\r
#include <TPS65950.h>\r
\r
#define MAX_RETRY_COUNT  (100*5)\r
\r
#define HCS               BIT30 //Host capacity support/1 = Supporting high capacity\r
#define CCS               BIT30 //Card capacity status/1 = High capacity card\r
typedef struct {\r
  UINT32  Reserved0:   7; // 0\r
  UINT32  V170_V195:   1; // 1.70V - 1.95V\r
  UINT32  V200_V260:   7; // 2.00V - 2.60V\r
  UINT32  V270_V360:   9; // 2.70V - 3.60V\r
  UINT32  RESERVED_1:  5; // Reserved\r
  UINT32  AccessMode:  2; // 00b (byte mode), 10b (sector mode)\r
  UINT32  Busy:        1; // This bit is set to LOW if the card has not finished the power up routine\r
}OCR;\r
\r
typedef struct {\r
  UINT32  NOT_USED;   // 1 [0:0]\r
  UINT32  CRC;        // CRC7 checksum [7:1]\r
  UINT32  MDT;        // Manufacturing date [19:8]\r
  UINT32  RESERVED_1; // Reserved [23:20]\r
  UINT32  PSN;        // Product serial number [55:24]\r
  UINT8   PRV;        // Product revision [63:56]\r
  UINT8   PNM[5];     // Product name [64:103]\r
  UINT16  OID;        // OEM/Application ID [119:104]\r
  UINT8   MID;        // Manufacturer ID [127:120]\r
}CID;\r
\r
typedef struct {\r
  UINT8   NOT_USED:           1; // Not used, always 1 [0:0]\r
  UINT8   CRC:                7; // CRC [7:1]\r
\r
  UINT8   RESERVED_1:         2; // Reserved [9:8]\r
  UINT8   FILE_FORMAT:        2; // File format [11:10]\r
  UINT8   TMP_WRITE_PROTECT:  1; // Temporary write protection [12:12]\r
  UINT8   PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13]\r
  UINT8   COPY:               1; // Copy flag (OTP) [14:14]\r
  UINT8   FILE_FORMAT_GRP:    1; // File format group [15:15]\r
\r
  UINT16  RESERVED_2:         5; // Reserved [20:16]\r
  UINT16  WRITE_BL_PARTIAL:   1; // Partial blocks for write allowed [21:21]\r
  UINT16  WRITE_BL_LEN:       4; // Max. write data block length [25:22]\r
  UINT16  R2W_FACTOR:         3; // Write speed factor [28:26]\r
  UINT16  RESERVED_3:         2; // Reserved [30:29]\r
  UINT16  WP_GRP_ENABLE:      1; // Write protect group enable [31:31]\r
\r
  UINT32  WP_GRP_SIZE:        7; // Write protect group size [38:32]\r
  UINT32  SECTOR_SIZE:        7; // Erase sector size [45:39]\r
  UINT32  ERASE_BLK_EN:       1; // Erase single block enable [46:46]\r
  UINT32  C_SIZE_MULT:        3; // Device size multiplier [49:47]\r
  UINT32  VDD_W_CURR_MAX:     3; // Max. write current @ VDD max [52:50]\r
  UINT32  VDD_W_CURR_MIN:     3; // Max. write current @ VDD min [55:53]\r
  UINT32  VDD_R_CURR_MAX:     3; // Max. read current @ VDD max [58:56]\r
  UINT32  VDD_R_CURR_MIN:     3; // Max. read current @ VDD min [61:59]\r
  UINT32  C_SIZELow2:         2; // Device size [63:62]\r
\r
  UINT32  C_SIZEHigh10:       10;// Device size [73:64]\r
  UINT32  RESERVED_4:         2; // Reserved [75:74]\r
  UINT32  DSR_IMP:            1; // DSR implemented [76:76]\r
  UINT32  READ_BLK_MISALIGN:  1; // Read block misalignment [77:77]\r
  UINT32  WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78]\r
  UINT32  READ_BL_PARTIAL:    1; // Partial blocks for read allowed [79:79]\r
  UINT32  READ_BL_LEN:        4; // Max. read data block length [83:80]\r
  UINT32  CCC:                12;// Card command classes [95:84]\r
\r
  UINT8   TRAN_SPEED          ;  // Max. bus clock frequency [103:96]\r
  UINT8   NSAC                ;  // Data read access-time 2 in CLK cycles (NSAC*100) [111:104]\r
  UINT8   TAAC                ;  // Data read access-time 1 [119:112]\r
\r
  UINT8   RESERVED_5:         6; // Reserved [125:120]\r
  UINT8   CSD_STRUCTURE:      2; // CSD structure [127:126]\r
}CSD;\r
\r
typedef struct {\r
  UINT8   NOT_USED:           1; // Not used, always 1 [0:0]\r
  UINT8   CRC:                7; // CRC [7:1]\r
  UINT8   RESERVED_1:         2; // Reserved [9:8]\r
  UINT8   FILE_FORMAT:        2; // File format [11:10]\r
  UINT8   TMP_WRITE_PROTECT:  1; // Temporary write protection [12:12]\r
  UINT8   PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13]\r
  UINT8   COPY:               1; // Copy flag (OTP) [14:14]\r
  UINT8   FILE_FORMAT_GRP:    1; // File format group [15:15]\r
  UINT16  RESERVED_2:         5; // Reserved [20:16]\r
  UINT16  WRITE_BL_PARTIAL:   1; // Partial blocks for write allowed [21:21]\r
  UINT16  WRITE_BL_LEN:       4; // Max. write data block length [25:22]\r
  UINT16  R2W_FACTOR:         3; // Write speed factor [28:26]\r
  UINT16  RESERVED_3:         2; // Reserved [30:29]\r
  UINT16  WP_GRP_ENABLE:      1; // Write protect group enable [31:31]\r
  UINT16  WP_GRP_SIZE:        7; // Write protect group size [38:32]\r
  UINT16  SECTOR_SIZE:        7; // Erase sector size [45:39]\r
  UINT16  ERASE_BLK_EN:       1; // Erase single block enable [46:46]\r
  UINT16  RESERVED_4:         1; // Reserved [47:47]\r
  UINT32  C_SIZELow16:        16;// Device size [69:48]\r
  UINT32  C_SIZEHigh6:        6; // Device size [69:48]\r
  UINT32  RESERVED_5:         6; // Reserved [75:70]\r
  UINT32  DSR_IMP:            1; // DSR implemented [76:76]\r
  UINT32  READ_BLK_MISALIGN:  1; // Read block misalignment [77:77]\r
  UINT32  WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78]\r
  UINT32  READ_BL_PARTIAL:    1; // Partial blocks for read allowed [79:79]\r
  UINT16  READ_BL_LEN:        4; // Max. read data block length [83:80]\r
  UINT16  CCC:                12;// Card command classes [95:84]\r
  UINT8   TRAN_SPEED          ;  // Max. bus clock frequency [103:96]\r
  UINT8   NSAC                ;  // Data read access-time 2 in CLK cycles (NSAC*100) [111:104]\r
  UINT8   TAAC                ;  // Data read access-time 1 [119:112]\r
  UINT8   RESERVED_6:         6; // 0 [125:120]\r
  UINT8   CSD_STRUCTURE:      2; // CSD structure [127:126]\r
}CSD_SDV2;\r
\r
typedef enum {\r
  UNKNOWN_CARD,\r
  MMC_CARD,              //MMC card\r
  SD_CARD,               //SD 1.1 card\r
  SD_CARD_2,             //SD 2.0 or above standard card\r
  SD_CARD_2_HIGH         //SD 2.0 or above high capacity card\r
} CARD_TYPE;\r
\r
typedef enum {\r
  READ,\r
  WRITE\r
} OPERATION_TYPE;\r
\r
typedef struct  {\r
  UINT16    RCA;\r
  UINTN     BlockSize;\r
  UINTN     NumBlocks;\r
  UINTN     ClockFrequencySelect;\r
  CARD_TYPE CardType;\r
  OCR       OCRData;\r
  CID       CIDData;\r
  CSD       CSDData;\r
} CARD_INFO;\r
\r
EFI_STATUS\r
DetectCard (\r
  VOID\r
  );\r
\r
extern EFI_BLOCK_IO_PROTOCOL gBlockIo;\r
\r
#endif\r
Commit	Line	Data
a3f98646	1	/** @file\r
a3f98646	2	\r
3d70643b	3	Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
a3f98646	4	\r
538311f7	5	SPDX-License-Identifier: BSD-2-Clause-Patent\r
a3f98646	6	\r
	7	**/\r
	8	\r
	9	#ifndef _MMCHS_H_\r
	10	#define _MMCHS_H_\r
	11	\r
1e57a462	12	#include <Uefi.h>\r
	13	\r
	14	#include <Library/BaseLib.h>\r
	15	#include <Library/MemoryAllocationLib.h>\r
	16	#include <Library/DebugLib.h>\r
	17	#include <Library/IoLib.h>\r
	18	#include <Library/PcdLib.h>\r
	19	#include <Library/UefiBootServicesTableLib.h>\r
	20	#include <Library/BaseMemoryLib.h>\r
	21	#include <Library/OmapLib.h>\r
	22	#include <Library/OmapDmaLib.h>\r
	23	#include <Library/DmaLib.h>\r
	24	\r
a3f98646	25	#include <Protocol/EmbeddedExternalDevice.h>\r
1e57a462	26	#include <Protocol/BlockIo.h>\r
	27	#include <Protocol/DevicePath.h>\r
	28	\r
a3f98646	29	#include <Omap3530/Omap3530.h>\r
	30	#include <TPS65950.h>\r
	31	\r
1e57a462	32	#define MAX_RETRY_COUNT (100*5)\r
1e57a462	33	\r
43263288	34	#define HCS BIT30 //Host capacity support/1 = Supporting high capacity\r
43263288	35	#define CCS BIT30 //Card capacity status/1 = High capacity card\r
a3f98646	36	typedef struct {\r
3402aac7	37	UINT32 Reserved0: 7; // 0\r
a3f98646	38	UINT32 V170_V195: 1; // 1.70V - 1.95V\r
	39	UINT32 V200_V260: 7; // 2.00V - 2.60V\r
	40	UINT32 V270_V360: 9; // 2.70V - 3.60V\r
	41	UINT32 RESERVED_1: 5; // Reserved\r
3402aac7	42	UINT32 AccessMode: 2; // 00b (byte mode), 10b (sector mode)\r
a3f98646	43	UINT32 Busy: 1; // This bit is set to LOW if the card has not finished the power up routine\r
	44	}OCR;\r
	45	\r
	46	typedef struct {\r
	47	UINT32 NOT_USED; // 1 [0:0]\r
	48	UINT32 CRC; // CRC7 checksum [7:1]\r
	49	UINT32 MDT; // Manufacturing date [19:8]\r
	50	UINT32 RESERVED_1; // Reserved [23:20]\r
	51	UINT32 PSN; // Product serial number [55:24]\r
	52	UINT8 PRV; // Product revision [63:56]\r
	53	UINT8 PNM[5]; // Product name [64:103]\r
	54	UINT16 OID; // OEM/Application ID [119:104]\r
	55	UINT8 MID; // Manufacturer ID [127:120]\r
	56	}CID;\r
	57	\r
	58	typedef struct {\r
	59	UINT8 NOT_USED: 1; // Not used, always 1 [0:0]\r
	60	UINT8 CRC: 7; // CRC [7:1]\r
8c6151f2	61	\r
a3f98646	62	UINT8 RESERVED_1: 2; // Reserved [9:8]\r
	63	UINT8 FILE_FORMAT: 2; // File format [11:10]\r
	64	UINT8 TMP_WRITE_PROTECT: 1; // Temporary write protection [12:12]\r
	65	UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13]\r
	66	UINT8 COPY: 1; // Copy flag (OTP) [14:14]\r
	67	UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15]\r
3402aac7	68	\r
a3f98646	69	UINT16 RESERVED_2: 5; // Reserved [20:16]\r
	70	UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21]\r
	71	UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22]\r
	72	UINT16 R2W_FACTOR: 3; // Write speed factor [28:26]\r
	73	UINT16 RESERVED_3: 2; // Reserved [30:29]\r
	74	UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31]\r
3402aac7	75	\r
a3f98646	76	UINT32 WP_GRP_SIZE: 7; // Write protect group size [38:32]\r
	77	UINT32 SECTOR_SIZE: 7; // Erase sector size [45:39]\r
	78	UINT32 ERASE_BLK_EN: 1; // Erase single block enable [46:46]\r
	79	UINT32 C_SIZE_MULT: 3; // Device size multiplier [49:47]\r
	80	UINT32 VDD_W_CURR_MAX: 3; // Max. write current @ VDD max [52:50]\r
	81	UINT32 VDD_W_CURR_MIN: 3; // Max. write current @ VDD min [55:53]\r
	82	UINT32 VDD_R_CURR_MAX: 3; // Max. read current @ VDD max [58:56]\r
	83	UINT32 VDD_R_CURR_MIN: 3; // Max. read current @ VDD min [61:59]\r
8c6151f2	84	UINT32 C_SIZELow2: 2; // Device size [63:62]\r
3402aac7	85	\r
8c6151f2	86	UINT32 C_SIZEHigh10: 10;// Device size [73:64]\r
a3f98646	87	UINT32 RESERVED_4: 2; // Reserved [75:74]\r
	88	UINT32 DSR_IMP: 1; // DSR implemented [76:76]\r
	89	UINT32 READ_BLK_MISALIGN: 1; // Read block misalignment [77:77]\r
	90	UINT32 WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78]\r
	91	UINT32 READ_BL_PARTIAL: 1; // Partial blocks for read allowed [79:79]\r
	92	UINT32 READ_BL_LEN: 4; // Max. read data block length [83:80]\r
	93	UINT32 CCC: 12;// Card command classes [95:84]\r
8c6151f2	94	\r
a3f98646	95	UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96]\r
	96	UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104]\r
	97	UINT8 TAAC ; // Data read access-time 1 [119:112]\r
3402aac7	98	\r
a3f98646	99	UINT8 RESERVED_5: 6; // Reserved [125:120]\r
	100	UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126]\r
	101	}CSD;\r
	102	\r
	103	typedef struct {\r
	104	UINT8 NOT_USED: 1; // Not used, always 1 [0:0]\r
	105	UINT8 CRC: 7; // CRC [7:1]\r
	106	UINT8 RESERVED_1: 2; // Reserved [9:8]\r
	107	UINT8 FILE_FORMAT: 2; // File format [11:10]\r
	108	UINT8 TMP_WRITE_PROTECT: 1; // Temporary write protection [12:12]\r
	109	UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13]\r
	110	UINT8 COPY: 1; // Copy flag (OTP) [14:14]\r
	111	UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15]\r
	112	UINT16 RESERVED_2: 5; // Reserved [20:16]\r
	113	UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21]\r
	114	UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22]\r
	115	UINT16 R2W_FACTOR: 3; // Write speed factor [28:26]\r
	116	UINT16 RESERVED_3: 2; // Reserved [30:29]\r
	117	UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31]\r
	118	UINT16 WP_GRP_SIZE: 7; // Write protect group size [38:32]\r
	119	UINT16 SECTOR_SIZE: 7; // Erase sector size [45:39]\r
	120	UINT16 ERASE_BLK_EN: 1; // Erase single block enable [46:46]\r
	121	UINT16 RESERVED_4: 1; // Reserved [47:47]\r
	122	UINT32 C_SIZELow16: 16;// Device size [69:48]\r
	123	UINT32 C_SIZEHigh6: 6; // Device size [69:48]\r
	124	UINT32 RESERVED_5: 6; // Reserved [75:70]\r
	125	UINT32 DSR_IMP: 1; // DSR implemented [76:76]\r
	126	UINT32 READ_BLK_MISALIGN: 1; // Read block misalignment [77:77]\r
	127	UINT32 WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78]\r
	128	UINT32 READ_BL_PARTIAL: 1; // Partial blocks for read allowed [79:79]\r
	129	UINT16 READ_BL_LEN: 4; // Max. read data block length [83:80]\r
	130	UINT16 CCC: 12;// Card command classes [95:84]\r
	131	UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96]\r
	132	UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104]\r
	133	UINT8 TAAC ; // Data read access-time 1 [119:112]\r
	134	UINT8 RESERVED_6: 6; // 0 [125:120]\r
	135	UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126]\r
	136	}CSD_SDV2;\r
	137	\r
1e57a462	138	typedef enum {\r
	139	UNKNOWN_CARD,\r
	140	MMC_CARD, //MMC card\r
	141	SD_CARD, //SD 1.1 card\r
	142	SD_CARD_2, //SD 2.0 or above standard card\r
	143	SD_CARD_2_HIGH //SD 2.0 or above high capacity card\r
a3f98646	144	} CARD_TYPE;\r
	145	\r
	146	typedef enum {\r
	147	READ,\r
	148	WRITE\r
	149	} OPERATION_TYPE;\r
	150	\r
8c6151f2	151	typedef struct {\r
a3f98646	152	UINT16 RCA;\r
	153	UINTN BlockSize;\r
	154	UINTN NumBlocks;\r
	155	UINTN ClockFrequencySelect;\r
	156	CARD_TYPE CardType;\r
	157	OCR OCRData;\r
	158	CID CIDData;\r
	159	CSD CSDData;\r
	160	} CARD_INFO;\r
	161	\r
1e57a462	162	EFI_STATUS\r
	163	DetectCard (\r
	164	VOID\r
8c6151f2	165	);\r
	166	\r
	167	extern EFI_BLOCK_IO_PROTOCOL gBlockIo;\r
	168	\r
a3f98646	169	#endif\r