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1 | /** @file\r |
2 | OVMF Platform definitions\r | |
3 | \r | |
4 | Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>\r | |
5 | \r | |
6 | This program and the accompanying materials are licensed and made\r | |
7 | available under the terms and conditions of the BSD License which\r | |
8 | accompanies this distribution. The full text of the license may\r | |
9 | be found at http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef __OVMF_PLATFORMS_H__\r | |
16 | #define __OVMF_PLATFORMS_H__\r | |
17 | \r | |
18 | #include <Library/PciLib.h>\r | |
19 | #include <IndustryStandard/Pci22.h>\r | |
20 | \r | |
21 | //\r | |
22 | // Host Bridge Device ID (DID) values for PIIX4 and Q35/MCH\r | |
23 | //\r | |
24 | #define INTEL_82441_DEVICE_ID 0x1237 // PIIX4\r | |
25 | #define INTEL_Q35_MCH_DEVICE_ID 0x29C0 // Q35\r | |
26 | \r | |
27 | //\r | |
28 | // OVMF Host Bridge DID Address\r | |
29 | //\r | |
30 | #define OVMF_HOSTBRIDGE_DID \\r | |
31 | PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)\r | |
32 | \r | |
33 | //\r | |
34 | // Power Management Device and Function numbers for PIIX4 and Q35/MCH\r | |
35 | //\r | |
36 | #define OVMF_PM_DEVICE_PIIX4 0x01\r | |
37 | #define OVMF_PM_FUNC_PIIX4 0x03\r | |
38 | #define OVMF_PM_DEVICE_Q35 0x1f\r | |
39 | #define OVMF_PM_FUNC_Q35 0x00\r | |
40 | \r | |
41 | //\r | |
42 | // Power Management Register access for PIIX4 and Q35/MCH\r | |
43 | //\r | |
44 | #define POWER_MGMT_REGISTER_PIIX4(Offset) \\r | |
45 | PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_PIIX4, OVMF_PM_FUNC_PIIX4, (Offset))\r | |
46 | #define POWER_MGMT_REGISTER_Q35(Offset) \\r | |
47 | PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_Q35, OVMF_PM_FUNC_Q35, (Offset))\r | |
48 | \r | |
49 | #endif\r |