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1 | /** @file\r |
2 | Confidential Computing X64 Instruction\r | |
3 | \r | |
4 | Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.<BR>\r | |
5 | Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>\r | |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
7 | \r | |
8 | **/\r | |
9 | \r | |
10 | #ifndef CC_INSTRUCTION_H_\r | |
11 | #define CC_INSTRUCTION_H_\r | |
12 | \r | |
13 | #include <Base.h>\r | |
14 | #include <Uefi.h>\r | |
15 | #include <Register/Amd/Ghcb.h>\r | |
16 | #include <IndustryStandard/InstructionParsing.h>\r | |
17 | #include <Protocol/DebugSupport.h>\r | |
18 | \r | |
19 | //\r | |
20 | // Instruction execution mode definition\r | |
21 | //\r | |
22 | typedef enum {\r | |
23 | LongMode64Bit = 0,\r | |
24 | LongModeCompat32Bit,\r | |
25 | LongModeCompat16Bit,\r | |
26 | } CC_INSTRUCTION_MODE;\r | |
27 | \r | |
28 | //\r | |
29 | // Instruction size definition (for operand and address)\r | |
30 | //\r | |
31 | typedef enum {\r | |
32 | Size8Bits = 0,\r | |
33 | Size16Bits,\r | |
34 | Size32Bits,\r | |
35 | Size64Bits,\r | |
36 | } CC_INSTRUCTION_SIZE;\r | |
37 | \r | |
38 | //\r | |
39 | // Intruction segment definition\r | |
40 | //\r | |
41 | typedef enum {\r | |
42 | SegmentEs = 0,\r | |
43 | SegmentCs,\r | |
44 | SegmentSs,\r | |
45 | SegmentDs,\r | |
46 | SegmentFs,\r | |
47 | SegmentGs,\r | |
48 | } CC_INSTRUCTION_SEGMENT;\r | |
49 | \r | |
50 | //\r | |
51 | // Instruction rep function definition\r | |
52 | //\r | |
53 | typedef enum {\r | |
54 | RepNone = 0,\r | |
55 | RepZ,\r | |
56 | RepNZ,\r | |
57 | } CC_INSTRUCTION_REP;\r | |
58 | \r | |
59 | typedef struct {\r | |
60 | UINT8 Rm;\r | |
61 | UINT8 Reg;\r | |
62 | UINT8 Mod;\r | |
63 | } CC_INSTRUCTION_MODRM_EXT;\r | |
64 | \r | |
65 | typedef struct {\r | |
66 | UINT8 Base;\r | |
67 | UINT8 Index;\r | |
68 | UINT8 Scale;\r | |
69 | } CC_INSTRUCTION_SIB_EXT;\r | |
70 | \r | |
71 | //\r | |
72 | // Instruction opcode definition\r | |
73 | //\r | |
74 | typedef struct {\r | |
75 | CC_INSTRUCTION_MODRM_EXT ModRm;\r | |
76 | \r | |
77 | CC_INSTRUCTION_SIB_EXT Sib;\r | |
78 | \r | |
79 | UINTN RegData;\r | |
80 | UINTN RmData;\r | |
81 | } CC_INSTRUCTION_OPCODE_EXT;\r | |
82 | \r | |
83 | //\r | |
84 | // Instruction parsing context definition\r | |
85 | //\r | |
86 | typedef struct {\r | |
87 | GHCB *Ghcb;\r | |
88 | \r | |
89 | CC_INSTRUCTION_MODE Mode;\r | |
90 | CC_INSTRUCTION_SIZE DataSize;\r | |
91 | CC_INSTRUCTION_SIZE AddrSize;\r | |
92 | BOOLEAN SegmentSpecified;\r | |
93 | CC_INSTRUCTION_SEGMENT Segment;\r | |
94 | CC_INSTRUCTION_REP RepMode;\r | |
95 | \r | |
96 | UINT8 *Begin;\r | |
97 | UINT8 *End;\r | |
98 | \r | |
99 | UINT8 *Prefixes;\r | |
100 | UINT8 *OpCodes;\r | |
101 | UINT8 *Displacement;\r | |
102 | UINT8 *Immediate;\r | |
103 | \r | |
104 | INSTRUCTION_REX_PREFIX RexPrefix;\r | |
105 | \r | |
106 | BOOLEAN ModRmPresent;\r | |
107 | INSTRUCTION_MODRM ModRm;\r | |
108 | \r | |
109 | BOOLEAN SibPresent;\r | |
110 | INSTRUCTION_SIB Sib;\r | |
111 | \r | |
112 | UINTN PrefixSize;\r | |
113 | UINTN OpCodeSize;\r | |
114 | UINTN DisplacementSize;\r | |
115 | UINTN ImmediateSize;\r | |
116 | \r | |
117 | CC_INSTRUCTION_OPCODE_EXT Ext;\r | |
118 | } CC_INSTRUCTION_DATA;\r | |
119 | \r | |
120 | EFI_STATUS\r | |
121 | CcInitInstructionData (\r | |
122 | IN OUT CC_INSTRUCTION_DATA *InstructionData,\r | |
123 | IN GHCB *Ghcb,\r | |
124 | IN EFI_SYSTEM_CONTEXT_X64 *Regs\r | |
125 | );\r | |
126 | \r | |
127 | /**\r | |
128 | Return a pointer to the contents of the specified register.\r | |
129 | \r | |
130 | Based upon the input register, return a pointer to the registers contents\r | |
131 | in the x86 processor context.\r | |
132 | \r | |
133 | @param[in] Regs x64 processor context\r | |
134 | @param[in] Register Register to obtain pointer for\r | |
135 | \r | |
136 | @return Pointer to the contents of the requested register\r | |
137 | \r | |
138 | **/\r | |
139 | UINT64 *\r | |
140 | CcGetRegisterPointer (\r | |
141 | IN EFI_SYSTEM_CONTEXT_X64 *Regs,\r | |
142 | IN UINT8 Register\r | |
143 | );\r | |
144 | \r | |
145 | /**\r | |
146 | Decode a ModRM byte.\r | |
147 | \r | |
148 | Examine the instruction parsing context to decode a ModRM byte and the SIB\r | |
149 | byte, if present.\r | |
150 | \r | |
151 | @param[in] Regs x64 processor context\r | |
152 | @param[in, out] InstructionData Instruction parsing context\r | |
153 | \r | |
154 | **/\r | |
155 | VOID\r | |
156 | CcDecodeModRm (\r | |
157 | IN EFI_SYSTEM_CONTEXT_X64 *Regs,\r | |
158 | IN OUT CC_INSTRUCTION_DATA *InstructionData\r | |
159 | );\r | |
160 | \r | |
161 | /**\r | |
162 | Determine instruction length\r | |
163 | \r | |
164 | Return the total length of the parsed instruction.\r | |
165 | \r | |
166 | @param[in] InstructionData Instruction parsing context\r | |
167 | \r | |
168 | @return Length of parsed instruction\r | |
169 | \r | |
170 | **/\r | |
171 | UINT64\r | |
172 | CcInstructionLength (\r | |
173 | IN CC_INSTRUCTION_DATA *InstructionData\r | |
174 | );\r | |
175 | \r | |
176 | /**\r | |
177 | Initialize the instruction parsing context.\r | |
178 | \r | |
179 | Initialize the instruction parsing context, which includes decoding the\r | |
180 | instruction prefixes.\r | |
181 | \r | |
182 | @param[in, out] InstructionData Instruction parsing context\r | |
183 | @param[in] Ghcb Pointer to the Guest-Hypervisor Communication\r | |
184 | Block\r | |
185 | @param[in] Regs x64 processor context\r | |
186 | \r | |
187 | @retval EFI_SUCCESS Successfully initialize InstructionData\r | |
188 | @retval Others Other error as indicated\r | |
189 | **/\r | |
190 | EFI_STATUS\r | |
191 | CcInitInstructionData (\r | |
192 | IN OUT CC_INSTRUCTION_DATA *InstructionData,\r | |
193 | IN GHCB *Ghcb,\r | |
194 | IN EFI_SYSTEM_CONTEXT_X64 *Regs\r | |
195 | );\r | |
196 | \r | |
197 | #endif\r |