CorebootPayloadPkg/ResetSystemLib: Implement ResetPlatformSpecific

[mirror_edk2.git] / OvmfPkg / Library / ResetSystemLib / ResetSystemLib.c

/** @file\r
  Reset System Library functions for OVMF\r
\r
  Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include <Base.h>\r
\r
#include <Library/BaseLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/TimerLib.h>\r
#include <OvmfPlatforms.h>\r
\r
#include <OvmfPlatforms.h>\r
\r
VOID\r
AcpiPmControl (\r
  UINTN SuspendType\r
  )\r
{\r
  UINT16 AcpiPmBaseAddress;\r
  UINT16 HostBridgeDevId;\r
\r
  ASSERT (SuspendType < 6);\r
\r
  AcpiPmBaseAddress = 0;\r
  HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);\r
  switch (HostBridgeDevId) {\r
  case INTEL_82441_DEVICE_ID:\r
    AcpiPmBaseAddress = PIIX4_PMBA_VALUE;\r
    break;\r
  case INTEL_Q35_MCH_DEVICE_ID:\r
    AcpiPmBaseAddress = ICH9_PMBASE_VALUE;\r
    break;\r
  default:\r
    ASSERT (FALSE);\r
    CpuDeadLoop ();\r
  }\r
\r
  IoBitFieldWrite16 (AcpiPmBaseAddress + 4, 10, 13, (UINT16) SuspendType);\r
  IoOr16 (AcpiPmBaseAddress + 4, BIT13);\r
  CpuDeadLoop ();\r
}\r
\r
/**\r
  Calling this function causes a system-wide reset. This sets\r
  all circuitry within the system to its initial state. This type of reset\r
  is asynchronous to system operation and operates without regard to\r
  cycle boundaries.\r
\r
  System reset should not return, if it returns, it means the system does\r
  not support cold reset.\r
**/\r
VOID\r
EFIAPI\r
ResetCold (\r
  VOID\r
  )\r
{\r
  IoWrite8 (0xCF9, BIT2 | BIT1); // 1st choice: PIIX3 RCR, RCPU|SRST\r
  MicroSecondDelay (50);\r
\r
  IoWrite8 (0x64, 0xfe);         // 2nd choice: keyboard controller\r
  CpuDeadLoop ();\r
}\r
\r
/**\r
  Calling this function causes a system-wide initialization. The processors\r
  are set to their initial state, and pending cycles are not corrupted.\r
\r
  System reset should not return, if it returns, it means the system does\r
  not support warm reset.\r
**/\r
VOID\r
EFIAPI\r
ResetWarm (\r
  VOID\r
  )\r
{\r
  IoWrite8 (0x64, 0xfe);\r
  CpuDeadLoop ();\r
}\r
\r
/**\r
  Calling this function causes the system to enter a power state equivalent\r
  to the ACPI G2/S5 or G3 states.\r
\r
  System shutdown should not return, if it returns, it means the system does\r
  not support shut down reset.\r
**/\r
VOID\r
EFIAPI\r
ResetShutdown (\r
  VOID\r
  )\r
{\r
  AcpiPmControl (0);\r
  ASSERT (FALSE);\r
}\r
\r
\r
/**\r
  Calling this function causes the system to enter a power state for capsule\r
  update.\r
\r
  Reset update should not return, if it returns, it means the system does\r
  not support capsule update.\r
\r
**/\r
VOID\r
EFIAPI\r
EnterS3WithImmediateWake (\r
  VOID\r
  )\r
{\r
  AcpiPmControl (1);\r
  ASSERT (FALSE);\r
}\r