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OvmfPkg: Change SEV Launch Secret API to be UINT64 for base and size
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7b202cb0 1## @file\r
49ba9447 2# EFI/Framework Open Virtual Machine Firmware (OVMF) platform\r
3#\r
e557442e 4# Copyright (c) 2020, Rebecca Cran <rebecca@bsdio.com>\r
10fa47e5 5# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
e557442e 6# Copyright (c) 2014, Pluribus Networks, Inc.\r
49ba9447 7#\r
b26f0cf9 8# SPDX-License-Identifier: BSD-2-Clause-Patent\r
49ba9447 9#\r
7b202cb0 10##\r
49ba9447 11\r
12[Defines]\r
46293a42 13 DEC_SPECIFICATION = 0x00010005\r
49ba9447 14 PACKAGE_NAME = OvmfPkg\r
15 PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5\r
16 PACKAGE_VERSION = 0.1\r
17\r
50944545 18[Includes]\r
19 Include\r
eb7cad3f 20 Csm/Include\r
50944545 21\r
28b29a70 22[LibraryClasses]\r
e557442e
LE
23 ## @libraryclass Access bhyve's firmware control interface.\r
24 BhyveFwCtlLib|Include/Library/BhyveFwCtlLib.h\r
25\r
f6c6c020 26 ## @libraryclass Loads and boots a Linux kernel image\r
27 #\r
28 LoadLinuxLib|Include/Library/LoadLinuxLib.h\r
29\r
7cfc48fe
LE
30 ## @libraryclass Declares helper functions for Secure Encrypted\r
31 # Virtualization (SEV) guests.\r
32 MemEncryptSevLib|Include/Library/MemEncryptSevLib.h\r
33\r
28b29a70 34 ## @libraryclass Save and restore variables using a file\r
35 #\r
36 NvVarsFileLib|Include/Library/NvVarsFileLib.h\r
37\r
392a3146
LE
38 ## @libraryclass Provides services to work with PCI capabilities in PCI\r
39 # config space.\r
40 PciCapLib|Include/Library/PciCapLib.h\r
41\r
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LE
42 ## @libraryclass Layered on top of PciCapLib, allows clients to plug an\r
43 # EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config\r
44 # space access.\r
45 PciCapPciIoLib|Include/Library/PciCapPciIoLib.h\r
46\r
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LE
47 ## @libraryclass Layered on top of PciCapLib, allows clients to plug a\r
48 # PciSegmentLib backend into PciCapLib, for config space\r
49 # access.\r
50 PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h\r
51\r
77874cee
LE
52 ## @libraryclass Register a status code handler for printing the Boot\r
53 # Manager's LoadImage() and StartImage() preparations, and\r
54 # return codes, to the UEFI console.\r
55 PlatformBmPrintScLib|Include/Library/PlatformBmPrintScLib.h\r
56\r
7cfc48fe
LE
57 ## @libraryclass Customize FVB2 protocol member functions for a platform.\r
58 PlatformFvbLib|Include/Library/PlatformFvbLib.h\r
59\r
f1ec65ba 60 ## @libraryclass Access QEMU's firmware configuration interface\r
61 #\r
62 QemuFwCfgLib|Include/Library/QemuFwCfgLib.h\r
63\r
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LE
64 ## @libraryclass S3 support for QEMU fw_cfg\r
65 #\r
66 QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h\r
67\r
611c7f11
LE
68 ## @libraryclass Parse the contents of named fw_cfg files as simple\r
69 # (scalar) data types.\r
70 QemuFwCfgSimpleParserLib|Include/Library/QemuFwCfgSimpleParserLib.h\r
71\r
cca7475b
LE
72 ## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder"\r
73 # fw_cfg file.\r
74 #\r
75 QemuBootOrderLib|Include/Library/QemuBootOrderLib.h\r
76\r
28de1a55
AB
77 ## @libraryclass Load a kernel image and command line passed to QEMU via\r
78 # the command line\r
79 #\r
80 QemuLoadImageLib|Include/Library/QemuLoadImageLib.h\r
81\r
28b29a70 82 ## @libraryclass Serialize (and deserialize) variables\r
83 #\r
84 SerializeVariablesLib|Include/Library/SerializeVariablesLib.h\r
85\r
7cfc48fe
LE
86 ## @libraryclass Declares utility functions for virtio device drivers.\r
87 VirtioLib|Include/Library/VirtioLib.h\r
88\r
89 ## @libraryclass Install Virtio Device Protocol instances on virtio-mmio\r
90 # transports.\r
91 VirtioMmioDeviceLib|Include/Library/VirtioMmioDeviceLib.h\r
92\r
cd8ff8fd
AB
93 ## @libraryclass Invoke Xen hypercalls\r
94 #\r
95 XenHypercallLib|Include/Library/XenHypercallLib.h\r
96\r
0169352e
AB
97 ## @libraryclass Manage XenBus device path and I/O handles\r
98 #\r
99 XenIoMmioLib|Include/Library/XenIoMmioLib.h\r
100\r
f496443e
AP
101 ## @libraryclass Get information about Xen\r
102 #\r
103 XenPlatformLib|Include/Library/XenPlatformLib.h\r
104\r
7b202cb0 105[Guids]\r
1dc875a7
AB
106 gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}\r
107 gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}\r
108 gOvmfPkKek1AppPrefixGuid = {0x4e32566d, 0x8e9e, 0x4f52, {0x81, 0xd3, 0x5b, 0xb9, 0x71, 0x5f, 0x97, 0x27}}\r
109 gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}\r
110 gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}\r
111 gQemuRamfbGuid = {0x557423a1, 0x63ab, 0x406c, {0xbe, 0x7e, 0x91, 0xcd, 0xbc, 0x08, 0xc4, 0x57}}\r
112 gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}\r
113 gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}\r
114 gMicrosoftVendorGuid = {0x77fa9abd, 0x0359, 0x4d32, {0xbd, 0x60, 0x28, 0xf4, 0xe7, 0x8f, 0x78, 0x4b}}\r
115 gEfiLegacyBiosGuid = {0x2E3044AC, 0x879F, 0x490F, {0x97, 0x60, 0xBB, 0xDF, 0xAF, 0x69, 0x5F, 0x50}}\r
116 gEfiLegacyDevOrderVariableGuid = {0xa56074db, 0x65fe, 0x45f7, {0xbd, 0x21, 0x2d, 0x2b, 0xdd, 0x8e, 0x96, 0x52}}\r
117 gLinuxEfiInitrdMediaGuid = {0x5568e427, 0x68fc, 0x4f3d, {0xac, 0x74, 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68}}\r
118 gQemuKernelLoaderFsMediaGuid = {0x1428f772, 0xb64a, 0x441e, {0xb8, 0xc3, 0x9e, 0xbd, 0xd7, 0xf8, 0x93, 0xc7}}\r
b261a30c 119 gGrubFileGuid = {0xb5ae312c, 0xbc8a, 0x43b1, {0x9c, 0x62, 0xeb, 0xb8, 0x26, 0xdd, 0x5d, 0x07}}\r
01726b6d 120 gSevLaunchSecretGuid = {0xadf956ad, 0xe98c, 0x484c, {0xae, 0x11, 0xb5, 0x1c, 0x7d, 0x33, 0x64, 0x47}}\r
49ba9447 121\r
6b3d196a
AB
122[Ppis]\r
123 # PPI whose presence in the PPI database signals that the TPM base address\r
124 # has been discovered and recorded\r
1dc875a7 125 gOvmfTpmDiscoveredPpiGuid = {0xb9a61ad0, 0x2802, 0x41f3, {0xb5, 0x13, 0x96, 0x51, 0xce, 0x6b, 0xd5, 0x75}}\r
6b3d196a 126\r
b0f51446 127[Protocols]\r
1dc875a7
AB
128 gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}\r
129 gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}\r
130 gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}\r
131 gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}\r
132 gEfiLegacy8259ProtocolGuid = {0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1}}\r
133 gEfiFirmwareVolumeProtocolGuid = {0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xcd, 0x81, 0x54, 0xbd, 0x27, 0xf8}}\r
134 gEfiIsaAcpiProtocolGuid = {0x64a892dc, 0x5561, 0x4536, {0x92, 0xc7, 0x79, 0x9b, 0xfc, 0x18, 0x33, 0x55}}\r
135 gEfiIsaIoProtocolGuid = {0x7ee2bd44, 0x3da0, 0x11d4, {0x9a, 0x38, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}\r
136 gEfiLegacyBiosProtocolGuid = {0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d}}\r
137 gEfiLegacyBiosPlatformProtocolGuid = {0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x09, 0x07, 0x9c, 0x0c, 0xb4}}\r
138 gEfiLegacyInterruptProtocolGuid = {0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe}}\r
139 gEfiVgaMiniPortProtocolGuid = {0xc7735a2f, 0x88f5, 0x4882, {0xae, 0x63, 0xfa, 0xac, 0x8c, 0x8b, 0x86, 0xb3}}\r
140 gOvmfLoadedX86LinuxKernelProtocolGuid = {0xa3edc05d, 0xb618, 0x4ff6, {0x95, 0x52, 0x76, 0xd7, 0x88, 0x63, 0x43, 0xc8}}\r
b0f51446 141\r
61069836 142[PcdsFixedAtBuild]\r
b36f701d
JJ
143 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0\r
144 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1\r
145 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15\r
146 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16\r
61069836 147\r
b90aefa9 148 ## This flag is used to control the destination port for PlatformDebugLibIoPort\r
149 gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4\r
150\r
37078a63 151 ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and\r
152 # LUNs are retrieved from the host during virtio-scsi setup.\r
153 # MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun\r
154 # possible devices. This can take extremely long, for example with\r
155 # MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit\r
156 # MaxTarget and MaxLun, independently, should the host report higher values,\r
157 # so that scanning the number of devices given by their product is still\r
158 # acceptably fast.\r
159 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6\r
160 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7\r
161\r
7efce2e5
LA
162 ## Sets the *inclusive* number of targets and LUNs that PvScsi exposes for\r
163 # scan by ScsiBusDxe.\r
164 # As specified above for VirtioScsi, ScsiBusDxe scans all MaxTarget * MaxLun\r
165 # possible devices, which can take extremely long. Thus, the below constants\r
166 # are used so that scanning the number of devices given by their product\r
167 # is still acceptably fast.\r
168 gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxTargetLimit|64|UINT8|0x36\r
169 gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxLunLimit|0|UINT8|0x37\r
170\r
c4c15b87
LA
171 ## After PvScsiDxe sends a SCSI request to the device, it waits for\r
172 # the request completion in a polling loop.\r
173 # This constant defines how many micro-seconds to wait between each\r
174 # polling loop iteration.\r
175 gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiWaitForCmpStallInUsecs|5|UINT32|0x38\r
176\r
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NL
177 ## Set the *inclusive* number of targets that MptScsi exposes for scan\r
178 # by ScsiBusDxe.\r
179 gUefiOvmfPkgTokenSpaceGuid.PcdMptScsiMaxTargetLimit|7|UINT8|0x39\r
180\r
505812ae 181 ## Microseconds to stall between polling for MptScsi request result\r
d9269d69 182 gUefiOvmfPkgTokenSpaceGuid.PcdMptScsiStallPerPollUsec|5|UINT32|0x3a\r
505812ae 183\r
12d99b8f
GL
184 ## Set the *inclusive* number of targets and LUNs that LsiScsi exposes for\r
185 # scan by ScsiBusDxe.\r
186 gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiMaxTargetLimit|7|UINT8|0x3b\r
187 gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiMaxLunLimit|0|UINT8|0x3c\r
188\r
31830b07
GL
189 ## Microseconds to stall between polling for LsiScsi request result\r
190 gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiStallPerPollUsec|5|UINT32|0x3d\r
191\r
501e08fc
JJ
192 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8\r
193 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9\r
194 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa\r
195 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb\r
196 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc\r
197 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd\r
198 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe\r
199 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf\r
b382ede3
JJ
200 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11\r
201 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12\r
7cb6b0e0
JJ
202 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13\r
203 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14\r
6a7cba79
LE
204 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18\r
205 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19\r
ad43bc6b 206 gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a\r
9beac0d8 207 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f\r
501e08fc 208\r
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HW
209 ## Pcd8259LegacyModeMask defines the default mask value for platform. This\r
210 # value is determined.\r
211 # 1) If platform only support pure UEFI, value should be set to 0xFFFF or\r
212 # 0xFFFE; Because only clock interrupt is allowed in legacy mode in pure\r
213 # UEFI platform.\r
214 # 2) If platform install CSM and use thunk module:\r
215 # a) If thunk call provided by CSM binary requires some legacy interrupt\r
216 # support, the corresponding bit should be opened as 0.\r
217 # For example, if keyboard interfaces provided CSM binary use legacy\r
218 # keyboard interrupt in 8259 bit 1, then the value should be set to\r
219 # 0xFFFC.\r
220 # b) If all thunk call provied by CSM binary do not require legacy\r
221 # interrupt support, value should be set to 0xFFFF or 0xFFFE.\r
222 #\r
223 # The default value of legacy mode mask could be changed by\r
224 # EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it\r
225 # except some special cases such as when initializing the CSM binary, it\r
226 # should be set to 0xFFFF to mask all legacy interrupt. Please restore the\r
227 # original legacy mask value if changing is made for these special case.\r
228 gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x3\r
229\r
230 ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy\r
231 # mode's interrrupt controller.\r
232 # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.\r
233 gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x5\r
234\r
51e55d81
HW
235 ## Indicates if BiosVideo driver will switch to 80x25 Text VGA Mode when\r
236 # exiting boot service.\r
237 # TRUE - Switch to Text VGA Mode.\r
238 # FALSE - Does not switch to Text VGA Mode.\r
239 gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoSetTextVgaModeEnable|FALSE|BOOLEAN|0x28\r
240\r
241 ## Indicates if BiosVideo driver will check for VESA BIOS Extension service\r
242 # support.\r
243 # TRUE - Check for VESA BIOS Extension service.\r
244 # FALSE - Does not check for VESA BIOS Extension service.\r
245 gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVbeEnable|TRUE|BOOLEAN|0x29\r
246\r
247 ## Indicates if BiosVideo driver will check for VGA service support.\r
248 # NOTE: If both PcdBiosVideoCheckVbeEnable and PcdBiosVideoCheckVgaEnable\r
249 # are set to FALSE, that means Graphics Output protocol will not be\r
250 # installed, the VGA miniport protocol will be installed instead.\r
251 # TRUE - Check for VGA service.<BR>\r
252 # FALSE - Does not check for VGA service.<BR>\r
253 gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVgaEnable|TRUE|BOOLEAN|0x2a\r
254\r
255 ## Indicates if memory space for legacy region will be set as cacheable.\r
256 # TRUE - Set cachebility for legacy region.\r
257 # FALSE - Does not set cachebility for legacy region.\r
258 gUefiOvmfPkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion|TRUE|BOOLEAN|0x2b\r
259\r
260 ## Specify memory size with bytes to reserve EBDA below 640K for OPROM.\r
261 # The value should be a multiple of 4KB.\r
262 gUefiOvmfPkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x2c\r
263\r
264 ## Specify memory base address for OPROM to find free memory.\r
265 # Some OPROMs do not use EBDA or PMM to allocate memory for its usage,\r
266 # instead they find the memory filled with zero from 0x20000.\r
267 # The value should be a multiple of 4KB.\r
268 # The range should be below the EBDA reserved range from\r
269 # (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to\r
270 # CONVENTIONAL_MEMORY_TOP.\r
271 gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemoryBase|0x60000|UINT32|0x2d\r
272\r
273 ## Specify memory size with bytes for OPROM to find free memory.\r
274 # The value should be a multiple of 4KB. And the range should be below the\r
275 # EBDA reserved range from\r
276 # (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to\r
277 # CONVENTIONAL_MEMORY_TOP.\r
278 gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemorySize|0x28000|UINT32|0x2e\r
279\r
280 ## Specify the end of address below 1MB for the OPROM.\r
281 # The last shadowed OpROM should not exceed this address.\r
282 gUefiOvmfPkgTokenSpaceGuid.PcdEndOpromShadowAddress|0xdffff|UINT32|0x2f\r
283\r
284 ## Specify the low PMM (Post Memory Manager) size with bytes below 1MB.\r
285 # The value should be a multiple of 4KB.\r
286 # @Prompt Low PMM (Post Memory Manager) Size\r
287 gUefiOvmfPkgTokenSpaceGuid.PcdLowPmmMemorySize|0x10000|UINT32|0x30\r
288\r
289 ## Specify the high PMM (Post Memory Manager) size with bytes above 1MB.\r
290 # The value should be a multiple of 4KB.\r
291 gUefiOvmfPkgTokenSpaceGuid.PcdHighPmmMemorySize|0x400000|UINT32|0x31\r
292\r
93314ae5
AP
293 gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr|0x0|UINT32|0x17\r
294 gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize|0x0|UINT32|0x32\r
295\r
8f39d79d
AP
296 ## Number of page frames to use for storing grant table entries.\r
297 gUefiOvmfPkgTokenSpaceGuid.PcdXenGrantFrames|4|UINT32|0x33\r
298\r
6995a1b7
TL
299 ## Specify the extra page table needed to mark the GHCB as unencrypted.\r
300 # The value should be a multiple of 4KB for each.\r
301 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase|0x0|UINT32|0x3e\r
302 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize|0x0|UINT32|0x3f\r
303\r
304 ## The base address of the SEC GHCB page used by SEV-ES.\r
305 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase|0|UINT32|0x40\r
306 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize|0|UINT32|0x41\r
307\r
224752ec
JB
308 ## The base address and size of the SEV Launch Secret Area provisioned\r
309 # after remote attestation. If this is set in the .fdf, the platform\r
310 # is responsible for protecting the area from DXE phase overwrites.\r
311 gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|0x0|UINT32|0x42\r
312 gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretSize|0x0|UINT32|0x43\r
313\r
70c66df5 314[PcdsDynamic, PcdsDynamicEx]\r
85c0b5ee 315 gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2\r
9d35ac26 316 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10\r
d55004da 317 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b\r
6fbef93e 318 gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21\r
49ba9447 319\r
c4df7fd0
LE
320 ## The IO port aperture shared by all PCI root bridges.\r
321 #\r
322 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22\r
323 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23\r
324\r
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325 ## The 32-bit MMIO aperture shared by all PCI root bridges.\r
326 #\r
327 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24\r
328 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25\r
329\r
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330 ## The 64-bit MMIO aperture shared by all PCI root bridges.\r
331 #\r
332 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26\r
333 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27\r
334\r
966dbaf4 335 ## The following setting controls how many megabytes we configure as TSEG on\r
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336 # Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults\r
337 # cause undefined behavior. During boot, the PCD is updated by PlatformPei\r
338 # to reflect the extended TSEG size, if one is advertized by QEMU.\r
966dbaf4 339 #\r
d04b72c6 340 # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).\r
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341 gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20\r
342\r
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343 ## Set to TRUE by PlatformPei if the Q35 board supports the "SMRAM at default\r
344 # SMBASE" feature.\r
345 #\r
346 # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).\r
347 gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE|BOOLEAN|0x34\r
348\r
e05061c5 349[PcdsFeatureFlag]\r
2f9c55cc 350 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c\r
43336916 351 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d\r
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352\r
353 ## This feature flag enables SMM/SMRAM support. Note that it also requires\r
354 # such support from the underlying QEMU instance; if that support is not\r
355 # present, the firmware will reject continuing after a certain point.\r
356 #\r
357 # The flag also acts as a general "security switch"; when TRUE, many\r
358 # components will change behavior, with the goal of preventing a malicious\r
359 # runtime OS from tampering with firmware structures (special memory ranges\r
360 # used by OVMF, the varstore pflash chip, LockBox etc).\r
361 gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e\r
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362\r
363 ## Informs modules (including pre-DXE-phase modules) whether the platform\r
364 # firmware contains a CSM (Compatibility Support Module).\r
365 #\r
366 gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|FALSE|BOOLEAN|0x35\r