[mirror_edk2.git] / OvmfPkg / PciHotPlugInitDxe / PciHotPlugInit.c

/** @file\r
  This driver implements EFI_PCI_HOT_PLUG_INIT_PROTOCOL, providing the PCI bus\r
  driver with resource padding information, for PCIe hotplug purposes.\r
\r
  Copyright (C) 2016, Red Hat, Inc.\r
\r
  This program and the accompanying materials are licensed and made available\r
  under the terms and conditions of the BSD License which accompanies this\r
  distribution. The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r
  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
**/\r
\r
#include <IndustryStandard/Acpi10.h>\r
#include <IndustryStandard/QemuPciBridgeCapabilities.h>\r
\r
#include <Library/BaseLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/DevicePathLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/PciLib.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
\r
#include <Protocol/PciHotPlugInit.h>\r
#include <Protocol/PciRootBridgeIo.h>\r
\r
//\r
// The protocol interface this driver produces.\r
//\r
// Refer to 12.6 "PCI Hot Plug PCI Initialization Protocol" in the Platform\r
// Init 1.4a Spec, Volume 5.\r
//\r
STATIC EFI_PCI_HOT_PLUG_INIT_PROTOCOL mPciHotPlugInit;\r
\r
\r
//\r
// Resource padding template for the GetResourcePadding() protocol member\r
// function.\r
//\r
// Refer to Table 8 "ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage" in\r
// the Platform Init 1.4a Spec, Volume 5.\r
//\r
// This structure is interpreted by the ApplyResourcePadding() function in the\r
// edk2 PCI Bus UEFI_DRIVER.\r
//\r
// We can request padding for at most four resource types, each of which is\r
// optional, independently of the others:\r
// (a) bus numbers,\r
// (b) IO space,\r
// (c) non-prefetchable MMIO space (32-bit only),\r
// (d) prefetchable MMIO space (either 32-bit or 64-bit, never both).\r
//\r
#pragma pack (1)\r
typedef struct {\r
  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR Padding[4];\r
  EFI_ACPI_END_TAG_DESCRIPTOR       EndDesc;\r
} RESOURCE_PADDING;\r
#pragma pack ()\r
\r
\r
/**\r
  Initialize a RESOURCE_PADDING object.\r
\r
  @param[out] ResourcePadding  The caller-allocated RESOURCE_PADDING object to\r
                               initialize.\r
**/\r
STATIC\r
VOID\r
InitializeResourcePadding (\r
  OUT RESOURCE_PADDING *ResourcePadding\r
  )\r
{\r
  UINTN Index;\r
\r
  ZeroMem (ResourcePadding, sizeof *ResourcePadding);\r
\r
  //\r
  // Fill in the Padding fields that don't vary across resource types.\r
  //\r
  for (Index = 0; Index < ARRAY_SIZE (ResourcePadding->Padding); ++Index) {\r
    EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;\r
\r
    Descriptor       = ResourcePadding->Padding + Index;\r
    Descriptor->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;\r
    Descriptor->Len  = (UINT16)(\r
                         sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -\r
                         OFFSET_OF (\r
                           EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,\r
                           ResType\r
                           )\r
                         );\r
  }\r
\r
  //\r
  // Fill in the End Tag.\r
  //\r
  ResourcePadding->EndDesc.Desc = ACPI_END_TAG_DESCRIPTOR;\r
}\r
\r
\r
/**\r
  Set up a descriptor entry for reserving IO space.\r
\r
  @param[in,out] Descriptor  The descriptor to configure. The caller shall have\r
                             initialized Descriptor earlier, with\r
                             InitializeResourcePadding().\r
\r
  @param[in] SizeExponent    The size and natural alignment of the reservation\r
                             are determined by raising two to this power.\r
**/\r
STATIC\r
VOID\r
SetIoPadding (\r
  IN OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor,\r
  IN     UINTN                             SizeExponent\r
  )\r
{\r
  Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;\r
  Descriptor->AddrLen = LShiftU64 (1, SizeExponent);\r
  Descriptor->AddrRangeMax = Descriptor->AddrLen - 1;\r
}\r
\r
\r
/**\r
  Set up a descriptor entry for reserving MMIO space.\r
\r
  @param[in,out] Descriptor    The descriptor to configure. The caller shall\r
                               have initialized Descriptor earlier, with\r
                               InitializeResourcePadding().\r
\r
  @param[in] Prefetchable      TRUE if the descriptor should reserve\r
                               prefetchable MMIO space. Pass FALSE for\r
                               reserving non-prefetchable MMIO space.\r
\r
  @param[in] ThirtyTwoBitOnly  TRUE if the reservation should be limited to\r
                               32-bit address space. FALSE if the reservation\r
                               can be satisfied from 64-bit address space.\r
                               ThirtyTwoBitOnly is ignored if Prefetchable is\r
                               FALSE; in that case ThirtyTwoBitOnly is always\r
                               considered TRUE.\r
\r
  @param[in] SizeExponent      The size and natural alignment of the\r
                               reservation are determined by raising two to\r
                               this power.\r
**/\r
STATIC\r
VOID\r
SetMmioPadding (\r
  IN OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor,\r
  IN     BOOLEAN                           Prefetchable,\r
  IN     BOOLEAN                           ThirtyTwoBitOnly,\r
  IN     UINTN                             SizeExponent\r
  )\r
{\r
  Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;\r
  if (Prefetchable) {\r
    Descriptor->SpecificFlag =\r
      EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;\r
    Descriptor->AddrSpaceGranularity = ThirtyTwoBitOnly ? 32 : 64;\r
  } else {\r
    Descriptor->SpecificFlag =\r
      EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE;\r
    Descriptor->AddrSpaceGranularity = 32;\r
  }\r
  Descriptor->AddrLen = LShiftU64 (1, SizeExponent);\r
  Descriptor->AddrRangeMax = Descriptor->AddrLen - 1;\r
}\r
\r
\r
/**\r
  Round up a positive 32-bit value to the next whole power of two, and return\r
  the bit position of the highest bit set in the result. Equivalent to\r
  ceil(log2(x)).\r
\r
  @param[in] Operand  The 32-bit operand to evaluate.\r
\r
  @retval -1     Operand is zero.\r
\r
  @retval -1     Operand is positive, not a whole power of two, and rounding it\r
                 up to the next power of two does not fit into 32 bits.\r
\r
  @retval 0..31  Otherwise, return ceil(log2(Value)).\r
**/\r
STATIC\r
INTN\r
HighBitSetRoundUp32 (\r
  IN UINT32 Operand\r
  )\r
{\r
  INTN HighBit;\r
\r
  HighBit = HighBitSet32 (Operand);\r
  if (HighBit == -1) {\r
    //\r
    // Operand is zero.\r
    //\r
    return HighBit;\r
  }\r
  if ((Operand & (Operand - 1)) != 0) {\r
    //\r
    // Operand is not a whole power of two.\r
    //\r
    ++HighBit;\r
  }\r
  return (HighBit < 32) ? HighBit : -1;\r
}\r
\r
\r
/**\r
  Round up a positive 64-bit value to the next whole power of two, and return\r
  the bit position of the highest bit set in the result. Equivalent to\r
  ceil(log2(x)).\r
\r
  @param[in] Operand  The 64-bit operand to evaluate.\r
\r
  @retval -1     Operand is zero.\r
\r
  @retval -1     Operand is positive, not a whole power of two, and rounding it\r
                 up to the next power of two does not fit into 64 bits.\r
\r
  @retval 0..63  Otherwise, return ceil(log2(Value)).\r
**/\r
STATIC\r
INTN\r
HighBitSetRoundUp64 (\r
  IN UINT64 Operand\r
  )\r
{\r
  INTN HighBit;\r
\r
  HighBit = HighBitSet64 (Operand);\r
  if (HighBit == -1) {\r
    //\r
    // Operand is zero.\r
    //\r
    return HighBit;\r
  }\r
  if ((Operand & (Operand - 1)) != 0) {\r
    //\r
    // Operand is not a whole power of two.\r
    //\r
    ++HighBit;\r
  }\r
  return (HighBit < 64) ? HighBit : -1;\r
}\r
\r
\r
/**\r
  Read a slice from conventional PCI config space at the given offset, then\r
  advance the offset.\r
\r
  @param[in] PciAddress  The address of the PCI Device -- Bus, Device, Function\r
                         -- in UEFI (not PciLib) encoding.\r
\r
  @param[in,out] Offset  On input, the offset in conventional PCI config space\r
                         to start reading from. On output, the offset of the\r
                         first byte that was not read.\r
\r
  @param[in] Size        The number of bytes to read.\r
\r
  @param[out] Buffer     On output, the bytes read from PCI config space are\r
                         stored in this object.\r
**/\r
STATIC\r
VOID\r
ReadConfigSpace (\r
  IN     CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *PciAddress,\r
  IN OUT UINT8                                             *Offset,\r
  IN     UINT8                                             Size,\r
  OUT    VOID                                              *Buffer\r
  )\r
{\r
  PciReadBuffer (\r
    PCI_LIB_ADDRESS (\r
      PciAddress->Bus,\r
      PciAddress->Device,\r
      PciAddress->Function,\r
      *Offset\r
      ),\r
    Size,\r
    Buffer\r
    );\r
  *Offset += Size;\r
}\r
\r
\r
/**\r
  Convenience wrapper macro for ReadConfigSpace().\r
\r
  Given the following conditions:\r
\r
  - HeaderField is the first field in the structure pointed-to by Struct,\r
\r
  - Struct->HeaderField has been populated from the conventional PCI config\r
    space of the PCI device identified by PciAddress,\r
\r
  - *Offset points one past HeaderField in the conventional PCI config space of\r
    the PCI device identified by PciAddress,\r
\r
  populate the rest of *Struct from conventional PCI config space, starting at\r
  *Offset. Finally, increment *Offset so that it point one past *Struct.\r
\r
  @param[in] PciAddress  The address of the PCI Device -- Bus, Device, Function\r
                         -- in UEFI (not PciLib) encoding. Type: pointer to\r
                         CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.\r
\r
  @param[in,out] Offset  On input, the offset in conventional PCI config space\r
                         to start reading from; one past Struct->HeaderField.\r
                         On output, the offset of the first byte that was not\r
                         read; one past *Struct. Type: pointer to UINT8.\r
\r
  @param[out] Struct     The structure to complete. Type: pointer to structure\r
                         object.\r
\r
  @param[in] HeaderField The name of the first field in *Struct, after which\r
                         *Struct should be populated. Type: structure member\r
                         identifier.\r
**/\r
#define COMPLETE_CONFIG_SPACE_STRUCT(PciAddress, Offset, Struct, HeaderField) \\r
          ReadConfigSpace (                                                   \\r
            (PciAddress),                                                     \\r
            (Offset),                                                         \\r
            (UINT8)(sizeof *(Struct) - sizeof ((Struct)->HeaderField)),       \\r
            &((Struct)->HeaderField) + 1                                      \\r
            )\r
\r
\r
/**\r
  Look up the QEMU-specific Resource Reservation capability in the conventional\r
  config space of a Hotplug Controller (that is, PCI Bridge).\r
\r
  This function performs as few config space reads as possible.\r
\r
  @param[in] HpcPciAddress     The address of the PCI Bridge -- Bus, Device,\r
                               Function -- in UEFI (not PciLib) encoding.\r
\r
  @param[out] ReservationHint  The caller-allocated capability structure to\r
                               populate from the PCI Bridge's config space.\r
\r
  @retval EFI_SUCCESS    The capability has been found, ReservationHint has\r
                         been populated.\r
\r
  @retval EFI_NOT_FOUND  The capability is missing. The contents of\r
                         ReservationHint are now indeterminate.\r
**/\r
STATIC\r
EFI_STATUS\r
QueryReservationHint (\r
  IN  CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *HpcPciAddress,\r
  OUT QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION   *ReservationHint\r
)\r
{\r
  UINT16 PciVendorId;\r
  UINT16 PciStatus;\r
  UINT8  PciCapPtr;\r
  UINT8  Offset;\r
\r
  //\r
  // Check the vendor identifier.\r
  //\r
  PciVendorId = PciRead16 (\r
                  PCI_LIB_ADDRESS (\r
                    HpcPciAddress->Bus,\r
                    HpcPciAddress->Device,\r
                    HpcPciAddress->Function,\r
                    PCI_VENDOR_ID_OFFSET\r
                    )\r
                  );\r
  if (PciVendorId != QEMU_PCI_BRIDGE_VENDOR_ID_REDHAT) {\r
    return EFI_NOT_FOUND;\r
  }\r
\r
  //\r
  // Check the Capabilities List bit in the PCI Status Register.\r
  //\r
  PciStatus = PciRead16 (\r
                PCI_LIB_ADDRESS (\r
                  HpcPciAddress->Bus,\r
                  HpcPciAddress->Device,\r
                  HpcPciAddress->Function,\r
                  PCI_PRIMARY_STATUS_OFFSET\r
                  )\r
                );\r
  if ((PciStatus & EFI_PCI_STATUS_CAPABILITY) == 0) {\r
    return EFI_NOT_FOUND;\r
  }\r
\r
  //\r
  // Fetch the start of the Capabilities List.\r
  //\r
  PciCapPtr = PciRead8 (\r
                PCI_LIB_ADDRESS (\r
                  HpcPciAddress->Bus,\r
                  HpcPciAddress->Device,\r
                  HpcPciAddress->Function,\r
                  PCI_CAPBILITY_POINTER_OFFSET\r
                  )\r
                );\r
\r
  //\r
  // Scan the Capabilities List until we find the terminator element, or the\r
  // Resource Reservation capability.\r
  //\r
  for (Offset = PciCapPtr & 0xFC;\r
       Offset > 0;\r
       Offset = ReservationHint->BridgeHdr.VendorHdr.Hdr.NextItemPtr & 0xFC) {\r
    BOOLEAN EnoughRoom;\r
\r
    //\r
    // Check if the Resource Reservation capability would fit into config space\r
    // at this offset.\r
    //\r
    EnoughRoom = (BOOLEAN)(\r
                   Offset <= PCI_MAX_CONFIG_OFFSET - sizeof *ReservationHint\r
                   );\r
\r
    //\r
    // Read the standard capability header so we can check the capability ID\r
    // (if necessary) and advance to the next capability.\r
    //\r
    ReadConfigSpace (\r
      HpcPciAddress,\r
      &Offset,\r
      (UINT8)sizeof ReservationHint->BridgeHdr.VendorHdr.Hdr,\r
      &ReservationHint->BridgeHdr.VendorHdr.Hdr\r
      );\r
    if (!EnoughRoom ||\r
        (ReservationHint->BridgeHdr.VendorHdr.Hdr.CapabilityID !=\r
         EFI_PCI_CAPABILITY_ID_VENDOR)) {\r
      continue;\r
    }\r
\r
    //\r
    // Read the rest of the vendor capability header so we can check the\r
    // capability length.\r
    //\r
    COMPLETE_CONFIG_SPACE_STRUCT (\r
      HpcPciAddress,\r
      &Offset,\r
      &ReservationHint->BridgeHdr.VendorHdr,\r
      Hdr\r
      );\r
    if (ReservationHint->BridgeHdr.VendorHdr.Length !=\r
        sizeof *ReservationHint) {\r
      continue;\r
    }\r
\r
    //\r
    // Read the rest of the QEMU bridge capability header so we can check the\r
    // capability type.\r
    //\r
    COMPLETE_CONFIG_SPACE_STRUCT (\r
      HpcPciAddress,\r
      &Offset,\r
      &ReservationHint->BridgeHdr,\r
      VendorHdr\r
      );\r
    if (ReservationHint->BridgeHdr.Type !=\r
        QEMU_PCI_BRIDGE_CAPABILITY_TYPE_RESOURCE_RESERVATION) {\r
      continue;\r
    }\r
\r
    //\r
    // Read the body of the reservation hint.\r
    //\r
    COMPLETE_CONFIG_SPACE_STRUCT (\r
      HpcPciAddress,\r
      &Offset,\r
      ReservationHint,\r
      BridgeHdr\r
      );\r
    return EFI_SUCCESS;\r
  }\r
\r
  return EFI_NOT_FOUND;\r
}\r
\r
\r
/**\r
  Returns a list of root Hot Plug Controllers (HPCs) that require\r
  initialization during the boot process.\r
\r
  This procedure returns a list of root HPCs. The PCI bus driver must\r
  initialize  these controllers during the boot process. The PCI bus driver may\r
  or may not be  able to detect these HPCs. If the platform includes a\r
  PCI-to-CardBus bridge, it  can be included in this list if it requires\r
  initialization.  The HpcList must be  self consistent. An HPC cannot control\r
  any of its parent buses. Only one HPC can  control a PCI bus. Because this\r
  list includes only root HPCs, no HPC in the list  can be a child of another\r
  HPC. This policy must be enforced by the  EFI_PCI_HOT_PLUG_INIT_PROTOCOL.\r
  The PCI bus driver may not check for such  invalid conditions.  The callee\r
  allocates the buffer HpcList\r
\r
  @param[in]  This       Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL\r
                         instance.\r
  @param[out] HpcCount   The number of root HPCs that were returned.\r
  @param[out] HpcList    The list of root HPCs. HpcCount defines the number of\r
                         elements in this list.\r
\r
  @retval EFI_SUCCESS             HpcList was returned.\r
  @retval EFI_OUT_OF_RESOURCES    HpcList was not returned due to insufficient\r
                                  resources.\r
  @retval EFI_INVALID_PARAMETER   HpcCount is NULL or HpcList is NULL.\r
**/\r
STATIC\r
EFI_STATUS\r
EFIAPI\r
GetRootHpcList (\r
  IN  EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,\r
  OUT UINTN                          *HpcCount,\r
  OUT EFI_HPC_LOCATION               **HpcList\r
  )\r
{\r
  if (HpcCount == NULL || HpcList == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  //\r
  // There are no top-level (i.e., un-enumerable) hot-plug controllers in QEMU\r
  // that would require special initialization.\r
  //\r
  *HpcCount = 0;\r
  *HpcList = NULL;\r
  return EFI_SUCCESS;\r
}\r
\r
\r
/**\r
  Initializes one root Hot Plug Controller (HPC). This process may causes\r
  initialization of its subordinate buses.\r
\r
  This function initializes the specified HPC. At the end of initialization,\r
  the hot-plug slots or sockets (controlled by this HPC) are powered and are\r
  connected to the bus. All the necessary registers in the HPC are set up. For\r
  a Standard (PCI) Hot Plug Controller (SHPC), the registers that must be set\r
  up are defined in the PCI Standard Hot Plug Controller and Subsystem\r
  Specification.\r
\r
  @param[in]  This            Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL\r
                              instance.\r
  @param[in]  HpcDevicePath   The device path to the HPC that is being\r
                              initialized.\r
  @param[in]  HpcPciAddress   The address of the HPC function on the PCI bus.\r
  @param[in]  Event           The event that should be signaled when the HPC\r
                              initialization is complete.  Set to NULL if the\r
                              caller wants to wait until the entire\r
                              initialization  process is complete.\r
  @param[out] HpcState        The state of the HPC hardware. The state is\r
                              EFI_HPC_STATE_INITIALIZED or\r
                              EFI_HPC_STATE_ENABLED.\r
\r
  @retval EFI_SUCCESS             If Event is NULL, the specific HPC was\r
                                  successfully initialized. If Event is not\r
                                  NULL, Event will be  signaled at a later time\r
                                  when initialization is complete.\r
  @retval EFI_UNSUPPORTED         This instance of\r
                                  EFI_PCI_HOT_PLUG_INIT_PROTOCOL does not\r
                                  support the specified HPC.\r
  @retval EFI_OUT_OF_RESOURCES    Initialization failed due to insufficient\r
                                  resources.\r
  @retval EFI_INVALID_PARAMETER   HpcState is NULL.\r
**/\r
STATIC\r
EFI_STATUS\r
EFIAPI\r
InitializeRootHpc (\r
  IN  EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,\r
  IN  EFI_DEVICE_PATH_PROTOCOL       *HpcDevicePath,\r
  IN  UINT64                         HpcPciAddress,\r
  IN  EFI_EVENT                      Event, OPTIONAL\r
  OUT EFI_HPC_STATE                  *HpcState\r
  )\r
{\r
  //\r
  // This function should never be called, due to the information returned by\r
  // GetRootHpcList().\r
  //\r
  ASSERT (FALSE);\r
\r
  if (HpcState == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
  return EFI_UNSUPPORTED;\r
}\r
\r
\r
/**\r
  Returns the resource padding that is required by the PCI bus that is\r
  controlled by the specified Hot Plug Controller (HPC).\r
\r
  This function returns the resource padding that is required by the PCI bus\r
  that is controlled by the specified HPC. This member function is called for\r
  all the  root HPCs and nonroot HPCs that are detected by the PCI bus\r
  enumerator. This  function will be called before PCI resource allocation is\r
  completed. This function  must be called after all the root HPCs, with the\r
  possible exception of a  PCI-to-CardBus bridge, have completed\r
  initialization.\r
\r
  @param[in]  This            Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL\r
                              instance.\r
  @param[in]  HpcDevicePath   The device path to the HPC.\r
  @param[in]  HpcPciAddress   The address of the HPC function on the PCI bus.\r
  @param[in]  HpcState        The state of the HPC hardware.\r
  @param[out] Padding         The amount of resource padding that is required\r
                              by the PCI bus under the control of the specified\r
                              HPC.\r
  @param[out] Attributes      Describes how padding is accounted for. The\r
                              padding is returned in the form of ACPI 2.0\r
                              resource descriptors.\r
\r
  @retval EFI_SUCCESS             The resource padding was successfully\r
                                  returned.\r
  @retval EFI_UNSUPPORTED         This instance of the\r
                                  EFI_PCI_HOT_PLUG_INIT_PROTOCOL does not\r
                                  support the specified HPC.\r
  @retval EFI_NOT_READY           This function was called before HPC\r
                                  initialization is complete.\r
  @retval EFI_INVALID_PARAMETER   HpcState or Padding or Attributes is NULL.\r
  @retval EFI_OUT_OF_RESOURCES    ACPI 2.0 resource descriptors for Padding\r
                                  cannot be allocated due to insufficient\r
                                  resources.\r
**/\r
STATIC\r
EFI_STATUS\r
EFIAPI\r
GetResourcePadding (\r
  IN  EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,\r
  IN  EFI_DEVICE_PATH_PROTOCOL       *HpcDevicePath,\r
  IN  UINT64                         HpcPciAddress,\r
  OUT EFI_HPC_STATE                  *HpcState,\r
  OUT VOID                           **Padding,\r
  OUT EFI_HPC_PADDING_ATTRIBUTES     *Attributes\r
  )\r
{\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS     *Address;\r
  BOOLEAN                                         DefaultIo;\r
  BOOLEAN                                         DefaultMmio;\r
  RESOURCE_PADDING                                ReservationRequest;\r
  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR               *FirstResource;\r
  EFI_STATUS                                      ReservationHintStatus;\r
  QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION ReservationHint;\r
\r
  Address = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *)&HpcPciAddress;\r
\r
  DEBUG_CODE (\r
    CHAR16                                      *DevicePathString;\r
\r
    DevicePathString = ConvertDevicePathToText (HpcDevicePath, FALSE, FALSE);\r
\r
    DEBUG ((EFI_D_VERBOSE, "%a: Address=%02x:%02x.%x DevicePath=%s\n",\r
      __FUNCTION__, Address->Bus, Address->Device, Address->Function,\r
      (DevicePathString == NULL) ? L"<unavailable>" : DevicePathString));\r
\r
    if (DevicePathString != NULL) {\r
      FreePool (DevicePathString);\r
    }\r
    );\r
\r
  if (HpcState == NULL || Padding == NULL || Attributes == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  DefaultIo = TRUE;\r
  DefaultMmio = TRUE;\r
\r
  //\r
  // Init ReservationRequest, and point FirstResource one past the last\r
  // descriptor entry. We're going to build the entries backwards from\r
  // ReservationRequest.EndDesc.\r
  //\r
  InitializeResourcePadding (&ReservationRequest);\r
  FirstResource = ReservationRequest.Padding +\r
                  ARRAY_SIZE (ReservationRequest.Padding);\r
\r
  //\r
  // Try to get the QEMU-specific Resource Reservation capability.\r
  //\r
  ReservationHintStatus = QueryReservationHint (Address, &ReservationHint);\r
  if (!EFI_ERROR (ReservationHintStatus)) {\r
    INTN HighBit;\r
\r
    DEBUG ((\r
      DEBUG_VERBOSE,\r
      "%a: BusNumbers=0x%x Io=0x%Lx NonPrefetchable32BitMmio=0x%x\n"\r
      "%a: Prefetchable32BitMmio=0x%x Prefetchable64BitMmio=0x%Lx\n",\r
      __FUNCTION__,\r
      ReservationHint.BusNumbers,\r
      ReservationHint.Io,\r
      ReservationHint.NonPrefetchable32BitMmio,\r
      __FUNCTION__,\r
      ReservationHint.Prefetchable32BitMmio,\r
      ReservationHint.Prefetchable64BitMmio\r
      ));\r
\r
    //\r
    // (a) Reserve bus numbers.\r
    //\r
    switch (ReservationHint.BusNumbers) {\r
    case 0:\r
      //\r
      // No reservation needed.\r
      //\r
      break;\r
    case MAX_UINT32:\r
      //\r
      // Firmware default (unspecified). Treat it as "no reservation needed".\r
      //\r
      break;\r
    default:\r
      //\r
      // Request the specified amount.\r
      //\r
      --FirstResource;\r
      FirstResource->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;\r
      FirstResource->AddrLen = ReservationHint.BusNumbers;\r
      break;\r
    }\r
\r
    //\r
    // (b) Reserve IO space.\r
    //\r
    switch (ReservationHint.Io) {\r
    case 0:\r
      //\r
      // No reservation needed, disable our built-in.\r
      //\r
      DefaultIo = FALSE;\r
      break;\r
    case MAX_UINT64:\r
      //\r
      // Firmware default (unspecified). Stick with our built-in.\r
      //\r
      break;\r
    default:\r
      //\r
      // Round the specified amount up to the next power of two. If rounding is\r
      // successful, reserve the rounded value. Fall back to the default\r
      // otherwise.\r
      //\r
      HighBit = HighBitSetRoundUp64 (ReservationHint.Io);\r
      if (HighBit != -1) {\r
        SetIoPadding (--FirstResource, (UINTN)HighBit);\r
        DefaultIo = FALSE;\r
      }\r
      break;\r
    }\r
\r
    //\r
    // (c) Reserve non-prefetchable MMIO space (32-bit only).\r
    //\r
    switch (ReservationHint.NonPrefetchable32BitMmio) {\r
    case 0:\r
      //\r
      // No reservation needed, disable our built-in.\r
      //\r
      DefaultMmio = FALSE;\r
      break;\r
    case MAX_UINT32:\r
      //\r
      // Firmware default (unspecified). Stick with our built-in.\r
      //\r
      break;\r
    default:\r
      //\r
      // Round the specified amount up to the next power of two. If rounding is\r
      // successful, reserve the rounded value. Fall back to the default\r
      // otherwise.\r
      //\r
      HighBit = HighBitSetRoundUp32 (ReservationHint.NonPrefetchable32BitMmio);\r
      if (HighBit != -1) {\r
        SetMmioPadding (--FirstResource, FALSE, TRUE, (UINTN)HighBit);\r
        DefaultMmio = FALSE;\r
      }\r
      break;\r
    }\r
\r
    //\r
    // (d) Reserve prefetchable MMIO space (either 32-bit or 64-bit, never\r
    // both).\r
    //\r
    // For either space, we treat 0 as "no reservation needed", and the maximum\r
    // value as "firmware default". The latter is unspecified, and we interpret\r
    // it as the former.\r
    //\r
    // Otherwise, round the specified amount up to the next power of two. If\r
    // rounding is successful, reserve the rounded value. Do not reserve\r
    // prefetchable MMIO space otherwise.\r
    //\r
    if (ReservationHint.Prefetchable32BitMmio > 0 &&\r
        ReservationHint.Prefetchable32BitMmio < MAX_UINT32) {\r
      HighBit = HighBitSetRoundUp32 (ReservationHint.Prefetchable32BitMmio);\r
      if (HighBit != -1) {\r
        SetMmioPadding (--FirstResource, TRUE, TRUE, (UINTN)HighBit);\r
      }\r
    } else if (ReservationHint.Prefetchable64BitMmio > 0 &&\r
               ReservationHint.Prefetchable64BitMmio < MAX_UINT64) {\r
      HighBit = HighBitSetRoundUp64 (ReservationHint.Prefetchable64BitMmio);\r
      if (HighBit != -1) {\r
        SetMmioPadding (--FirstResource, TRUE, FALSE, (UINTN)HighBit);\r
      }\r
    }\r
  }\r
\r
  if (DefaultIo) {\r
    //\r
    // Request defaults.\r
    //\r
    SetIoPadding (--FirstResource, (UINTN)HighBitSetRoundUp64 (512));\r
  }\r
\r
  if (DefaultMmio) {\r
    //\r
    // Request defaults.\r
    //\r
    SetMmioPadding (\r
      --FirstResource,\r
      FALSE,\r
      TRUE,\r
      (UINTN)HighBitSetRoundUp32 (SIZE_2MB)\r
      );\r
  }\r
\r
  //\r
  // Output a copy of ReservationRequest from the lowest-address populated\r
  // entry until the end of the structure (including\r
  // ReservationRequest.EndDesc). If no reservations are necessary, we'll only\r
  // output the End Tag.\r
  //\r
  *Padding = AllocateCopyPool (\r
               (UINT8 *)(&ReservationRequest + 1) - (UINT8 *)FirstResource,\r
               FirstResource\r
               );\r
  if (*Padding == NULL) {\r
    return EFI_OUT_OF_RESOURCES;\r
  }\r
\r
  //\r
  // Resource padding is required.\r
  //\r
  *HpcState = EFI_HPC_STATE_INITIALIZED | EFI_HPC_STATE_ENABLED;\r
\r
  //\r
  // The padding should be applied at PCI bus level, and considered by upstream\r
  // bridges, recursively.\r
  //\r
  *Attributes = EfiPaddingPciBus;\r
  return EFI_SUCCESS;\r
}\r
\r
\r
/**\r
  Entry point for this driver.\r
\r
  @param[in] ImageHandle  Image handle of this driver.\r
  @param[in] SystemTable  Pointer to SystemTable.\r
\r
  @retval EFI_SUCESS       Driver has loaded successfully.\r
  @return                  Error codes from lower level functions.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
DriverInitialize (\r
  IN EFI_HANDLE       ImageHandle,\r
  IN EFI_SYSTEM_TABLE *SystemTable\r
  )\r
{\r
  EFI_STATUS Status;\r
\r
  mPciHotPlugInit.GetRootHpcList = GetRootHpcList;\r
  mPciHotPlugInit.InitializeRootHpc = InitializeRootHpc;\r
  mPciHotPlugInit.GetResourcePadding = GetResourcePadding;\r
  Status = gBS->InstallMultipleProtocolInterfaces (&ImageHandle,\r
                  &gEfiPciHotPlugInitProtocolGuid, &mPciHotPlugInit, NULL);\r
  return Status;\r
}\r