QuarkPlatformPkg: Add new package for Galileo boards

[mirror_edk2.git] / QuarkPlatformPkg / Pci / Dxe / PciPlatform / PciPlatform.c

/** @file\r
Registers onboard PCI ROMs with PCI.IO\r
\r
Copyright (c) 2013-2015 Intel Corporation.\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
\r
**/\r
\r
#include "CommonHeader.h"\r
\r
#include "PciPlatform.h"\r
\r
\r
PCI_OPTION_ROM_TABLE mPciOptionRomTable[] = {\r
  { NULL_ROM_FILE_GUID,                    0, 0, 0, 0, 0xffff, 0xffff }\r
};\r
EFI_PCI_PLATFORM_PROTOCOL mPciPlatform = {\r
  PhaseNotify,\r
  PlatformPrepController,\r
  GetPlatformPolicy,\r
  GetPciRom\r
};\r
\r
EFI_HANDLE mPciPlatformHandle = NULL;\r
EFI_HANDLE mImageHandle       = NULL;\r
\r
\r
EFI_STATUS\r
PhaseNotify (\r
  IN EFI_PCI_PLATFORM_PROTOCOL                      *This,\r
  IN EFI_HANDLE                                     HostBridge,\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE  Phase,\r
  IN EFI_PCI_CHIPSET_EXECUTION_PHASE                ChipsetPhase\r
  )\r
{\r
  UINT8                  UsbHostBusNumber = IOH_BUS;\r
  if (Phase == EfiPciHostBridgeEndResourceAllocation) {\r
    // Required for QuarkSouthCluster.\r
    // Enable USB controller memory, io and bus master before Ehci driver.\r
    EnableUsbMemIoBusMaster (UsbHostBusNumber);\r
    return EFI_SUCCESS;\r
  }\r
  return EFI_UNSUPPORTED;\r
}\r
\r
\r
EFI_STATUS\r
PlatformPrepController (\r
  IN  EFI_PCI_PLATFORM_PROTOCOL                      *This,\r
  IN  EFI_HANDLE                                     HostBridge,\r
  IN  EFI_HANDLE                                     RootBridge,\r
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS    PciAddress,\r
  IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE   Phase,\r
  IN  EFI_PCI_CHIPSET_EXECUTION_PHASE                ChipsetPhase\r
  )\r
{\r
  return EFI_UNSUPPORTED;\r
}\r
\r
EFI_STATUS\r
GetPlatformPolicy (\r
  IN  CONST EFI_PCI_PLATFORM_PROTOCOL                     *This,\r
  OUT       EFI_PCI_PLATFORM_POLICY                       *PciPolicy\r
  )\r
{\r
  if (PciPolicy == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  return EFI_UNSUPPORTED;\r
}\r
\r
EFI_STATUS\r
GetPciRom (\r
  IN  CONST EFI_PCI_PLATFORM_PROTOCOL                   *This,\r
  IN        EFI_HANDLE                                  PciHandle,\r
  OUT       VOID                                        **RomImage,\r
  OUT       UINTN                                       *RomSize\r
  )\r
/*++\r
\r
  Routine Description:\r
    Return a PCI ROM image for the onboard device represented by PciHandle\r
\r
  Arguments:\r
    This      - Protocol instance pointer.\r
    PciHandle - PCI device to return the ROM image for.\r
    RomImage  - PCI Rom Image for onboard device\r
    RomSize   - Size of RomImage in bytes\r
\r
  Returns:\r
    EFI_SUCCESS   - RomImage is valid\r
    EFI_NOT_FOUND - No RomImage\r
\r
--*/\r
{\r
  EFI_STATUS                    Status;\r
  EFI_PCI_IO_PROTOCOL           *PciIo;\r
  UINTN                         Segment;\r
  UINTN                         Bus;\r
  UINTN                         Device;\r
  UINTN                         Function;\r
  UINT16                        VendorId;\r
  UINT16                        DeviceId;\r
  UINT16                        DeviceClass;\r
  UINTN                         TableIndex;\r
\r
  Status = gBS->HandleProtocol (\r
                  PciHandle,\r
                  &gEfiPciIoProtocolGuid,\r
                  (VOID **) &PciIo\r
                  );\r
  if (EFI_ERROR (Status)) {\r
    return EFI_NOT_FOUND;\r
  }\r
\r
  PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Function);\r
\r
  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 0x0A, 1, &DeviceClass);\r
\r
  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 0, 1, &VendorId);\r
\r
  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 2, 1, &DeviceId);\r
\r
  //\r
  // Loop through table of video option rom descriptions\r
  //\r
  for (TableIndex = 0; mPciOptionRomTable[TableIndex].VendorId != 0xffff; TableIndex++) {\r
\r
    //\r
    // See if the PCI device specified by PciHandle matches at device in mPciOptionRomTable\r
    //\r
    if (VendorId != mPciOptionRomTable[TableIndex].VendorId ||\r
        DeviceId != mPciOptionRomTable[TableIndex].DeviceId ||\r
        Segment != mPciOptionRomTable[TableIndex].Segment ||\r
        Bus != mPciOptionRomTable[TableIndex].Bus ||\r
        Device != mPciOptionRomTable[TableIndex].Device ||\r
        Function != mPciOptionRomTable[TableIndex].Function) {\r
      continue;\r
    }\r
\r
    Status = GetSectionFromFv (\r
               &mPciOptionRomTable[TableIndex].FileName,\r
               EFI_SECTION_RAW,\r
               0,\r
               RomImage,\r
               RomSize\r
               );\r
\r
    if (EFI_ERROR (Status)) {\r
      continue;\r
    }\r
\r
    return EFI_SUCCESS;\r
  }\r
\r
  return EFI_NOT_FOUND;\r
}\r
\r
EFI_STATUS\r
PciPlatformDriverEntry (\r
  IN EFI_HANDLE        ImageHandle,\r
  IN EFI_SYSTEM_TABLE  *SystemTable\r
  )\r
/*++\r
\r
Routine Description:\r
\r
Arguments:\r
  (Standard EFI Image entry - EFI_IMAGE_ENTRY_POINT)\r
\r
Returns:\r
  EFI_STATUS\r
\r
--*/\r
{\r
  EFI_STATUS  Status;\r
\r
  mImageHandle = ImageHandle;\r
\r
  //\r
  // Install on a new handle\r
  //\r
  Status = gBS->InstallProtocolInterface (\r
                  &mPciPlatformHandle,\r
                  &gEfiPciPlatformProtocolGuid,\r
                  EFI_NATIVE_INTERFACE,\r
                  &mPciPlatform\r
                  );\r
\r
  return Status;\r
}\r