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MdeModulePkg/DxeCore: invoke the emulator protocol for foreign images
[mirror_edk2.git] / QuarkPlatformPkg / QuarkMin.fdf
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b303605e
MK		 1## @file\r
2# FDF file of Clanton Peak CRB platform with 32-bit DXE\r
3#\r
4# This package provides QuarkNcSocId platform specific modules.\r
4aa3fd56 5# Copyright (c) 2013 - 2019 Intel Corporation.\r
b303605e 6#\r
0eb3de2e 7# SPDX-License-Identifier: BSD-2-Clause-Patent\r
b303605e
MK		 8#\r
9##\r
10\r
11################################################################################\r
12#\r
13# Defines Section - statements that will be processed to create a Makefile.\r
14#\r
15################################################################################\r
16[Defines]\r
17# Address 0x100000000 (4 GB reset address)\r
18# Base Size\r
19# +---------------------------+\r
20# FLASH_BASE | FD.Quark: | 0x800000 (8 MB)\r
21# 0xFF800000 | BaseAddress |\r
22# +---------------------------+\r
23#\r
24# Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part.\r
25# 0xFF800000 + 0x400000 = 0xFFC00000.\r
26#\r
27# Address 0x0 (0xFF800000 for 8 MB SPI part)\r
28# +---------------------------+\r
29# FLASH_FV_PAYLOAD_BASE | Payload Image | FLASH_FV_PAYLOAD_SIZE\r
30# 0x00400000 | | 0x00100000\r
31# +---------------------------+\r
32# FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE\r
33# 0x00500000 | | 0x001E0000\r
34# +---------------------------+\r
35# NVRAM_AREA_BASE | NVRAM Area= | NVRAM_AREA_SIZE\r
36# 0x006E0000 | Variable + FTW Working + |\r
37# | FTW Spare |\r
38# +---+-------------------+---+\r
39# NVRAM_AREA_VARIABLE_BASE | | NVRAM_AREA_VARIABLE_SIZE\r
40# | |\r
41# +-------------------+\r
42# FTW_WORKING_BASE | | FTW_WORKING_SIZE\r
43# | |\r
44# +-------------------+\r
45# FTW_SPARE_BASE | | FTW_SPARE_SIZE\r
46# | |\r
47# +---+-------------------+---+\r
48# RMU_BINARY_BASE | RMU Binary | RMU_BINARY_SIZE\r
49# 0x00700000 | | 0x00008000\r
50# +---------------------------+\r
51# PLATFORM_DATA_BASE | PlatformData Binary | PLATFORM_DATA_SIZE\r
52# 0x00710000 | | 0x00001000\r
53# +---------------------------+\r
54# FVRECOVERY_IMAGE_BASE | FVRECOVERY Image | FVRECOVERY_IMAGE_SIZE\r
55# 0x720000 | | 0x000E0000\r
56# +---------------------------+\r
57\r
58 #\r
59 # Define value used to compute FLASH regions below reset vector location just below 4GB\r
60 #\r
61 DEFINE RESET_ADDRESS = 0x100000000 # 4 GB\r
62\r
63 #\r
64 # Set size of FLASH to 8MB\r
65 #\r
66 DEFINE FLASH_SIZE = 0x800000\r
67 DEFINE FLASH_BASE = $(RESET_ADDRESS) - $(FLASH_SIZE) # The base address of the Flash Device\r
68\r
69 #\r
70 # Set FLASH block size to 4KB\r
71 #\r
72 DEFINE FLASH_BLOCKSIZE = 0x1000 # 4 KB\r
73\r
74 #\r
75 # Misc settings\r
76 #\r
77 DEFINE FLASH_BLOCKSIZE_DATA = 0x00, 0x10, 0x00, 0x00 # equivalent for DATA blocks\r
78\r
79 #\r
80 # Start PAYLOAD at 4MB into 8MB FLASH\r
81 #\r
82 DEFINE FLASH_FV_PAYLOAD_BASE = 0x00400000\r
83 DEFINE FLASH_FV_PAYLOAD_SIZE = 0x00100000\r
84\r
85 #\r
86 # Put FVMAIN between PAYLOAD and RMU Binary\r
87 #\r
88 DEFINE FLASH_FV_MAIN_BASE = 0x00500000\r
89 DEFINE FLASH_FV_MAIN_SIZE = 0x001E0000\r
90\r
91 #\r
92 # Place NV Storage just above Platform Data Base\r
93 #\r
94 DEFINE NVRAM_AREA_VARIABLE_BASE = 0x006E0000\r
95 DEFINE NVRAM_AREA_SIZE = 0x00020000\r
96\r
97 DEFINE NVRAM_AREA_VARIABLE_SIZE = 0x0000E000\r
98 DEFINE FTW_WORKING_BASE = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE)\r
99 DEFINE FTW_WORKING_SIZE = 0x00002000\r
100 DEFINE FTW_SPARE_BASE = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE)\r
101 DEFINE FTW_SPARE_SIZE = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE)\r
102\r
103 #\r
104 # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000)\r
105 #\r
106 DEFINE RMU_BINARY_BASE = 0x00700000 # HW fixed address\r
107 DEFINE RMU_BINARY_SIZE = 0x00008000 # HW fixed address, so fixed size\r
108\r
109 #\r
110 # Platform Data Base must be 64KB above RMU\r
111 #\r
112 DEFINE VPD_BASE = 0x00708000\r
113 DEFINE VPD_SIZE = 0x00001000\r
114\r
115 #\r
116 # Place FV Recovery above NV Storage\r
117 #\r
118 DEFINE FVRECOVERY_IMAGE_SIZE = 0x000F0000\r
119 DEFINE FVRECOVERY_IMAGE_BASE = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE)\r
120\r
121################################################################################\r
122#\r
123# FD Section\r
124# The [FD] Section is made up of the definition statements and a\r
125# description of what goes into the Flash Device Image. Each FD section\r
126# defines one flash "device" image. A flash device image may be one of\r
127# the following: Removable media bootable image (like a boot floppy\r
128# image,) an Option ROM image (that would be "flashed" into an add-in\r
129# card,) a System "Flash" image (that would be burned into a system's\r
130# flash) or an Update ("Capsule") image that will be used to update and\r
131# existing system flash.\r
132#\r
133################################################################################\r
134[FD.Quark]\r
135BaseAddress = 0xFF800000 #The base address of the Flash Device; set to same value as FLASH_BASE.\r
136Size = 0x800000 #The size in bytes of the Flash Device; set to same value as FLASH_SIZE.\r
137ErasePolarity = 1\r
138BlockSize = $(FLASH_BLOCKSIZE)\r
139NumBlocks = 0x800 #The number of blocks for the Flash Device.\r
140\r
141SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE)\r
142SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_SIZE)\r
143\r
144################################################################################\r
145#\r
146# Following are lists of FD Region layout which correspond to the locations of different\r
147# images within the flash device.\r
148#\r
149# Regions must be defined in ascending order and may not overlap.\r
150#\r
151# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
152# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
153# "0x" characters. Like:\r
154# Offset|Size\r
155# PcdOffsetCName|PcdSizeCName\r
156# RegionType <FV, DATA, or FILE>\r
157#\r
158################################################################################\r
159\r
160########################################################\r
161# Quark Payload Image\r
162########################################################\r
163$(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE)\r
164gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize\r
165FV = PAYLOAD\r
166\r
167########################################################\r
168# Quark FVMAIN Image (Compressed)\r
169########################################################\r
170$(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE)\r
171gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize\r
172FV = FVMAIN_COMPACT\r
173\r
174#############################################################################\r
175# Quark NVRAM Area\r
176# Quark NVRAM Area contains: Variable + FTW Working + FTW Spare\r
177#############################################################################\r
178$(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)\r
179gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
180#NV_VARIABLE_STORE\r
181DATA = {\r
182 ## This is the EFI_FIRMWARE_VOLUME_HEADER\r
183 # ZeroVector []\r
184 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
185 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
186 # FileSystemGuid: gEfiSystemNvDataFvGuid =\r
187 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}\r
188 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,\r
189 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,\r
190 # FvLength: 0x20000\r
191 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\r
192 #Signature "_FVH" #Attributes\r
193 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,\r
194 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision\r
195 0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02,\r
196 #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block\r
197 0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA),\r
198 #Blockmap[1]: End\r
199 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
200 ## This is the VARIABLE_STORE_HEADER\r
201 !if $(SECURE_BOOT_ENABLE)\r
202 # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } }\r
203 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,\r
204 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,\r
205 !else\r
206 # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}\r
207 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,\r
208 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,\r
209 !endif\r
210 #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8\r
211 # This can speed up the Variable Dispatch a bit.\r
212 0xB8, 0xDF, 0x00, 0x00,\r
213 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32\r
214 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
215}\r
216\r
217$(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE)\r
218gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
219#NV_FTW_WORKING\r
220DATA = {\r
221 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =\r
222 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}\r
223 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,\r
224 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95,\r
225 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved\r
226 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,\r
227 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0\r
228 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
229}\r
230\r
231$(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE)\r
232gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
233#NV_FTW_SPARE\r
234\r
235#########################################################\r
236# Quark Remote Management Unit Binary\r
237#########################################################\r
238$(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE)\r
239INF QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf\r
240\r
241#########################################################\r
242# PlatformData Binary, default for standalone is none built-in so user selects.\r
243#########################################################\r
244$(VPD_BASE)|$(VPD_SIZE)\r
245gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress\r
246FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin\r
247\r
248#######################\r
249# Quark FVRECOVERY Image\r
250#######################\r
251$(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE)\r
252gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize\r
253FV = FVRECOVERY\r
254\r
255################################################################################\r
256#\r
257# FV Section\r
258#\r
259# [FV] section is used to define what components or modules are placed within a flash\r
260# device file. This section also defines order the components and modules are positioned\r
261# within the image. The [FV] section consists of define statements, set statements and\r
262# module statements.\r
263#\r
264################################################################################\r
265[FV.FVRECOVERY]\r
266BlockSize = $(FLASH_BLOCKSIZE)\r
267FvAlignment = 16 #FV alignment and FV attributes setting.\r
268ERASE_POLARITY = 1\r
269MEMORY_MAPPED = TRUE\r
270STICKY_WRITE = TRUE\r
271LOCK_CAP = TRUE\r
272LOCK_STATUS = TRUE\r
273WRITE_DISABLED_CAP = TRUE\r
274WRITE_ENABLED_CAP = TRUE\r
275WRITE_STATUS = TRUE\r
276WRITE_LOCK_CAP = TRUE\r
277WRITE_LOCK_STATUS = TRUE\r
278READ_DISABLED_CAP = TRUE\r
279READ_ENABLED_CAP = TRUE\r
280READ_STATUS = TRUE\r
281READ_LOCK_CAP = TRUE\r
282READ_LOCK_STATUS = TRUE\r
283FvNameGuid = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8\r
284\r
285################################################################################\r
286#\r
287# The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image.\r
288# Parsing tools will scan the INF file to determine the type of component or module.\r
289# The component or module type is used to reference the standard rules\r
290# defined elsewhere in the FDF file.\r
291#\r
292# The format for INF statements is:\r
293# INF $(PathAndInfFileName)\r
294#\r
295################################################################################\r
296\r
297##\r
298# PEI Apriori file example, more PEIM module added later.\r
299##\r
300APRIORI PEI {\r
301 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
302 # PlatformConfigPei should be immediately after Pcd driver.\r
303 INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf\r
304 INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf\r
305}\r
306\r
307##\r
308# SEC Phase modules\r
309##\r
310INF UefiCpuPkg/SecCore/SecCore.inf\r
311\r
312INF MdeModulePkg/Core/Pei/PeiMain.inf\r
313\r
314##\r
315# PEI Phase RAW Data files.\r
316##\r
317FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) {\r
318 SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin\r
319}\r
320\r
321INF RuleOverride = NORELOC MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
322INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf\r
323INF RuleOverride = NORELOC MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
324INF RuleOverride = NORELOC MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
325INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf\r
326INF QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf\r
327INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf\r
328INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
329\r
330################################################################################\r
331#\r
332# FV Section\r
333#\r
334# [FV] section is used to define what components or modules are placed within a flash\r
335# device file. This section also defines order the components and modules are positioned\r
336# within the image. The [FV] section consists of define statements, set statements and\r
337# module statements.\r
338#\r
339################################################################################\r
340[FV.FVMAIN]\r
341BlockSize = $(FLASH_BLOCKSIZE)\r
342FvAlignment = 16\r
343ERASE_POLARITY = 1\r
344MEMORY_MAPPED = TRUE\r
345STICKY_WRITE = TRUE\r
346LOCK_CAP = TRUE\r
347LOCK_STATUS = TRUE\r
348WRITE_DISABLED_CAP = TRUE\r
349WRITE_ENABLED_CAP = TRUE\r
350WRITE_STATUS = TRUE\r
351WRITE_LOCK_CAP = TRUE\r
352WRITE_LOCK_STATUS = TRUE\r
353READ_DISABLED_CAP = TRUE\r
354READ_ENABLED_CAP = TRUE\r
355READ_STATUS = TRUE\r
356READ_LOCK_CAP = TRUE\r
357READ_LOCK_STATUS = TRUE\r
358FvNameGuid = 30D9ED01-38D2-418a-90D5-C561750BF80F\r
359\r
360##\r
361# DXE Phase modules\r
362##\r
363INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
364INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
365\r
366!if $(SOURCE_DEBUG_ENABLE)\r
367 INF SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf\r
368!endif\r
369\r
370#\r
371# Early SoC / Platform modules\r
372#\r
373INF QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf\r
374\r
375##\r
376# EDK Core modules\r
377##\r
378INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
379\r
380INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
381INF UefiCpuPkg/CpuDxe/CpuDxe.inf\r
382INF MdeModulePkg/Universal/Metronome/Metronome.inf\r
383INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
384INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
4aa3fd56 385INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
b303605e
MK		 386INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
387INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
388INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf\r
389INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
390INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
391INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
392\r
393#\r
394# Platform\r
395#\r
396INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf\r
397#INF MdeModulePkg/Application/UiApp/UiApp.inf\r
398\r
399INF QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf\r
400INF QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf\r
401INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
402INF QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf\r
403\r
404#\r
405# PCI\r
406#\r
407INF QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf\r
408INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
409INF QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf\r
410!if $(SOURCE_DEBUG_ENABLE)\r
411!else\r
412INF MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf\r
413!endif\r
414\r
415#\r
416# Console\r
417#\r
418INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
419INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
420INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
421\r
422INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
423INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
424INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
425INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
426\r
427#\r
428# File System Modules\r
429#\r
430INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf\r
431\r
fd55a5be
RN		 432#\r
433# Performance Application\r
434#\r
435!if $(PERFORMANCE_ENABLE)\r
436INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf\r
437!endif\r
438\r
b303605e
MK		 439################################################################################\r
440#\r
441# FV Section\r
442#\r
443# [FV] section is used to define what components or modules are placed within a flash\r
444# device file. This section also defines order the components and modules are positioned\r
445# within the image. The [FV] section consists of define statements, set statements and\r
446# module statements.\r
447#\r
448################################################################################\r
449[FV.FVMAIN_COMPACT]\r
450FvAlignment = 16\r
451ERASE_POLARITY = 1\r
452MEMORY_MAPPED = TRUE\r
453STICKY_WRITE = TRUE\r
454LOCK_CAP = TRUE\r
455LOCK_STATUS = TRUE\r
456WRITE_DISABLED_CAP = TRUE\r
457WRITE_ENABLED_CAP = TRUE\r
458WRITE_STATUS = TRUE\r
459WRITE_LOCK_CAP = TRUE\r
460WRITE_LOCK_STATUS = TRUE\r
461READ_DISABLED_CAP = TRUE\r
462READ_ENABLED_CAP = TRUE\r
463READ_STATUS = TRUE\r
464READ_LOCK_CAP = TRUE\r
465READ_LOCK_STATUS = TRUE\r
466\r
467FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
468 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID\r
469 SECTION FV_IMAGE = FVMAIN\r
470 }\r
471}\r
472\r
473################################################################################\r
474#\r
475# FV Section\r
476#\r
477# [FV] section is used to define what components or modules are placed within a flash\r
478# device file. This section also defines order the components and modules are positioned\r
479# within the image. The [FV] section consists of define statements, set statements and\r
480# module statements.\r
481#\r
482################################################################################\r
483[FV.PAYLOAD]\r
484BlockSize = $(FLASH_BLOCKSIZE)\r
485FvAlignment = 16 #FV alignment and FV attributes setting.\r
486ERASE_POLARITY = 1\r
487MEMORY_MAPPED = TRUE\r
488STICKY_WRITE = TRUE\r
489LOCK_CAP = TRUE\r
490LOCK_STATUS = TRUE\r
491WRITE_DISABLED_CAP = TRUE\r
492WRITE_ENABLED_CAP = TRUE\r
493WRITE_STATUS = TRUE\r
494WRITE_LOCK_CAP = TRUE\r
495WRITE_LOCK_STATUS = TRUE\r
496READ_DISABLED_CAP = TRUE\r
497READ_ENABLED_CAP = TRUE\r
498READ_STATUS = TRUE\r
499READ_LOCK_CAP = TRUE\r
500READ_LOCK_STATUS = TRUE\r
501\r
502#\r
503# Shell and Applications\r
504#\r
505INF ShellPkg/Application/Shell/Shell.inf\r
b303605e
MK		 506\r
507################################################################################\r
508#\r
509# Rules are use with the [FV] section's module INF type to define\r
510# how an FFS file is created for a given INF file. The following Rule are the default\r
511# rules for the different module type. User can add the customized rules to define the\r
512# content of the FFS file.\r
513#\r
514################################################################################\r
515[Rule.Common.SEC]\r
516 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
517 TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
518 RAW BIN Align = 16 |.com\r
519 }\r
520\r
521[Rule.Common.PEI_CORE]\r
522 FILE PEI_CORE = $(NAMED_GUID) {\r
523 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
524 UI STRING="$(MODULE_NAME)" Optional\r
525 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
526 }\r
527\r
528[Rule.Common.PEIM.NORELOC]\r
529 FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED {\r
530 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
531 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
532 UI STRING="$(MODULE_NAME)" Optional\r
533 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
534 }\r
535\r
536[Rule.Common.PEIM]\r
537 FILE PEIM = $(NAMED_GUID) {\r
538 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
539 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
540 UI STRING="$(MODULE_NAME)" Optional\r
541 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
542 }\r
543\r
544[Rule.Common.DXE_CORE]\r
545 FILE DXE_CORE = $(NAMED_GUID) {\r
546 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
547 UI STRING="$(MODULE_NAME)" Optional\r
548 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
549 }\r
550\r
551[Rule.Common.UEFI_DRIVER]\r
552 FILE DRIVER = $(NAMED_GUID) {\r
553 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
554 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
555 UI STRING="$(MODULE_NAME)" Optional\r
556 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
557 }\r
558\r
559[Rule.Common.DXE_DRIVER]\r
560 FILE DRIVER = $(NAMED_GUID) {\r
561 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
562 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
563 UI STRING="$(MODULE_NAME)" Optional\r
564 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
565 }\r
566\r
567[Rule.Common.DXE_RUNTIME_DRIVER]\r
568 FILE DRIVER = $(NAMED_GUID) {\r
569 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
570 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
571 UI STRING="$(MODULE_NAME)" Optional\r
572 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
573 }\r
574\r
575[Rule.Common.DXE_SMM_DRIVER]\r
576 FILE SMM = $(NAMED_GUID) {\r
577 SMM_DEPEX SMM_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
578 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
579 UI STRING="$(MODULE_NAME)" Optional\r
580 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
581 }\r
582\r
583[Rule.Common.SMM_CORE]\r
584 FILE SMM_CORE = $(NAMED_GUID) {\r
585 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
586 UI STRING="$(MODULE_NAME)" Optional\r
587 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
588 }\r
589\r
590[Rule.Common.UEFI_APPLICATION]\r
591 FILE APPLICATION = $(NAMED_GUID) {\r
592 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
593 UI STRING="$(MODULE_NAME)" Optional\r
594 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
595 }\r
596\r
597[Rule.Common.UEFI_APPLICATION.UI]\r
598 FILE APPLICATION = $(NAMED_GUID) {\r
599 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
600 UI STRING="Enter Setup"\r
601 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
602 }\r
603\r
604[Rule.Common.USER_DEFINED.ACPITABLE]\r
605 FILE FREEFORM = $(NAMED_GUID) {\r
606 RAW ACPI |.acpi\r
607 RAW ASL |.aml\r
608 }\r
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