]> git.proxmox.com Git - mirror_edk2.git/blame - QuarkPlatformPkg/QuarkPlatformPkg.dec
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
BaseTools: Fix corner-cases of --hash feature
[mirror_edk2.git] / QuarkPlatformPkg / QuarkPlatformPkg.dec
CommitLineData
b303605e
MK		 1## @file\r
2# Package for support of Clanton Peak CRB platform\r
3#\r
4# This package provides QuarkNcSocId platform specific modules.\r
5# Copyright (c) 2013-2015 Intel Corporation.\r
6#\r
0eb3de2e 7# SPDX-License-Identifier: BSD-2-Clause-Patent\r
b303605e
MK		 8#\r
9##\r
10\r
11\r
12################################################################################\r
13#\r
14# Defines Section - statements that will be processed to create a Makefile.\r
15#\r
16################################################################################\r
17\r
18[Defines]\r
19 DEC_SPECIFICATION = 0x00010005\r
20 PACKAGE_NAME = QuarkPlatformPkg\r
21 PACKAGE_GUID = 46C1F476-A85E-49a8-B258-DD4396B87FEF\r
22 PACKAGE_VERSION = 0.1\r
23\r
24\r
25################################################################################\r
26#\r
27# Include Section - list of Include Paths that are provided by this package.\r
28# Comments are used for Keywords and Module Types.\r
29#\r
30# Supported Module Types:\r
31# SEC PEIM DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER\r
32#\r
33################################################################################\r
34[Includes]\r
35 Include\r
36\r
37################################################################################\r
38#\r
39# Library Class Header section - list of Library Class header files that are\r
40# provided by this package.\r
41#\r
42################################################################################\r
43[LibraryClasses]\r
44\r
45################################################################################\r
46#\r
47# Global Guid Definition section - list of Global Guid C Name Data Structures\r
48# that are provided by this package.\r
49#\r
50################################################################################\r
51[Guids]\r
52 gQuarkPlatformTokenSpaceGuid = { 0x199c1ef0, 0x6400, 0x41c5, { 0xb0, 0xa4, 0xff, 0xbf, 0x21, 0x9d, 0xcb, 0xae }}\r
53 gEfiMemoryConfigDataGuid = { 0x80dbd530, 0xb74c, 0x4f11, { 0x8c, 0x03, 0x41, 0x86, 0x65, 0x53, 0x28, 0x31 }}\r
54 gPowerManagementAcpiTableStorageGuid = { 0xc0cc43bd, 0xc920, 0x4064, { 0x93, 0x5b, 0x93, 0xb4, 0x47, 0x37, 0x94, 0x70 }}\r
55 gPeiCapsuleOnFatFloppyDiskGuid = {0x2e3d2e75, 0x9b2e, 0x412d, {0xb4, 0xb1, 0x70, 0x41, 0x6b, 0x87, 0x0, 0xff }}\r
56 gPeiCapsuleOnFatIdeDiskGuid = {0xb38573b6, 0x6200, 0x4ac5, {0xb5, 0x1d, 0x82, 0xe6, 0x59, 0x38, 0xd7, 0x83 }}\r
57 gPeiCapsuleOnFatUsbDiskGuid = {0x0ffbce19, 0x324c, 0x4690, {0xa0, 0x09, 0x98, 0xc6, 0xae, 0x2e, 0xb1, 0x86 }}\r
58 gPeiCapsuleOnDataCDGuid = {0x5cac0099, 0x0dc9, 0x48e5, {0x80, 0x68, 0xbb, 0x95, 0xf5, 0x40, 0x0a, 0x9f }}\r
59 gEfiQuarkCapsuleGuid = { 0xd400d1e4, 0xa314, 0x442b, { 0x89, 0xed, 0xa9, 0x2e, 0x4c, 0x81, 0x97, 0xcb } }\r
60 gQuarkVariableLockGuid = { 0xeef749c2, 0xc047, 0x4d6e, { 0xb1, 0xbc, 0xd3, 0x6e, 0xb3, 0xa5, 0x55, 0x9c }}\r
61\r
62################################################################################\r
63#\r
64# Global Protocols Definition section - list of Global Protocols C Name Data\r
65# Structures that are provided by this package.\r
66#\r
67################################################################################\r
68[Protocols]\r
69 gEfiGlobalNvsAreaProtocolGuid = { 0x074E1E48, 0x8132, 0x47A1, { 0x8C, 0x2C, 0x3F, 0x14, 0xAD, 0x9A, 0x66, 0xDC }}\r
70 gEfiSmmSpiReadyProtocolGuid = { 0x7a5dbc75, 0x5b2b, 0x4e67, { 0xbd, 0xe1, 0xd4, 0x8e, 0xee, 0x76, 0x15, 0x62 }}\r
71 gEfiIioUdsProtocolGuid = { 0xa7ced760, 0xc71c, 0x4e1a, { 0xac, 0xb1, 0x89, 0x60, 0x4d, 0x52, 0x16, 0xcb }}\r
72\r
73################################################################################\r
74#\r
75# PCD Declarations section - list of all PCDs Declared by this Package\r
76# Only this package should be providing the\r
77# declaration, other packages should not.\r
78#\r
79################################################################################\r
80\r
81[PcdsFeatureFlag]\r
82 gQuarkPlatformTokenSpaceGuid.WaitIfResetDueToError|FALSE|BOOLEAN|0x2000000F\r
83\r
84[PcdsFixedAtBuild]\r
85 gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x20000001\r
86 gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize|0x800000|UINT32|0x20000002\r
87 gQuarkPlatformTokenSpaceGuid.PcdFlashNvStorageBase|0xFFF30000|UINT32|0x20000003\r
88 gQuarkPlatformTokenSpaceGuid.PcdFlashNvStorageSize|0x00020000|UINT32|0x20000004\r
89 gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecovery2Base|0xFFEF0400|UINT32|0x2000001C\r
90 gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecovery2Size|0x00007000|UINT32|0x2000001D\r
91 gQuarkPlatformTokenSpaceGuid.PcdFlashQNCMicrocodeSize|0x00004000|UINT32|0x2000000C\r
92 gQuarkPlatformTokenSpaceGuid.PcdPlatformDataBaseAddress|0xFFF10000|UINT32|0x2000001E\r
93 gQuarkPlatformTokenSpaceGuid.PcdPlatformDataMaxLen|0x20000|UINT32|0x2000001F\r
94 gQuarkPlatformTokenSpaceGuid.PcdHpetEnable|TRUE|BOOLEAN|0x20000018\r
95\r
96 gQuarkPlatformTokenSpaceGuid.PcdFlashFvDefaultPayloadBase|0xFFC00400|UINT32|0x20000020\r
97 gQuarkPlatformTokenSpaceGuid.PcdFlashFvDefaultPayloadSize|0x000F0000|UINT32|0x20000021\r
98 gQuarkPlatformTokenSpaceGuid.PcdFlashFvDefaultMainBase|0xFFD00400|UINT32|0x20000022\r
99 gQuarkPlatformTokenSpaceGuid.PcdFlashFvDefaultMainSize|0x000D0000|UINT32|0x20000023\r
100\r
101 gQuarkPlatformTokenSpaceGuid.PcdMemorySize|0x80000000|UINT32|0x20000032\r
102 # ECC scrub interval in miliseconds 1..255 (0 works as feature disable)\r
103 gQuarkPlatformTokenSpaceGuid.PcdEccScrubInterval|0x00|UINT8|0x20000037\r
104 # Number of 32B blocks read for ECC scrub 2..16\r
105 gQuarkPlatformTokenSpaceGuid.PcdEccScrubBlkSize|0x02|UINT8|0x20000038\r
106 gQuarkPlatformTokenSpaceGuid.PcdFlashNvMfh|0xFFF08000|UINT32|0x20000039\r
107 gQuarkPlatformTokenSpaceGuid.PcdFlashFvFixedStage1AreaBase|0xFFF90000|UINT32|0x2000003A\r
108 gQuarkPlatformTokenSpaceGuid.PcdFlashFvFixedStage1AreaSize|0x00040000|UINT32|0x2000003B\r
109 gQuarkPlatformTokenSpaceGuid.PcdEsramStage1Base|0x80000000|UINT32|0x2000003C\r
110\r
111 # Legacy Bridge protected BIOS range register configs, if == 0 then do nothing since register default.\r
112 gQuarkPlatformTokenSpaceGuid.PcdLegacyProtectedBIOSRange0Pei|0x00000000|UINT32|0x2000003D\r
113 gQuarkPlatformTokenSpaceGuid.PcdLegacyProtectedBIOSRange1Pei|0x00000000|UINT32|0x2000003E\r
114 gQuarkPlatformTokenSpaceGuid.PcdLegacyProtectedBIOSRange2Pei|0x00000000|UINT32|0x2000004F\r
115\r
116 # ACPI Power management settings.\r
117\r
118 # Power Management flags.\r
119 # PpmFlags[5] = PPM_C2 = C2 Capable, Enabled.\r
120 gQuarkPlatformTokenSpaceGuid.PcdPpmFlags|0x00000020|UINT32|0xA00000CF\r
121\r
122 # Madt Table Initialize settings.\r
123 # Defines a flag to Enable/Disable interrupt override setting table0,\r
124 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table0\r
125 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable0Enable|0x01|UINT8|0xA0000100\r
126 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable0SourceIrq|0x00|UINT8|0xA0000101\r
127 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable0Polarity|0x00|UINT8|0xA0000102\r
128 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable0TrigerMode|0x00|UINT8|0xA0000103\r
129 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable0GlobalIrq|0x02|UINT32|0xA0000104\r
130\r
131 # Madt Table Initialize settings.\r
132 # Defines a flag to Enable/Disable interrupt override setting table1,\r
133 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table1\r
134 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable1Enable|0x01|UINT8|0xA0000105\r
135 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable1SourceIrq|0x09|UINT8|0xA0000106\r
136 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable1Polarity|0x01|UINT8|0xA0000107\r
137 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable1TrigerMode|0x03|UINT8|0xA0000108\r
138 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable1GlobalIrq|0x09|UINT32|0xA0000109\r
139\r
140 # Madt Table Initialize settings.\r
141 # Defines a flag to Enable/Disable interrupt override setting table2,\r
142 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table2\r
143 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable2Enable|0x0|UINT8|0xA000010F\r
144 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable2SourceIrq|0x0|UINT8|0xA0000110\r
145 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable2Polarity|0x0|UINT8|0xA0000111\r
146 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable2TrigerMode|0x0|UINT8|0xA0000112\r
147 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable2GlobalIrq|0x0|UINT32|0xA0000113\r
148\r
149 # Madt Table Initialize settings.\r
150 # Defines a flag to Enable/Disable interrupt override setting table3,\r
151 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table3\r
152 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable3Enable|0x0|UINT8|0xA0000114\r
153 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable3SourceIrq|0x0|UINT8|0xA0000115\r
154 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable3Polarity|0x0|UINT8|0xA0000116\r
155 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable3TrigerMode|0x0|UINT8|0xA0000117\r
156 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable3GlobalIrq|0x0|UINT32|0xA0000118\r
157\r
158 # Madt Table Initialize settings.\r
159 # Defines a flag to Enable/Disable interrupt override setting table4,\r
160 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table4\r
161 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable4Enable|0x0|UINT8|0xA0000119\r
162 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable4SourceIrq|0x0|UINT8|0xA000011A\r
163 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable4Polarity|0x0|UINT8|0xA0000120\r
164 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable4TrigerMode|0x0|UINT8|0xA0000121\r
165 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable4GlobalIrq|0x0|UINT32|0xA0000122\r
166\r
167 # Madt Table Initialize settings.\r
168 # Defines a flag to Enable/Disable interrupt override setting table5,\r
169 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table5\r
170 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable5Enable|0x0|UINT8|0xA0000123\r
171 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable5SourceIrq|0x0|UINT8|0xA0000124\r
172 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable5Polarity|0x0|UINT8|0xA0000125\r
173 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable5TrigerMode|0x0|UINT8|0xA0000126\r
174 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable5GlobalIrq|0x0|UINT32|0xA0000127\r
175\r
176 # Madt Table Initialize settings.\r
177 # Defines a flag to Enable/Disable interrupt override setting table6,\r
178 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table6\r
179 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable6Enable|0x0|UINT8|0xA0000128\r
180 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable6SourceIrq|0x0|UINT8|0xA0000129\r
181 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable6Polarity|0x0|UINT8|0xA000012A\r
182 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable6TrigerMode|0x0|UINT8|0xA000012B\r
183 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable6GlobalIrq|0x0|UINT32|0xA000012C\r
184\r
185 # Madt Table Initialize settings.\r
186 # Defines a flag to Enable/Disable interrupt override setting table7,\r
187 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table7\r
188 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable7Enable|0x0|UINT8|0xA000012D\r
189 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable7SourceIrq|0x0|UINT8|0xA000012E\r
190 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable7Polarity|0x0|UINT8|0xA000012F\r
191 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable7TrigerMode|0x0|UINT8|0xA0000130\r
192 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable7GlobalIrq|0x0|UINT32|0xA0000131\r
193\r
194 # Madt Table Initialize settings.\r
195 # Defines a flag to Enable/Disable interrupt override setting table8,\r
196 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table8\r
197 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable8Enable|0x0|UINT8|0xA0000132\r
198 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable8SourceIrq|0x0|UINT8|0xA0000133\r
199 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable8Polarity|0x0|UINT8|0xA0000134\r
200 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable8TrigerMode|0x0|UINT8|0xA0000135\r
201 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable8GlobalIrq|0x0|UINT32|0xA0000136\r
202\r
203 # Madt Table Initialize settings.\r
204 # Defines a flag to Enable/Disable interrupt override setting table9,\r
205 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table9\r
206 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable9Enable|0x0|UINT8|0xA0000137\r
207 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable9SourceIrq|0x0|UINT8|0xA0000138\r
208 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable9Polarity|0x0|UINT8|0xA0000139\r
209 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable9TrigerMode|0x0|UINT8|0xA000013A\r
210 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable9GlobalIrq|0x0|UINT32|0xA000013B\r
211\r
212 # Madt Table Initialize settings.\r
213 # Defines a flag to Enable/Disable interrupt override setting table10,\r
214 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table10\r
215 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable10Enable|0x0|UINT8|0xA000013C\r
216 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable10SourceIrq|0x0|UINT8|0xA000013D\r
217 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable10Polarity|0x0|UINT8|0xA000013E\r
218 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable10TrigerMode|0x0|UINT8|0xA000013F\r
219 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable10GlobalIrq|0x0|UINT32|0xA0000140\r
220\r
221 # Madt Table Initialize settings.\r
222 # Defines a flag to Enable/Disable interrupt override setting table11,\r
223 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table11\r
224 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable11Enable|0x0|UINT8|0xA0000141\r
225 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable11SourceIrq|0x0|UINT8|0xA0000142\r
226 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable11Polarity|0x0|UINT8|0xA0000143\r
227 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable11TrigerMode|0x0|UINT8|0xA0000144\r
228 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable11GlobalIrq|0x0|UINT32|0xA0000145\r
229\r
230 # Madt Table Initialize settings.\r
231 # Defines a flag to Enable/Disable interrupt override setting table12,\r
232 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table12\r
233 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable12Enable|0x0|UINT8|0xA0000146\r
234 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable12SourceIrq|0x0|UINT8|0xA0000147\r
235 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable12Polarity|0x0|UINT8|0xA0000148\r
236 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable12TrigerMode|0x0|UINT8|0xA0000149\r
237 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable12GlobalIrq|0x0|UINT32|0xA000014A\r
238\r
239 # Madt Table Initialize settings.\r
240 # Defines a flag to Enable/Disable interrupt override setting table13,\r
241 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table13\r
242 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable13Enable|0x0|UINT8|0xA000014B\r
243 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable13SourceIrq|0x0|UINT8|0xA000014C\r
244 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable13Polarity|0x0|UINT8|0xA000014D\r
245 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable13TrigerMode|0x0|UINT8|0xA000014E\r
246 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable13GlobalIrq|0x0|UINT32|0xA000014F\r
247\r
248 # Madt Table Initialize settings.\r
249 # Defines a flag to Enable/Disable interrupt override setting table14,\r
250 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table14\r
251 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable14Enable|0x0|UINT8|0xA0000150\r
252 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable14SourceIrq|0x0|UINT8|0xA0000151\r
253 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable14Polarity|0x0|UINT8|0xA0000152\r
254 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable14TrigerMode|0x0|UINT8|0xA0000153\r
255 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable14GlobalIrq|0x0|UINT32|0xA0000154\r
256\r
257 # Madt Table Initialize settings.\r
258 # Defines a flag to Enable/Disable interrupt override setting table15,\r
259 # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table15\r
260 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable15Enable|0x0|UINT8|0xA0000155\r
261 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable15SourceIrq|0x0|UINT8|0xA0000156\r
262 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable15Polarity|0x0|UINT8|0xA0000157\r
263 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable15TrigerMode|0x0|UINT8|0xA0000158\r
264 gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable15GlobalIrq|0x0|UINT32|0xA0000159\r
265\r
266 # Madt Table Initialize settings.\r
267 # Defines a bunch of Pcds for IO APIC setting:\r
268 # IoApicAddress, GlobalInterruptBase, IoApicId, NmiEnable, NmiSource, Polarity and TrigerMode\r
269 gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingIoApicAddress|0xFEC00000|UINT32|0xA0000170\r
270 gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingGlobalInterruptBase|0x0|UINT32|0xA0000171\r
271 gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingIoApicId|0x01|UINT8|0xA0000172\r
272 gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingNmiEnable|0x0|UINT8|0xA0000173\r
273 gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingNmiSource|0x0|UINT8|0xA0000174\r
274 gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingPolarity|0x0|UINT8|0xA0000175\r
275 gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingTrigerMode|0x0|UINT8|0xA0000176\r
276\r
277 # Madt Table Initialize settings.\r
278 # Defines a bunch of Pcds for Local APIC setting:\r
279 # NmiEnabelApicIdMask, AddressOverrideEnable, Polarity, TrigerMode, LocalApicLint, LocalApicAddress and LocalApicAddressOverride\r
280 gQuarkPlatformTokenSpaceGuid.PcdLocalApicSettingNmiEnabelApicIdMask|0x03|UINT8|0xA0000177\r
281 gQuarkPlatformTokenSpaceGuid.PcdLocalApicSettingAddressOverrideEnable|0x00|UINT8|0xA0000178\r
282 gQuarkPlatformTokenSpaceGuid.PcdLocalApicSettingPolarity|0x01|UINT8|0xA0000179\r
283 gQuarkPlatformTokenSpaceGuid.PcdLocalApicSettingTrigerMode|0x01|UINT8|0xA000017A\r
284 gQuarkPlatformTokenSpaceGuid.PcdLocalApicSettingLocalApicLint|0x01|UINT8|0xA000017B\r
285 gQuarkPlatformTokenSpaceGuid.PcdLocalApicAddressOverride|0x00|UINT64|0xA000017C\r
286\r
287 # PCDs for auto provisioning of UEFI SecureBoot.\r
288 gQuarkPlatformTokenSpaceGuid.PcdPkX509File |{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }|VOID*|0xA0000180\r
289 gQuarkPlatformTokenSpaceGuid.PcdKekX509File |{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }|VOID*|0xA0000181\r
290 gQuarkPlatformTokenSpaceGuid.PcdKekRsa2048File |{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }|VOID*|0xA0000182\r
291 gQuarkPlatformTokenSpaceGuid.PcdDbX509File |{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }|VOID*|0xA0000183\r
292 gQuarkPlatformTokenSpaceGuid.PcdDbxX509File |{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }|VOID*|0xA0000184\r
293\r
294[PcdsFixedAtBuild, PcdsPatchableInModule]\r
295 ## This PCD points to the file name GUID of the BootManagerMenuApp\r
296 # Platform can customize the PCD to point to different application for Boot Manager Menu\r
297 gQuarkPlatformTokenSpaceGuid.PcdBootManagerMenuFile|{ 0xdc, 0x5b, 0xc2, 0xee, 0xf2, 0x67, 0x95, 0x4d, 0xb1, 0xd5, 0xf8, 0x1b, 0x20, 0x39, 0xd1, 0x1d }|VOID*|0x00000003\r
298\r
299 #BIOS Information (Type 0), please refer spec SMBIOS 2.4, section 3.3.1 ,for following SMBIOS relates comments.\r
300\r
301 # String number of the BIOS Vendors Name\r
302 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBiosVendor|"Intel Corp."|VOID*|0xA0000033\r
303 # String number of the BIOS Release Data\r
304 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBiosReleaseDate|"01/01/2014"|VOID*|0xA0000035\r
305 # Segment location of BIOS starting address.\r
306 # Note: The size of the runtime BIOS image can be computed by subtracting the Starting Address Segment from 10000h and multiplying the result by 16.\r
307 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBiosStartAddress|0xE000|UINT16|0xA0000036\r
308 #Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc. See 3.3.1.1.\r
309 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBiosChar|0x03037C099880|UINT64|0xA0000037\r
310 #Defines which functions the BIOS supports. etc.See 3.3.1.2.1.\r
311 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBiosCharEx1|0x03|UINT8|0xA0000038\r
312 #Defines which functions the BIOS supports. etc.See 3.3.1.2.2.\r
313 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBiosCharEx2|0x03|UINT8|0xA0000039\r
314\r
315 # System Information (Type 1), Section 3.3.2\r
316 # System Manufacturer String\r
317 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemManufacturer|"Intel Corp."|VOID*|0xA000003A\r
318 # System Product String\r
319 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemProductName|"QUARK"|VOID*|0xA000003B\r
320 # System Version\r
321 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemVersion|"1.0"|VOID*|0xA000003C\r
322 # System SerialNumber String\r
323 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSerialNumber|"Unknown"|VOID*|0xA000003D\r
324 # System UUID\r
325 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemUuid|{0x23, 0xef, 0xff, 0x13,0x54, 0x86, 0xda, 0x46, 0xa4, 0x7, 0x39, 0xc9, 0x12, 0x2, 0xd3, 0x56}|VOID*|0xA000003E\r
326 # Manufacturer String\r
327 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSKUNumber|"System SKUNumber"|VOID*|0xA000003F\r
328 # System Family String\r
329 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemFamily|"X1000"|VOID*|0xA0000040\r
330\r
331 # Base Board (or Module) Information (Type 2), Section 3.3.3\r
332 # Board Manufacturer String\r
333 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBoardManufacturer|"Intel Corp."|VOID*|0xA0000041\r
334 # Board Product Name| String\r
335 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBoardProductName|"QUARK"|VOID*|0xA0000042\r
336 # Board Version String\r
337 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBoardVersion|"FAB-D"|VOID*|0xA0000043\r
338 # Board Serial Number\r
339 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBoardSerialNumber|"3"|VOID*|0xA0000044\r
340 # System Enclosure or Chassis(Type 3) Section 3.3.4\r
341 # Chassis Manufacturer String\r
342 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisManufacturer|"Chassis Manufacturer"|VOID*|0xA0000045\r
343 # ChassisVersion\r
344 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisVersion|"Chassis Version"|VOID*|0xA0000046\r
345 # Chassis SerialNumber String\r
346 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisSerialNumber|"Chassis Serial Number"|VOID*|0xA0000047\r
347 # Chassis Asset Tag\r
348 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisAssetTag|"Chassis Asset Tag"|VOID*|0xA0000051\r
349 # Chassis Type\r
350 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisType|0x00000003|UINT8|0xA0000048\r
351 # Identifies the state of the enclosure when it was last booted. See 3.3.4.2 for definitions.\r
352 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisBootupState|0x03|UINT8|0xA0000049\r
353 # Identifies the state of the enclosures power supply (or supplies) when last booted. See 3.3.4.2 for definitions.\r
354 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisPowerSupplyState|0x03|UINT8|0xA000004A\r
355 # Identifies the enclosures physical security status when last booted. See 3.3.4.3 for definitions.\r
356 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisSecurityState|0x01|UINT8|0xA000004B\r
357 # Contains OEM- or BIOS vendor-specific information.\r
358 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisOemDefined|0x0|UINT32|0xA000004C\r
359 # The height of the enclosure, in 'U's. A U is a standard unit of measure for the height of a rack or rack-mountable component\r
360 # and is equal to 1.75 inches or 4.445 cm. A value of 00h indicates that the enclosure height is unspecified.\r
361 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisHeight|0x0|UINT8|0xA000004D\r
362 # Identifies the number of power cords associated with the enclosure or chassis. A value of 00h indicates that the number is unspecified.\r
363 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisNumberPowerCords|0x0|UINT8|0xA000004E\r
364 # Identifies the number of Contained Element records that follow, in the range 0 to 255.\r
365 # Each Contained Element group comprises m bytes, as specified by the Contained Element Record Length field that follows.\r
366 # If no Contained Elements are included, this field is set to 0.\r
367 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisElementCount|0x0|UINT8|0xA000004F\r
368 # Identifies the byte length of each Contained Element record that follow, in the range 0 to 255.\r
369 # If no Contained Elements are included, this field is set to 0. For v2.3.2 and later of this specification,\r
370 # this field is set to at least 03h when Contained Elements are specified.\r
371 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisElementRecordLength|0x0|UINT8|0xA0000050\r
372\r
373 # Defines the number of connectors existent on the board\r
374 # The valid range is between 0 and 16\r
375 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSConnectorNumber|16|UINT8|0xA0000060\r
376\r
377 # Defines the designator of port1 internal connector\r
378 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort1InternalConnectorDesignator|"X14 "|VOID*|0xA0000061\r
379 # Defines the designator of port1 external connector\r
380 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort1ExternalConnectorDesignator|"Keyboard"|VOID*|0xA0000062\r
381 # Defines the type of port1 internal connector\r
382 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
383 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort1InternalConnectorType|0x0F|UINT8|0xA0000063\r
384 # Defines the type of port1 external connector\r
385 # The valid range is between 0 to 0xFF, and 0x0F here means EfiPortConnectorTypePS2\r
386 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort1ExternalConnectorType|0x0F|UINT8|0xA0000064\r
387 # Defines the type of port1\r
388 # The valid range is between 0 to 0xFF, and 0x0D here means EfiPortTypeKeyboard\r
389 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort1Type|0x0D|UINT8|0xA0000065\r
390\r
391 # Defines the designator of port2 internal connector\r
392 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort2InternalConnectorDesignator|"X15 "|VOID*|0xA0000066\r
393 # Defines the designator of port2 external connector\r
394 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort2ExternalConnectorDesignator|"Mouse"|VOID*|0xA0000067\r
395 # Defines the type of port2 internal connector\r
396 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
397 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort2InternalConnectorType|0x0F|UINT8|0xA0000068\r
398 # Defines the type of port2 external connector\r
399 # The valid range is between 0 to 0xFF, and 0x0F here means EfiPortConnectorTypePS2\r
400 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort2ExternalConnectorType|0x0F|UINT8|0xA0000069\r
401 # Defines the type of port2\r
402 # The valid range is between 0 to 0xFF, and 0x0E here means EfiPortTypeMouse\r
403 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort2Type|0x0E|UINT8|0xA000006A\r
404\r
405 # Defines the designator of port3 internal connector\r
406 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort3InternalConnectorDesignator|"X16 "|VOID*|0xA000006B\r
407 # Defines the designator of port3 external connector\r
408 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort3ExternalConnectorDesignator|"COM 1"|VOID*|0xA000006C\r
409 # Defines the type of port3 internal connector\r
410 # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortConnectorTypeOther\r
411 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort3InternalConnectorType|0xFF|UINT8|0xA000006D\r
412 # Defines the type of port3 external connector\r
413 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
414 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort3ExternalConnectorType|0x0|UINT8|0xA000006E\r
415 # Defines the type of port3\r
416 # The valid range is between 0 to 0xFF, and 0x09 here means EfiPortTypeSerial16550ACompatible\r
417 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort3Type|0x09|UINT8|0xA000006F\r
418\r
419 # Defines the designator of port4 internal connector\r
420 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort4InternalConnectorDesignator|"X17 "|VOID*|0xA0000070\r
421 # Defines the designator of port4 external connector\r
422 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort4ExternalConnectorDesignator|"COM 2"|VOID*|0xA0000071\r
423 # Defines the type of port4 internal connector\r
424 # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortConnectorTypeOther\r
425 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort4InternalConnectorType|0xFF|UINT8|0xA0000072\r
426 # Defines the type of port4 external connector\r
427 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
428 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort4ExternalConnectorType|0x0|UINT8|0xA0000073\r
429 # Defines the type of port4\r
430 # The valid range is between 0 to 0xFF, and 0x09 here means EfiPortTypeSerial16550ACompatible\r
431 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort4Type|0x09|UINT8|0xA0000074\r
432\r
433 # Defines the designator of port5 internal connector\r
434 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort5InternalConnectorDesignator|"X18 "|VOID*|0xA0000075\r
435 # Defines the designator of port5 external connector\r
436 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort5ExternalConnectorDesignator|"COM 3"|VOID*|0xA0000076\r
437 # Defines the type of port5 internal connector\r
438 # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortConnectorTypeOther\r
439 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort5InternalConnectorType|0xFF|UINT8|0xA0000077\r
440 # Defines the type of port5 external connector\r
441 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
442 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort5ExternalConnectorType|0x0|UINT8|0xA0000078\r
443 # Defines the type of port5\r
444 # The valid range is between 0 to 0xFF, and 0x09 here means EfiPortTypeSerial16550ACompatible\r
445 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort5Type|0x09|UINT8|0xA0000079\r
446\r
447 # Defines the designator of port6 internal connector\r
448 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort6InternalConnectorDesignator|"X19 "|VOID*|0xA000007A\r
449 # Defines the designator of port6 external connector\r
450 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort6ExternalConnectorDesignator|"COM 4"|VOID*|0xA000007B\r
451 # Defines the type of port6 internal connector\r
452 # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortConnectorTypeOther\r
453 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort6InternalConnectorType|0xFF|UINT8|0xA000007C\r
454 # Defines the type of port6 external connector\r
455 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
456 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort6ExternalConnectorType|0x0|UINT8|0xA000007D\r
457 # Defines the type of port6\r
458 # The valid range is between 0 to 0xFF, and 0x09 here means EfiPortTypeSerial16550ACompatible\r
459 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort6Type|0x09|UINT8|0xA000007E\r
460\r
461 # Defines the designator of port7 internal connector\r
462 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort7InternalConnectorDesignator|"J4A2"|VOID*|0xA000007F\r
463 # Defines the designator of port7 external connector\r
464 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort7ExternalConnectorDesignator|"LPT 1"|VOID*|0xA0000080\r
465 # Defines the type of port7 internal connector\r
466 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
467 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort7InternalConnectorType|0x0|UINT8|0xA0000081\r
468 # Defines the type of port7 external connector\r
469 # The valid range is between 0 to 0xFF, and 0x12 here means EfiPortConnectorTypeDB25Male\r
470 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort7ExternalConnectorType|0x04|UINT8|0xA0000082\r
471 # Defines the type of port7\r
472 # The valid range is between 0 to 0xFF, and 0x10 here means EfiPortTypeEcpEpp\r
473 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort7Type|0x05|UINT8|0xA0000083\r
474\r
475 # Defines the designator of port8 internal connector\r
476 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort8InternalConnectorDesignator|"X20 "|VOID*|0xA0000084\r
477 # Defines the designator of port8 external connector\r
478 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort8ExternalConnectorDesignator|"USB1"|VOID*|0xA0000085\r
479 # Defines the type of port8 internal connector\r
480 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
481 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort8InternalConnectorType|0x0|UINT8|0xA0000086\r
482 # Defines the type of port8 external connector\r
483 # The valid range is between 0 to 0xFF, and 0x12 here means EfiPortConnectorTypeUsb\r
484 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort8ExternalConnectorType|0x12|UINT8|0xA0000087\r
485 # Defines the type of port8\r
486 # The valid range is between 0 to 0xFF, and 0x10 here means EfiPortTypeUsb\r
487 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort8Type|0x10|UINT8|0xA0000088\r
488\r
489 # Defines the designator of port9 internal connector\r
490 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort9InternalConnectorDesignator|"X21 "|VOID*|0xA0000089\r
491 # Defines the designator of port9 external connector\r
492 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort9ExternalConnectorDesignator|"USB2"|VOID*|0xA000008A\r
493 # Defines the type of port9 internal connector\r
494 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
495 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort9InternalConnectorType|0x0|UINT8|0xA000008B\r
496 # Defines the type of port9 external connector\r
497 # The valid range is between 0 to 0xFF, and 0x12 here means EfiPortConnectorTypeUsb\r
498 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort9ExternalConnectorType|0x12|UINT8|0xA000008C\r
499 # Defines the type of port9\r
500 # The valid range is between 0 to 0xFF, and 0x10 here means EfiPortTypeUsb\r
501 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort9Type|0x10|UINT8|0xA000008D\r
502\r
503 # Defines the designator of port10 internal connector\r
504 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort10InternalConnectorDesignator|"X22 "|VOID*|0xA000008E\r
505 # Defines the designator of port10 external connector\r
506 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort10ExternalConnectorDesignator|"USB3"|VOID*|0xA000008F\r
507 # Defines the type of port10 internal connector\r
508 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
509 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort10InternalConnectorType|0x0|UINT8|0xA0000090\r
510 # Defines the type of port10 external connector\r
511 # The valid range is between 0 to 0xFF, and 0x12 here means EfiPortConnectorTypeUsb\r
512 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort10ExternalConnectorType|0x12|UINT8|0xA0000091\r
513 # Defines the type of port10\r
514 # The valid range is between 0 to 0xFF, and 0x10 here means EfiPortTypeUsb\r
515 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort10Type|0x10|UINT8|0xA0000092\r
516\r
517 # Defines the designator of port11 internal connector\r
518 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort11InternalConnectorDesignator|"X23 "|VOID*|0xA0000093\r
519 # Defines the designator of port11 external connector\r
520 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort11ExternalConnectorDesignator|"USB4"|VOID*|0xA0000094\r
521 # Defines the type of port11 internal connector\r
522 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
523 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort11InternalConnectorType|0x0|UINT8|0xA0000095\r
524 # Defines the type of port11 external connector\r
525 # The valid range is between 0 to 0xFF, and 0x12 here means EfiPortConnectorTypeUsb\r
526 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort11ExternalConnectorType|0x12|UINT8|0xA0000096\r
527 # Defines the type of port11\r
528 # The valid range is between 0 to 0xFF, and 0x10 here means EfiPortTypeUsb\r
529 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort11Type|0x10|UINT8|0xA0000097\r
530\r
531 # Defines the designator of port12 internal connector\r
532 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort12InternalConnectorDesignator|"X28 "|VOID*|0xA0000098\r
533 # Defines the designator of port12 external connector\r
534 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort12ExternalConnectorDesignator|"RJ-45 Type"|VOID*|0xA0000099\r
535 # Defines the type of port12 internal connector\r
536 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
537 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort12InternalConnectorType|0x0|UINT8|0xA000009A\r
538 # Defines the type of port12 external connector\r
539 # The valid range is between 0 to 0xFF, and 0x0B here means EfiPortConnectorTypeRJ45\r
540 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort12ExternalConnectorType|0x0B|UINT8|0xA000009B\r
541 # Defines the type of port12\r
542 # The valid range is between 0 to 0xFF, and 0x1F here means EfiPortTypeNetworkPort\r
543 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort12Type|0x1F|UINT8|0xA000009C\r
544\r
545 # Defines the designator of port13 internal connector\r
546 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort13InternalConnectorDesignator|"J1G1"|VOID*|0xA000009D\r
547 # Defines the designator of port13 external connector\r
548 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort13ExternalConnectorDesignator|"Floppy"|VOID*|0xA000009E\r
549 # Defines the type of port13 internal connector\r
550 # The valid range is between 0 to 0xFF, and 0x16 here means EfiPortConnectorTypeOnboardFloppy\r
551 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort13InternalConnectorType|0x17|UINT8|0xA000009F\r
552 # Defines the type of port13 external connector\r
553 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
554 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort13ExternalConnectorType|0x0|UINT8|0xA00000A0\r
555 # Defines the type of port13\r
556 # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortTypeOther\r
557 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort13Type|0xFF|UINT8|0xA00000A1\r
558\r
559 # Defines the designator of port14 internal connector\r
560 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort14InternalConnectorDesignator|"J2H2"|VOID*|0xA00000A2\r
561 # Defines the designator of port14 external connector\r
562 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort14ExternalConnectorDesignator|"IDE"|VOID*|0xA00000A3\r
563 # Defines the type of port14 internal connector\r
564 # The valid range is between 0 to 0xFF, and 0x16 here means EfiPortConnectorTypeOnboardIde\r
565 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort14InternalConnectorType|0x16|UINT8|0xA00000A4\r
566 # Defines the type of port14 external connector\r
567 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
568 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort14ExternalConnectorType|0x0|UINT8|0xA00000A5\r
569 # Defines the type of port14\r
570 # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortTypeOther\r
571 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort14Type|0xFF|UINT8|0xA00000A6\r
572\r
573 # Defines the designator of port15 internal connector\r
574 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort15InternalConnectorDesignator|"X29 "|VOID*|0xA00000A7\r
575 # Defines the designator of port15 external connector\r
576\r
577 # Defines the type of port15 internal connector\r
578 # The valid range is between 0 to 0xFF, and 0x16 here means EfiPortConnectorTypeOnboardIde\r
579 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort15InternalConnectorType|0x16|UINT8|0xA00000A9\r
580 # Defines the type of port15 external connector\r
581 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
582 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort15ExternalConnectorType|0x0|UINT8|0xA00000AA\r
583 # Defines the type of port15\r
584 # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortTypeOther\r
585 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort15Type|0xFF|UINT8|0xA00000AB\r
586\r
587 # Defines the designator of port16 internal connector\r
588 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort16InternalConnectorDesignator|"X30 "|VOID*|0xA00000AC\r
589 # Defines the designator of port16 external connector\r
590\r
591 # Defines the type of port16 internal connector\r
592 # The valid range is between 0 to 0xFF, and 0x16 here means EfiPortConnectorTypeOnboardIde\r
593 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort16InternalConnectorType|0x16|UINT8|0xA00000AE\r
594 # Defines the type of port16 external connector\r
595 # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r
596 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort16ExternalConnectorType|0x0|UINT8|0xA00000AF\r
597 # Defines the type of port16\r
598 # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortTypeOther\r
599 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort16Type|0xFF|UINT8|0xA00000B0\r
600\r
601 # Defines the number of the slots existent on board\r
602 # The valid range is between 0 and 14\r
603 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlotNumber|5|UINT8|0xA000023F\r
604 # Defines the designation of system slot1\r
605 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1Designation|"PCI SLOT1"|VOID*|0xA0000240\r
606 # Defines the type of system slot1\r
607 # The valid range is between 0x01 to 0xA5, and 0x06 here means EfiSlotTypePci\r
608 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1Type|0x6|UINT8|0xA0000241\r
609 # Defines the data bus width of system slot1\r
610 # The valid range is between 0x01 to 0x07, and 0x05 here means EfiSlotDataBusWidth32Bit\r
611 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1DataBusWidth|0x5|UINT8|0xA0000242\r
612 # Defines the usage of system slot1\r
613 # The valid range is between 0x01 to 0x04, and 0x03 here means EfiSlotUsageAvailable\r
614 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1Usage|0x3|UINT8|0xA0000243\r
615 # Defines the length of system slot1\r
616 # The valid range is between 0x01 to 0x04, and 0x04 here means EfiSlotLengthLong\r
617 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1Length|0x4|UINT8|0xA0000244\r
618 # Defines the ID of system slot1, a number of UINT16\r
619 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1Id|0x01|UINT16|0xA0000245\r
620 # Defines the characteristics of system slot1 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
621 # typedef struct {\r
622 # UINT32 CharacteristicsUnknown :1;\r
623 # UINT32 Provides50Volts :1;\r
624 # UINT32 Provides33Volts :1;\r
625 # UINT32 SharedSlot :1;\r
626 # UINT32 PcCard16Supported :1;\r
627 # UINT32 CardBusSupported :1;\r
628 # UINT32 ZoomVideoSupported :1;\r
629 # UINT32 ModemRingResumeSupported:1;\r
630 # UINT32 PmeSignalSupported :1;\r
631 # UINT32 HotPlugDevicesSupported :1;\r
632 # UINT32 SmbusSignalSupported :1;\r
633 # UINT32 Reserved :21;\r
634 # } EFI_MISC_SLOT_CHARACTERISTICS;\r
635 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1Characteristics|0x504|UINT32|0xA0000246\r
636\r
637 # Defines the designation of system slot2\r
638 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2Designation|"PCI-Express 1"|VOID*|0xA0000247\r
639\r
640 # Defines the type of system slot2\r
641 # The valid range is between 0x01 to 0xA5, and 0x06 here means EfiSlotTypePci\r
642 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2Type|0xA5|UINT8|0xA0000248\r
643 # Defines the data bus width of system slot2\r
644 # The valid range is between 0x01 to 0x07, and 0x05 here means EfiSlotDataBusWidth32Bit\r
645 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2DataBusWidth|0x5|UINT8|0xA0000249\r
646 # Defines the usage of system slot2\r
647 # The valid range is between 0x01 to 0x04, and 0x03 here means EfiSlotUsageAvailable\r
648 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2Usage|0x3|UINT8|0xA000024A\r
649 # Defines the length of system slot2\r
650 # The valid range is between 0x01 to 0x04, and 0x04 here means EfiSlotLengthLong\r
651 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2Length|0x4|UINT8|0xA000024B\r
652 # Defines the ID of system slot2, a number of UINT16\r
653 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2Id|0x02|UINT16|0xA000024C\r
654 # Defines the characteristics of system slot2 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
655 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2Characteristics|0x504|UINT32|0xA000024D\r
656\r
657 # Defines the designation of system slot3\r
658 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3Designation|"PCI-Express 2"|VOID*|0xA000024E\r
659 # Defines the type of system slot3\r
660 # The valid range is between 0x01 to 0xA5, and 0x06 here means EfiSlotTypePci\r
661 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3Type|0xA5|UINT8|0xA000024F\r
662 # Defines the data bus width of system slot3\r
663 # The valid range is between 0x01 to 0x07, and 0x05 here means EfiSlotDataBusWidth32Bit\r
664 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3DataBusWidth|0x5|UINT8|0xA0000250\r
665 # Defines the usage of system slot3\r
666 # The valid range is between 0x01 to 0x04, and 0x03 here means EfiSlotUsageAvailable\r
667 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3Usage|0x3|UINT8|0xA0000251\r
668 # Defines the length of system slot3\r
669 # The valid range is between 0x01 to 0x04, and 0x04 here means EfiSlotLengthLong\r
670 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3Length|0x4|UINT8|0xA0000252\r
671 # Defines the ID of system slot3, a number of UINT16\r
672 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3Id|0x03|UINT16|0xA0000253\r
673 # Defines the characteristics of system slot3 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
674 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3Characteristics|0x504|UINT32|0xA000254\r
675\r
676 # Defines the designation of system slot4\r
677 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4Designation|"PCI-Express 3"|VOID*|0xA0000255\r
678 # Defines the type of system slot4\r
679 # The valid range is between 0x01 to 0xA5, and 0xA5 here means EfiSlotTypePciExpress\r
680 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4Type|0xA5|UINT8|0xA0000256\r
681 # Defines the data bus width of system slot4\r
682 # The valid range is between 0x01 to 0x07, and 0x05 here means EfiSlotDataBusWidth32Bit\r
683 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4DataBusWidth|0x5|UINT8|0xA0000257\r
684 # Defines the usage of system slot4\r
685 # The valid range is between 0x01 to 0x04, and 0x03 here means EfiSlotUsageAvailable\r
686 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4Usage|0x3|UINT8|0xA0000258\r
687 # Defines the length of system slot4\r
688 # The valid range is between 0x01 to 0x04, and 0x04 here means EfiSlotLengthLong\r
689 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4Length|0x4|UINT8|0xA0000259\r
690 # Defines the ID of system slot4, a number of UINT16\r
691 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4Id|0x04|UINT16|0xA0000260\r
692 # Defines the characteristics of system slot4 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
693 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4Characteristics|0x504|UINT32|0xA0000261\r
694\r
695 # Defines the designation of system slot5\r
696 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5Designation|"Mini PCI-E"|VOID*|0xA0000262\r
697 # Defines the type of system slot5\r
698 # The valid range is between 0x01 to 0xA5, and 0xA5 here means EfiSlotTypePciExpress\r
699 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5Type|0xA5|UINT8|0xA0000263\r
700 # Defines the data bus width of system slot5\r
701 # The valid range is between 0x01 to 0x07, and 0x05 here means EfiSlotDataBusWidth32Bit\r
702 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5DataBusWidth|0x5|UINT8|0xA0000264\r
703 # Defines the usage of system slot5\r
704 # The valid range is between 0x01 to 0x04, and 0x03 here means EfiSlotUsageAvailable\r
705 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5Usage|0x3|UINT8|0xA0000265\r
706 # Defines the length of system slot5\r
707 # The valid range is between 0x01 to 0x04, and 0x04 here means EfiSlotLengthLong\r
708 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5Length|0x4|UINT8|0xA0000266\r
709 # Defines the ID of system slot5, a number of UINT16\r
710 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5Id|0x05|UINT16|0xA0000267\r
711 # Defines the characteristics of system slot5 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
712 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5Characteristics|0x504|UINT32|0xA0000268\r
713\r
714 # Defines the designation of system slot6\r
715 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6Designation|"NONE"|VOID*|0xA0000269\r
716 # Defines the type of system slot6\r
717 # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r
718 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6Type|0x2|UINT8|0xA000026A\r
719 # Defines the data bus width of system slot6\r
720 # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r
721 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6DataBusWidth|0x2|UINT8|0xA000026B\r
722 # Defines the usage of system slot6\r
723 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r
724 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6Usage|0x2|UINT8|0xA000026C\r
725 # Defines the length of system slot6\r
726 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r
727 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6Length|0x2|UINT8|0xA000026D\r
728 # Defines the ID of system slot6, a number of UINT16\r
729 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6Id|0x0|UINT16|0xA000026E\r
730 # Defines the characteristics of system slot6 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
731 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6Characteristics|0x0|UINT32|0xA000026F\r
732\r
733 # Defines the designation of system slot7\r
734 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7Designation|"NONE"|VOID*|0xA0000270\r
735 # Defines the type of system slot7\r
736 # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r
737 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7Type|0x2|UINT8|0xA0000271\r
738 # Defines the data bus width of system slot7\r
739 # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r
740 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7DataBusWidth|0x2|UINT8|0xA0000272\r
741 # Defines the usage of system slot7\r
742 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r
743 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7Usage|0x2|UINT8|0xA0000273\r
744 # Defines the length of system slot7\r
745 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r
746 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7Length|0x2|UINT8|0xA0000274\r
747 # Defines the ID of system slot7, a number of UINT16\r
748 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7Id|0x0|UINT16|0xA0000275\r
749 # Defines the characteristics of system slot7 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
750 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7Characteristics|0x0|UINT32|0xA0000276\r
751\r
752 # Defines the designation of system slot8\r
753 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8Designation|"NONE"|VOID*|0xA0000277\r
754 # Defines the type of system slot8\r
755 # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r
756 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8Type|0x2|UINT8|0xA0000278\r
757 # Defines the data bus width of system slot8\r
758 # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r
759 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8DataBusWidth|0x2|UINT8|0xA0000279\r
760 # Defines the usage of system slot8\r
761 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r
762 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8Usage|0x2|UINT8|0xA000027A\r
763 # Defines the length of system slot8\r
764 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r
765 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8Length|0x2|UINT8|0xA000027B\r
766 # Defines the ID of system slot8, a number of UINT16\r
767 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8Id|0x0|UINT16|0xA000027C\r
768 # Defines the characteristics of system slot8 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
769 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8Characteristics|0x0|UINT32|0xA000027D\r
770\r
771 # Defines the designation of system slot9\r
772 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9Designation|"NONE"|VOID*|0xA000027E\r
773 # Defines the type of system slot9\r
774 # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r
775 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9Type|0x2|UINT8|0xA000027F\r
776 # Defines the data bus width of system slot9\r
777 # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r
778 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9DataBusWidth|0x2|UINT8|0xA0000280\r
779 # Defines the usage of system slot9\r
780 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r
781 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9Usage|0x2|UINT8|0xA0000281\r
782 # Defines the length of system slot9\r
783 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r
784 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9Length|0x2|UINT8|0xA0000282\r
785 # Defines the ID of system slot9, a number of UINT16\r
786 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9Id|0x0|UINT16|0xA0000283\r
787 # Defines the characteristics of system slot9 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
788 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9Characteristics|0x0|UINT32|0xA0000284\r
789\r
790 # Defines the designation of system slot10\r
791 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10Designation|"None"|VOID*|0xA0000285\r
792 # Defines the type of system slot10\r
793 # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r
794 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10Type|0x2|UINT8|0xA0000286\r
795 # Defines the data bus width of system slot10\r
796 # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r
797 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10DataBusWidth|0x2|UINT8|0xA0000287\r
798 # Defines the usage of system slot10\r
799 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r
800 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10Usage|0x2|UINT8|0xA0000288\r
801 # Defines the length of system slot10\r
802 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r
803 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10Length|0x2|UINT8|0xA0000289\r
804 # Defines the ID of system slot10, a number of UINT16\r
805 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10Id|0x0|UINT16|0xA000028A\r
806 # Defines the characteristics of system slot10 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
807 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10Characteristics|0x0|UINT32|0xA000028B\r
808\r
809 # Defines the designation of system slot11\r
810 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11Designation|"None"|VOID*|0xA000028C\r
811 # Defines the type of system slot11\r
812 # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r
813 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11Type|0x2|UINT8|0xA000028D\r
814 # Defines the data bus width of system slot11\r
815 # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r
816 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11DataBusWidth|0x2|UINT8|0xA000028E\r
817 # Defines the usage of system slot11\r
818 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r
819 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11Usage|0x2|UINT8|0xA000028F\r
820 # Defines the length of system slot11\r
821 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r
822 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11Length|0x2|UINT8|0xA0000290\r
823 # Defines the ID of system slot11, a number of UINT16\r
824 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11Id|0x0|UINT16|0xA00000EE\r
825 # Defines the characteristics of system slot11 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
826 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11Characteristics|0x0|UINT32|0xA0000291\r
827\r
828 # Defines the designation of system slot12\r
829 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12Designation|"None"|VOID*|0xA0000292\r
830 # Defines the type of system slot12\r
831 # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r
832 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12Type|0x2|UINT8|0xA0000293\r
833 # Defines the data bus width of system slot12\r
834 # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r
835 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12DataBusWidth|0x2|UINT8|0xA0000294\r
836 # Defines the usage of system slot12\r
837 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r
838 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12Usage|0x2|UINT8|0xA0000295\r
839 # Defines the length of system slot12\r
840 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r
841 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12Length|0x2|UINT8|0xA0000296\r
842 # Defines the ID of system slot12, a number of UINT16\r
843 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12Id|0x0|UINT16|0xA0000297\r
844 # Defines the characteristics of system slot12 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
845 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12Characteristics|0x0|UINT32|0xA0000298\r
846\r
847 # Defines the designation of system slot13\r
848 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13Designation|"None"|VOID*|0xA0000299\r
849 # Defines the type of system slot13\r
850 # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r
851 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13Type|0x2|UINT8|0xA000029A\r
852 # Defines the data bus width of system slot13\r
853 # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r
854 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13DataBusWidth|0x2|UINT8|0xA000029B\r
855 # Defines the usage of system slot13\r
856 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r
857 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13Usage|0x2|UINT8|0xA000029C\r
858 # Defines the length of system slot13\r
859 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r
860 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13Length|0x2|UINT8|0xA000029D\r
861 # Defines the ID of system slot13, a number of UINT16\r
862 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13Id|0x0|UINT16|0xA000029E\r
863 # Defines the characteristics of system slot13 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
864 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13Characteristics|0x0|UINT32|0xA000029F\r
865\r
866 # Defines the designation of system slot14\r
867 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14Designation|"None"|VOID*|0xA00002A0\r
868 # Defines the type of system slot14\r
869 # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r
870 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14Type|0x2|UINT8|0xA00002A1\r
871 # Defines the data bus width of system slot14\r
872 # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r
873 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14DataBusWidth|0x2|UINT8|0xA00002A2\r
874 # Defines the usage of system slot14\r
875 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r
876 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14Usage|0x2|UINT8|0xA00002A3\r
877 # Defines the length of system slot14\r
878 # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r
879 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14Length|0x2|UINT8|0xA00002A4\r
880 # Defines the ID of system slot14, a number of UINT16\r
881 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14Id|0x0|UINT16|0xA00002A5\r
882 # Defines the characteristics of system slot14 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r
883 gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14Characteristics|0x0|UINT32|0xA00002A6\r
884\r
885 gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|0xFFC00400|UINT32|0xA00002A7\r
886 gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize|0x000F0000|UINT32|0xA00002A8\r
887 gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|0xFFD00400|UINT32|0xA00002A9\r
888 gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize|0x000D0000|UINT32|0xA00002AA\r
889 gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|0xFFEC0400|UINT32|0xA00002AB\r
890 gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize|0x0003F000|UINT32|0xA00002AC\r
891\r
892[PcdsDynamic, PcdsDynamicEx]\r
893 ## Provides the ability to enable the Fast Boot feature of the BIOS. This\r
894 # enables the system to boot faster but may only enumerate the hardware\r
895 # that is required to boot the system.<BR>\r
896 #\r
897 # @Prompt Fast Boot Support\r
898 #\r
899 gQuarkPlatformTokenSpaceGuid.PcdEnableFastBoot|FALSE|BOOLEAN|0xB000004\r
900\r
901 ## Determines if the user is physically present. This information is collected and shared\r
902 # with all other modules using a dynamic PCD.<BR>\r
903 #\r
904 # @Prompt The User is Physically Present\r
905 #\r
906 gQuarkPlatformTokenSpaceGuid.PcdUserIsPhysicallyPresent|FALSE|BOOLEAN|0xB000006\r
907\r
908 ## The Quark SOC X1000 Based Platform Type.<BR>\r
909 # 0x0000 - Unknown<BR>\r
910 # 0x0001 - Quark Emulation<BR>\r
911 # 0x0002 - ClantonPeak SVP<BR>\r
912 # 0x0003 - KipsBay<BR>\r
913 # 0x0004 - CrossHill<BR>\r
914 # 0x0005 - ClantonHill<BR>\r
915 # 0x0006 - Galileo Gen 1<BR>\r
916 # 0x0007 - Reserved<BR>\r
917 # 0x0008 - Galileo Gen 2<BR>\r
918 #\r
919 # @Prompt The Quark SOC X1000 Based Platform Type\r
920 #\r
921 gQuarkPlatformTokenSpaceGuid.PcdPlatformType|0x0008|UINT16|0xB000007\r
922\r
923 ## The Quark SOC X1000 Based Platform Type Name.<BR>\r
924 #\r
925 # @Prompt The Quark SOC X1000 Based Platform Type Name\r
926 #\r
927 gQuarkPlatformTokenSpaceGuid.PcdPlatformTypeName|L"GalileoGen2"|VOID*|0xB000008\r
928\r
929 ## The size, in bytes, of the SPI FLASH part attached to Quark SOC X1000\r
930 #\r
931 # @Prompt The SPI FALSH Part Size\r
932 #\r
933 gQuarkPlatformTokenSpaceGuid.PcdSpiFlashDeviceSize|0|UINT32|0xB000009\r
EFI Development Kit II mirror for PVE