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184558d0 SV |
1 | /** @file\r |
2 | Entry point to the Standalone MM Foundation when initialized during the SEC\r | |
3 | phase on ARM platforms\r | |
4 | \r | |
5 | Copyright (c) 2017 - 2018, ARM Ltd. All rights reserved.<BR>\r | |
6 | This program and the accompanying materials\r | |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php.\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | \r | |
17 | #include <PiMm.h>\r | |
18 | \r | |
19 | #include <Library/AArch64/StandaloneMmCoreEntryPoint.h>\r | |
20 | \r | |
21 | #include <PiPei.h>\r | |
22 | #include <Guid/MmramMemoryReserve.h>\r | |
23 | #include <Guid/MpInformation.h>\r | |
24 | \r | |
25 | #include <Library/ArmMmuLib.h>\r | |
26 | #include <Library/ArmSvcLib.h>\r | |
27 | #include <Library/DebugLib.h>\r | |
28 | #include <Library/HobLib.h>\r | |
29 | #include <Library/BaseLib.h>\r | |
30 | #include <Library/BaseMemoryLib.h>\r | |
31 | #include <Library/SerialPortLib.h>\r | |
32 | \r | |
33 | #include <IndustryStandard/ArmStdSmc.h>\r | |
34 | #include <IndustryStandard/ArmMmSvc.h>\r | |
35 | \r | |
36 | #define SPM_MAJOR_VER_MASK 0xFFFF0000\r | |
37 | #define SPM_MINOR_VER_MASK 0x0000FFFF\r | |
38 | #define SPM_MAJOR_VER_SHIFT 16\r | |
39 | \r | |
40 | CONST UINT32 SPM_MAJOR_VER = 0;\r | |
41 | CONST UINT32 SPM_MINOR_VER = 1;\r | |
42 | \r | |
43 | CONST UINT8 BOOT_PAYLOAD_VERSION = 1;\r | |
44 | \r | |
45 | PI_MM_ARM_TF_CPU_DRIVER_ENTRYPOINT CpuDriverEntryPoint = NULL;\r | |
46 | \r | |
47 | /**\r | |
48 | Retrieve a pointer to and print the boot information passed by privileged\r | |
49 | secure firmware\r | |
50 | \r | |
51 | @param SharedBufAddress The pointer memory shared with privileged firmware\r | |
52 | \r | |
53 | **/\r | |
54 | EFI_SECURE_PARTITION_BOOT_INFO *\r | |
55 | GetAndPrintBootinformation (\r | |
56 | IN VOID *SharedBufAddress\r | |
57 | )\r | |
58 | {\r | |
59 | EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo;\r | |
60 | EFI_SECURE_PARTITION_CPU_INFO *PayloadCpuInfo;\r | |
61 | UINTN Index;\r | |
62 | \r | |
63 | PayloadBootInfo = (EFI_SECURE_PARTITION_BOOT_INFO *) SharedBufAddress;\r | |
64 | \r | |
65 | if (PayloadBootInfo == NULL) {\r | |
66 | DEBUG ((DEBUG_ERROR, "PayloadBootInfo NULL\n"));\r | |
67 | return NULL;\r | |
68 | }\r | |
69 | \r | |
70 | if (PayloadBootInfo->Header.Version != BOOT_PAYLOAD_VERSION) {\r | |
71 | DEBUG ((DEBUG_ERROR, "Boot Information Version Mismatch. Current=0x%x, Expected=0x%x.\n",\r | |
72 | PayloadBootInfo->Header.Version, BOOT_PAYLOAD_VERSION));\r | |
73 | return NULL;\r | |
74 | }\r | |
75 | \r | |
76 | DEBUG ((DEBUG_INFO, "NumSpMemRegions - 0x%x\n", PayloadBootInfo->NumSpMemRegions));\r | |
77 | DEBUG ((DEBUG_INFO, "SpMemBase - 0x%lx\n", PayloadBootInfo->SpMemBase));\r | |
78 | DEBUG ((DEBUG_INFO, "SpMemLimit - 0x%lx\n", PayloadBootInfo->SpMemLimit));\r | |
79 | DEBUG ((DEBUG_INFO, "SpImageBase - 0x%lx\n", PayloadBootInfo->SpImageBase));\r | |
80 | DEBUG ((DEBUG_INFO, "SpStackBase - 0x%lx\n", PayloadBootInfo->SpStackBase));\r | |
81 | DEBUG ((DEBUG_INFO, "SpHeapBase - 0x%lx\n", PayloadBootInfo->SpHeapBase));\r | |
82 | DEBUG ((DEBUG_INFO, "SpNsCommBufBase - 0x%lx\n", PayloadBootInfo->SpNsCommBufBase));\r | |
83 | DEBUG ((DEBUG_INFO, "SpSharedBufBase - 0x%lx\n", PayloadBootInfo->SpSharedBufBase));\r | |
84 | \r | |
85 | DEBUG ((DEBUG_INFO, "SpImageSize - 0x%x\n", PayloadBootInfo->SpImageSize));\r | |
86 | DEBUG ((DEBUG_INFO, "SpPcpuStackSize - 0x%x\n", PayloadBootInfo->SpPcpuStackSize));\r | |
87 | DEBUG ((DEBUG_INFO, "SpHeapSize - 0x%x\n", PayloadBootInfo->SpHeapSize));\r | |
88 | DEBUG ((DEBUG_INFO, "SpNsCommBufSize - 0x%x\n", PayloadBootInfo->SpNsCommBufSize));\r | |
89 | DEBUG ((DEBUG_INFO, "SpPcpuSharedBufSize - 0x%x\n", PayloadBootInfo->SpPcpuSharedBufSize));\r | |
90 | \r | |
91 | DEBUG ((DEBUG_INFO, "NumCpus - 0x%x\n", PayloadBootInfo->NumCpus));\r | |
92 | DEBUG ((DEBUG_INFO, "CpuInfo - 0x%p\n", PayloadBootInfo->CpuInfo));\r | |
93 | \r | |
94 | PayloadCpuInfo = (EFI_SECURE_PARTITION_CPU_INFO *) PayloadBootInfo->CpuInfo;\r | |
95 | \r | |
96 | if (PayloadCpuInfo == NULL) {\r | |
97 | DEBUG ((DEBUG_ERROR, "PayloadCpuInfo NULL\n"));\r | |
98 | return NULL;\r | |
99 | }\r | |
100 | \r | |
101 | for (Index = 0; Index < PayloadBootInfo->NumCpus; Index++) {\r | |
102 | DEBUG ((DEBUG_INFO, "Mpidr - 0x%lx\n", PayloadCpuInfo[Index].Mpidr));\r | |
103 | DEBUG ((DEBUG_INFO, "LinearId - 0x%x\n", PayloadCpuInfo[Index].LinearId));\r | |
104 | DEBUG ((DEBUG_INFO, "Flags - 0x%x\n", PayloadCpuInfo[Index].Flags));\r | |
105 | }\r | |
106 | \r | |
107 | return PayloadBootInfo;\r | |
108 | }\r | |
109 | \r | |
110 | VOID\r | |
111 | EFIAPI\r | |
112 | DelegatedEventLoop (\r | |
113 | IN ARM_SVC_ARGS *EventCompleteSvcArgs\r | |
114 | )\r | |
115 | {\r | |
116 | EFI_STATUS Status;\r | |
117 | UINTN SvcStatus;\r | |
118 | \r | |
119 | while (TRUE) {\r | |
120 | ArmCallSvc (EventCompleteSvcArgs);\r | |
121 | \r | |
122 | DEBUG ((DEBUG_INFO, "Received delegated event\n"));\r | |
123 | DEBUG ((DEBUG_INFO, "X0 : 0x%x\n", (UINT32) EventCompleteSvcArgs->Arg0));\r | |
124 | DEBUG ((DEBUG_INFO, "X1 : 0x%x\n", (UINT32) EventCompleteSvcArgs->Arg1));\r | |
125 | DEBUG ((DEBUG_INFO, "X2 : 0x%x\n", (UINT32) EventCompleteSvcArgs->Arg2));\r | |
126 | DEBUG ((DEBUG_INFO, "X3 : 0x%x\n", (UINT32) EventCompleteSvcArgs->Arg3));\r | |
127 | \r | |
128 | Status = CpuDriverEntryPoint (\r | |
129 | EventCompleteSvcArgs->Arg0,\r | |
130 | EventCompleteSvcArgs->Arg3,\r | |
131 | EventCompleteSvcArgs->Arg1\r | |
132 | );\r | |
133 | \r | |
134 | if (EFI_ERROR (Status)) {\r | |
135 | DEBUG ((DEBUG_ERROR, "Failed delegated event 0x%x, Status 0x%x\n",\r | |
136 | EventCompleteSvcArgs->Arg0, Status));\r | |
137 | }\r | |
138 | \r | |
139 | switch (Status) {\r | |
140 | case EFI_SUCCESS:\r | |
141 | SvcStatus = ARM_SVC_SPM_RET_SUCCESS;\r | |
142 | break;\r | |
143 | case EFI_INVALID_PARAMETER:\r | |
144 | SvcStatus = ARM_SVC_SPM_RET_INVALID_PARAMS;\r | |
145 | break;\r | |
146 | case EFI_ACCESS_DENIED:\r | |
147 | SvcStatus = ARM_SVC_SPM_RET_DENIED;\r | |
148 | break;\r | |
149 | case EFI_OUT_OF_RESOURCES:\r | |
150 | SvcStatus = ARM_SVC_SPM_RET_NO_MEMORY;\r | |
151 | break;\r | |
152 | case EFI_UNSUPPORTED:\r | |
153 | SvcStatus = ARM_SVC_SPM_RET_NOT_SUPPORTED;\r | |
154 | break;\r | |
155 | default:\r | |
156 | SvcStatus = ARM_SVC_SPM_RET_NOT_SUPPORTED;\r | |
157 | break;\r | |
158 | }\r | |
159 | \r | |
160 | EventCompleteSvcArgs->Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64;\r | |
161 | EventCompleteSvcArgs->Arg1 = SvcStatus;\r | |
162 | }\r | |
163 | }\r | |
164 | \r | |
165 | STATIC\r | |
166 | EFI_STATUS\r | |
167 | GetSpmVersion (VOID)\r | |
168 | {\r | |
169 | EFI_STATUS Status;\r | |
170 | UINT16 SpmMajorVersion;\r | |
171 | UINT16 SpmMinorVersion;\r | |
172 | UINT32 SpmVersion;\r | |
173 | ARM_SVC_ARGS SpmVersionArgs;\r | |
174 | \r | |
175 | SpmVersionArgs.Arg0 = ARM_SVC_ID_SPM_VERSION_AARCH32;\r | |
176 | \r | |
177 | ArmCallSvc (&SpmVersionArgs);\r | |
178 | \r | |
179 | SpmVersion = SpmVersionArgs.Arg0;\r | |
180 | \r | |
181 | SpmMajorVersion = ((SpmVersion & SPM_MAJOR_VER_MASK) >> SPM_MAJOR_VER_SHIFT);\r | |
182 | SpmMinorVersion = ((SpmVersion & SPM_MINOR_VER_MASK) >> 0);\r | |
183 | \r | |
184 | // Different major revision values indicate possibly incompatible functions.\r | |
185 | // For two revisions, A and B, for which the major revision values are\r | |
186 | // identical, if the minor revision value of revision B is greater than\r | |
187 | // the minor revision value of revision A, then every function in\r | |
188 | // revision A must work in a compatible way with revision B.\r | |
189 | // However, it is possible for revision B to have a higher\r | |
190 | // function count than revision A.\r | |
191 | if ((SpmMajorVersion == SPM_MAJOR_VER) &&\r | |
192 | (SpmMinorVersion >= SPM_MINOR_VER))\r | |
193 | {\r | |
194 | DEBUG ((DEBUG_INFO, "SPM Version: Major=0x%x, Minor=0x%x\n",\r | |
195 | SpmMajorVersion, SpmMinorVersion));\r | |
196 | Status = EFI_SUCCESS;\r | |
197 | }\r | |
198 | else\r | |
199 | {\r | |
200 | DEBUG ((DEBUG_INFO, "Incompatible SPM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",\r | |
201 | SpmMajorVersion, SpmMinorVersion, SPM_MAJOR_VER, SPM_MINOR_VER));\r | |
202 | Status = EFI_UNSUPPORTED;\r | |
203 | }\r | |
204 | \r | |
205 | return Status;\r | |
206 | }\r | |
207 | \r | |
208 | /**\r | |
209 | The entry point of Standalone MM Foundation.\r | |
210 | \r | |
211 | @param SharedBufAddress Pointer to the Buffer between SPM and SP.\r | |
212 | @param cookie1.\r | |
213 | @param cookie2.\r | |
214 | \r | |
215 | **/\r | |
216 | VOID\r | |
217 | EFIAPI\r | |
218 | _ModuleEntryPoint (\r | |
219 | IN VOID *SharedBufAddress,\r | |
220 | IN UINT64 SharedBufSize,\r | |
221 | IN UINT64 cookie1,\r | |
222 | IN UINT64 cookie2\r | |
223 | )\r | |
224 | {\r | |
225 | PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;\r | |
226 | EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo;\r | |
d4951425 | 227 | ARM_SVC_ARGS InitMmFoundationSvcArgs;\r |
184558d0 SV |
228 | EFI_STATUS Status;\r |
229 | UINT32 SectionHeaderOffset;\r | |
230 | UINT16 NumberOfSections;\r | |
231 | VOID *HobStart;\r | |
232 | VOID *TeData;\r | |
233 | UINTN TeDataSize;\r | |
234 | \r | |
184558d0 SV |
235 | // Get Secure Partition Manager Version Information\r |
236 | Status = GetSpmVersion ();\r | |
237 | if (EFI_ERROR (Status)) {\r | |
238 | goto finish;\r | |
239 | }\r | |
240 | \r | |
241 | PayloadBootInfo = GetAndPrintBootinformation (SharedBufAddress);\r | |
242 | if (PayloadBootInfo == NULL) {\r | |
243 | Status = EFI_UNSUPPORTED;\r | |
244 | goto finish;\r | |
245 | }\r | |
246 | \r | |
247 | // Locate PE/COFF File information for the Standalone MM core module\r | |
248 | Status = LocateStandaloneMmCorePeCoffData (\r | |
249 | (EFI_FIRMWARE_VOLUME_HEADER *) PayloadBootInfo->SpImageBase,\r | |
250 | &TeData,\r | |
251 | &TeDataSize\r | |
252 | );\r | |
253 | \r | |
254 | if (EFI_ERROR (Status)) {\r | |
255 | goto finish;\r | |
256 | }\r | |
257 | \r | |
258 | // Obtain the PE/COFF Section information for the Standalone MM core module\r | |
259 | Status = GetStandaloneMmCorePeCoffSections (\r | |
260 | TeData,\r | |
261 | &ImageContext,\r | |
262 | &SectionHeaderOffset,\r | |
263 | &NumberOfSections\r | |
264 | );\r | |
265 | \r | |
266 | if (EFI_ERROR (Status)) {\r | |
267 | goto finish;\r | |
268 | }\r | |
269 | \r | |
270 | // Update the memory access permissions of individual sections in the\r | |
271 | // Standalone MM core module\r | |
272 | Status = UpdateMmFoundationPeCoffPermissions (\r | |
273 | &ImageContext,\r | |
274 | SectionHeaderOffset,\r | |
275 | NumberOfSections,\r | |
276 | ArmSetMemoryRegionNoExec,\r | |
277 | ArmSetMemoryRegionReadOnly,\r | |
278 | ArmClearMemoryRegionReadOnly\r | |
279 | );\r | |
280 | \r | |
281 | if (EFI_ERROR (Status)) {\r | |
282 | goto finish;\r | |
283 | }\r | |
284 | \r | |
285 | //\r | |
286 | // Create Hoblist based upon boot information passed by privileged software\r | |
287 | //\r | |
288 | HobStart = CreateHobListFromBootInfo (&CpuDriverEntryPoint, PayloadBootInfo);\r | |
289 | \r | |
290 | //\r | |
291 | // Call the MM Core entry point\r | |
292 | //\r | |
293 | ProcessModuleEntryPointList (HobStart);\r | |
294 | \r | |
184558d0 SV |
295 | DEBUG ((DEBUG_INFO, "Shared Cpu Driver EP 0x%lx\n", (UINT64) CpuDriverEntryPoint));\r |
296 | \r | |
297 | finish:\r | |
d4951425 | 298 | ZeroMem (&InitMmFoundationSvcArgs, sizeof(InitMmFoundationSvcArgs));\r |
184558d0 SV |
299 | InitMmFoundationSvcArgs.Arg0 = ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64;\r |
300 | InitMmFoundationSvcArgs.Arg1 = Status;\r | |
301 | DelegatedEventLoop (&InitMmFoundationSvcArgs);\r | |
184558d0 | 302 | }\r |