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1 | /** @file\r |
2 | Machine dependent type definitions.\r | |
3 | \r | |
4 | Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r | |
5 | This program and the accompanying materials are licensed and made available\r | |
6 | under the terms and conditions of the BSD License that accompanies this\r | |
7 | distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php.\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | Copyright (c) 1990 The Regents of the University of California.\r | |
14 | All rights reserved.\r | |
15 | \r | |
16 | Redistribution and use in source and binary forms, with or without\r | |
17 | modification, are permitted provided that the following conditions\r | |
18 | are met:\r | |
19 | 1. Redistributions of source code must retain the above copyright\r | |
20 | notice, this list of conditions and the following disclaimer.\r | |
21 | 2. Redistributions in binary form must reproduce the above copyright\r | |
22 | notice, this list of conditions and the following disclaimer in the\r | |
23 | documentation and/or other materials provided with the distribution.\r | |
24 | 3. Neither the name of the University nor the names of its contributors\r | |
25 | may be used to endorse or promote products derived from this software\r | |
26 | without specific prior written permission.\r | |
27 | \r | |
28 | THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND\r | |
29 | ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r | |
30 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r | |
31 | ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE\r | |
32 | FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r | |
33 | DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r | |
34 | OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r | |
35 | HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r | |
36 | LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r | |
37 | OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r | |
38 | SUCH DAMAGE.\r | |
39 | \r | |
40 | types.h 7.5 (Berkeley) 3/9/91\r | |
41 | NetBSD: types.h,v 1.49 2006/09/03 13:51:23 bjh21 Exp\r | |
42 | **/\r | |
43 | #ifndef _MACHTYPES_H_\r | |
44 | #define _MACHTYPES_H_\r | |
45 | \r | |
46 | #include <sys/EfiCdefs.h>\r | |
47 | #include <sys/featuretest.h>\r | |
48 | #include <machine/int_types.h>\r | |
49 | \r | |
50 | /* Handle the long and unsigned long data types which EFI doesn't directly support. */\r | |
51 | //typedef INTN LONGN;\r | |
52 | //typedef UINTN ULONGN;\r | |
53 | \r | |
54 | typedef PHYSICAL_ADDRESS paddr_t;\r | |
55 | typedef UINT64 psize_t;\r | |
56 | typedef PHYSICAL_ADDRESS vaddr_t;\r | |
57 | typedef UINT64 vsize_t;\r | |
58 | \r | |
59 | typedef INT32 pmc_evid_t;\r | |
60 | typedef UINT64 pmc_ctr_t;\r | |
61 | typedef INT32 register_t;\r | |
62 | \r | |
63 | typedef volatile INT32 __cpu_simple_lock_t;\r | |
64 | \r | |
65 | #define __SIMPLELOCK_LOCKED 1\r | |
66 | #define __SIMPLELOCK_UNLOCKED 0\r | |
67 | \r | |
68 | /* The ARMv7 does not have strict alignment requirements. */\r | |
69 | #define __NO_STRICT_ALIGNMENT\r | |
70 | //TODO: Fixme for the ARM architecture that requires strict alignment\r | |
71 | \r | |
72 | #define __HAVE_DEVICE_REGISTER\r | |
73 | #define __HAVE_CPU_COUNTER\r | |
74 | #define __HAVE_SYSCALL_INTERN\r | |
75 | #define __HAVE_MINIMAL_EMUL\r | |
76 | #define __HAVE_OLD_DISKLABEL\r | |
77 | #define __HAVE_GENERIC_SOFT_INTERRUPTS\r | |
78 | #define __HAVE_CPU_MAXPROC\r | |
79 | #define __HAVE_TIMECOUNTER\r | |
80 | #define __HAVE_GENERIC_TODR\r | |
81 | \r | |
82 | #endif /* _MACHTYPES_H_ */\r |