UefiCpuPkg/CpuMpPei: Load microcode if found newer revision
[mirror_edk2.git] / UefiCpuPkg / CpuMpPei / Microcode.c
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1/** @file\r
2 Implementation of loading microcode on processors.\r
3\r
15dbb393 4 Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
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5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "CpuMpPei.h"\r
16\r
17/**\r
18 Get microcode update signature of currently loaded microcode update.\r
19\r
20 @return Microcode signature.\r
21\r
22**/\r
23UINT32\r
24GetCurrentMicrocodeSignature (\r
25 VOID\r
26 )\r
27{\r
28 UINT64 Signature;\r
29\r
30 AsmWriteMsr64 (EFI_MSR_IA32_BIOS_SIGN_ID, 0);\r
31 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);\r
32 Signature = AsmReadMsr64 (EFI_MSR_IA32_BIOS_SIGN_ID);\r
33 return (UINT32) RShiftU64 (Signature, 32);\r
34}\r
35\r
36/**\r
37 Detect whether specified processor can find matching microcode patch and load it.\r
38\r
39**/\r
40VOID\r
41MicrocodeDetect (\r
42 VOID\r
43 )\r
44{\r
45 UINT64 MicrocodePatchAddress;\r
46 UINT64 MicrocodePatchRegionSize;\r
47 UINT32 ExtendedTableLength;\r
48 UINT32 ExtendedTableCount;\r
49 EFI_CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;\r
50 EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;\r
51 EFI_CPU_MICROCODE_HEADER *MicrocodeEntryPoint;\r
52 UINTN MicrocodeEnd;\r
53 UINTN Index;\r
54 UINT8 PlatformId;\r
55 UINT32 RegEax;\r
56 UINT32 LatestRevision;\r
57 UINTN TotalSize;\r
58 UINT32 CheckSum32;\r
59 BOOLEAN CorrectMicrocode;\r
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60 MICROCODE_INFO MicrocodeInfo;\r
61\r
62 ZeroMem (&MicrocodeInfo, sizeof (MICROCODE_INFO));\r
63 MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);\r
64 MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);\r
65 if (MicrocodePatchRegionSize == 0) {\r
66 //\r
67 // There is no microcode patches\r
68 //\r
69 return;\r
70 }\r
71\r
72 ExtendedTableLength = 0;\r
73 //\r
74 // Here data of CPUID leafs have not been collected into context buffer, so\r
75 // GetProcessorCpuid() cannot be used here to retrieve CPUID data.\r
76 //\r
77 AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, NULL);\r
78\r
79 //\r
80 // The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID\r
81 //\r
82 PlatformId = (UINT8) AsmMsrBitFieldRead64 (EFI_MSR_IA32_PLATFORM_ID, 50, 52);\r
83\r
84 LatestRevision = 0;\r
85 MicrocodeEnd = (UINTN) (MicrocodePatchAddress + MicrocodePatchRegionSize);\r
86 MicrocodeEntryPoint = (EFI_CPU_MICROCODE_HEADER *) (UINTN) MicrocodePatchAddress;\r
87 do {\r
88 //\r
89 // Check if the microcode is for the Cpu and the version is newer\r
90 // and the update can be processed on the platform\r
91 //\r
92 CorrectMicrocode = FALSE;\r
93 if (MicrocodeEntryPoint->HeaderVersion == 0x1) {\r
94 //\r
95 // It is the microcode header. It is not the padding data between microcode patches\r
96 // becasue the padding data should not include 0x00000001 and it should be the repeated\r
97 // byte format (like 0xXYXYXYXY....).\r
98 //\r
99 if (MicrocodeEntryPoint->ProcessorId == RegEax &&\r
100 MicrocodeEntryPoint->UpdateRevision > LatestRevision &&\r
101 (MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))\r
102 ) {\r
103 if (MicrocodeEntryPoint->DataSize == 0) {\r
104 CheckSum32 = CalculateSum32 ((UINT32 *)MicrocodeEntryPoint, 2048);\r
105 } else {\r
106 CheckSum32 = CalculateSum32 ((UINT32 *)MicrocodeEntryPoint, MicrocodeEntryPoint->DataSize + sizeof(EFI_CPU_MICROCODE_HEADER));\r
107 }\r
108 if (CheckSum32 == 0) {\r
109 CorrectMicrocode = TRUE;\r
110 }\r
111 } else if ((MicrocodeEntryPoint->DataSize != 0) &&\r
112 (MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {\r
113 ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize + sizeof (EFI_CPU_MICROCODE_HEADER));\r
114 if (ExtendedTableLength != 0) {\r
115 //\r
116 // Extended Table exist, check if the CPU in support list\r
117 //\r
118 ExtendedTableHeader = (EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER *)((UINT8 *)(MicrocodeEntryPoint) + MicrocodeEntryPoint->DataSize + sizeof (EFI_CPU_MICROCODE_HEADER));\r
119 //\r
120 // Calculate Extended Checksum\r
121 //\r
122 if ((ExtendedTableLength % 4) == 0) {\r
123 CheckSum32 = CalculateSum32 ((UINT32 *)ExtendedTableHeader, ExtendedTableLength);\r
124 if (CheckSum32 == 0) {\r
125 //\r
126 // Checksum correct\r
127 //\r
128 ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;\r
129 ExtendedTable = (EFI_CPU_MICROCODE_EXTENDED_TABLE *)(ExtendedTableHeader + 1);\r
130 for (Index = 0; Index < ExtendedTableCount; Index ++) {\r
131 CheckSum32 = CalculateSum32 ((UINT32 *)ExtendedTable, sizeof(EFI_CPU_MICROCODE_EXTENDED_TABLE));\r
132 if (CheckSum32 == 0) {\r
133 //\r
134 // Verify Header\r
135 //\r
136 if ((ExtendedTable->ProcessorSignature == RegEax) &&\r
137 (ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {\r
138 //\r
139 // Find one\r
140 //\r
141 CorrectMicrocode = TRUE;\r
142 break;\r
143 }\r
144 }\r
145 ExtendedTable ++;\r
146 }\r
147 }\r
148 }\r
149 }\r
150 }\r
151 } else {\r
152 //\r
153 // It is the padding data between the microcode patches for microcode patches alignment.\r
154 // Because the microcode patch is the multiple of 1-KByte, the padding data should not\r
155 // exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode\r
156 // alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to\r
157 // find the next possible microcode patch header.\r
158 //\r
159 MicrocodeEntryPoint = (EFI_CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);\r
160 continue;\r
161 }\r
162 //\r
163 // Get the next patch.\r
164 //\r
165 if (MicrocodeEntryPoint->DataSize == 0) {\r
166 TotalSize = 2048;\r
167 } else {\r
168 TotalSize = MicrocodeEntryPoint->TotalSize;\r
169 }\r
170\r
171 if (CorrectMicrocode) {\r
172 LatestRevision = MicrocodeEntryPoint->UpdateRevision;\r
173 MicrocodeInfo.MicrocodeData = (VOID *)((UINTN)MicrocodeEntryPoint + sizeof (EFI_CPU_MICROCODE_HEADER));\r
174 MicrocodeInfo.MicrocodeSize = TotalSize;\r
175 MicrocodeInfo.ProcessorId = RegEax;\r
176 }\r
177\r
178 MicrocodeEntryPoint = (EFI_CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);\r
179 } while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));\r
180\r
181 if (LatestRevision > 0) {\r
182 //\r
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183 // BIOS only authenticate updates that contain a numerically larger revision\r
184 // than the currently loaded revision, where Current Signature < New Update\r
185 // Revision. A processor with no loaded update is considered to have a\r
186 // revision equal to zero.\r
ea0f431c 187 //\r
15dbb393 188 if (LatestRevision > GetCurrentMicrocodeSignature ()) {\r
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189 AsmWriteMsr64 (\r
190 EFI_MSR_IA32_BIOS_UPDT_TRIG,\r
191 (UINT64) (UINTN) MicrocodeInfo.MicrocodeData\r
192 );\r
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193 //\r
194 // Get and verify new microcode signature\r
195 //\r
196 ASSERT (LatestRevision == GetCurrentMicrocodeSignature ());\r
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197 MicrocodeInfo.Load = TRUE;\r
198 } else {\r
199 MicrocodeInfo.Load = FALSE;\r
200 }\r
201 }\r
202}\r