]> git.proxmox.com Git - mirror_edk2.git/blame - UefiCpuPkg/Include/Library/LocalApicLib.h
Improve Local APIC library class. Add new library APIs: GetApicVersion(), SendFixedIp...
[mirror_edk2.git] / UefiCpuPkg / Include / Library / LocalApicLib.h
CommitLineData
bf73cc4b 1/** @file\r
2 Public include file for Local APIC library.\r
3\r
4 Local APIC library assumes local APIC is enabled. It does not\r
5 handles cases where local APIC is disabled.\r
6\r
7 Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r
8 This program and the accompanying materials\r
9 are licensed and made available under the terms and conditions of the BSD License\r
10 which accompanies this distribution. The full text of the license may be found at\r
11 http://opensource.org/licenses/bsd-license.php\r
12\r
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
15\r
16**/\r
17\r
18#ifndef __LOCAL_APIC_LIB_H__\r
19#define __LOCAL_APIC_LIB_H__\r
20\r
21#define LOCAL_APIC_MODE_XAPIC 0x1 ///< xAPIC mode.\r
22#define LOCAL_APIC_MODE_X2APIC 0x2 ///< x2APIC mode.\r
23\r
24/**\r
25 Get the current local APIC mode.\r
26\r
27 If local APIC is disabled, then ASSERT.\r
28\r
29 @retval LOCAL_APIC_MODE_XAPIC current APIC mode is xAPIC.\r
30 @retval LOCAL_APIC_MODE_X2APIC current APIC mode is x2APIC.\r
31**/\r
32UINTN\r
33EFIAPI\r
34GetApicMode (\r
35 VOID\r
36 );\r
37\r
38/**\r
39 Set the current local APIC mode.\r
40\r
41 If the specified local APIC mode is not valid, then ASSERT.\r
42 If the specified local APIC mode can't be set as current, then ASSERT.\r
43\r
44 @param ApicMode APIC mode to be set.\r
45**/\r
46VOID\r
47EFIAPI\r
48SetApicMode (\r
49 IN UINTN ApicMode\r
50 );\r
51\r
52/**\r
53 Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.\r
54\r
55 In xAPIC mode, the initial local APIC ID is 8-bit, and may be different from current APIC ID.\r
56 In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case, \r
57 the 32-bit local APIC ID is returned as initial APIC ID.\r
58\r
59 @return 32-bit initial local APIC ID of the executing processor.\r
60**/\r
61UINT32\r
62EFIAPI\r
63GetInitialApicId (\r
64 VOID\r
65 );\r
66\r
67/**\r
68 Get the local APIC ID of the executing processor.\r
69\r
70 @return 32-bit local APIC ID of the executing processor.\r
71**/\r
72UINT32\r
73EFIAPI\r
74GetApicId (\r
75 VOID\r
76 );\r
77\r
ae40aef1 78/**\r
79 Get the value of the local APIC version register.\r
80\r
81 @return the value of the local APIC version register.\r
82**/\r
83UINT32\r
84EFIAPI\r
85GetApicVersion (\r
86 VOID\r
87 );\r
88\r
89/**\r
90 Send a Fixed IPI to a specified target processor.\r
91\r
92 This function returns after the IPI has been accepted by the target processor. \r
93\r
94 @param ApicId The local APIC ID of the target processor.\r
95 @param Vector The vector number of the interrupt being sent.\r
96**/\r
97VOID\r
98EFIAPI\r
99SendFixedIpi (\r
100 IN UINT32 ApicId,\r
101 IN UINT8 Vector\r
102 );\r
103\r
104/**\r
105 Send a Fixed IPI to all processors excluding self.\r
106\r
107 This function returns after the IPI has been accepted by the target processors. \r
108\r
109 @param Vector The vector number of the interrupt being sent.\r
110**/\r
111VOID\r
112EFIAPI\r
113SendFixedIpiAllExcludingSelf (\r
114 IN UINT8 Vector\r
115 );\r
116\r
bf73cc4b 117/**\r
118 Send a SMI IPI to a specified target processor.\r
119\r
120 This function returns after the IPI has been accepted by the target processor. \r
121\r
122 @param ApicId Specify the local APIC ID of the target processor.\r
123**/\r
124VOID\r
125EFIAPI\r
126SendSmiIpi (\r
127 IN UINT32 ApicId\r
128 );\r
129\r
130/**\r
131 Send a SMI IPI to all processors excluding self.\r
132\r
133 This function returns after the IPI has been accepted by the target processors. \r
134**/\r
135VOID\r
136EFIAPI\r
137SendSmiIpiAllExcludingSelf (\r
138 VOID\r
139 );\r
140\r
141/**\r
142 Send an INIT IPI to a specified target processor.\r
143\r
144 This function returns after the IPI has been accepted by the target processor. \r
145\r
146 @param ApicId Specify the local APIC ID of the target processor.\r
147**/\r
148VOID\r
149EFIAPI\r
150SendInitIpi (\r
151 IN UINT32 ApicId\r
152 );\r
153\r
154/**\r
155 Send an INIT IPI to all processors excluding self.\r
156\r
157 This function returns after the IPI has been accepted by the target processors. \r
158**/\r
159VOID\r
160EFIAPI\r
161SendInitIpiAllExcludingSelf (\r
162 VOID\r
163 );\r
164\r
165/**\r
166 Send an INIT-Start-up-Start-up IPI sequence to a specified target processor.\r
167\r
168 This function returns after the IPI has been accepted by the target processor. \r
169\r
170 if StartupRoutine >= 1M, then ASSERT.\r
171 if StartupRoutine is not multiple of 4K, then ASSERT.\r
172\r
173 @param ApicId Specify the local APIC ID of the target processor.\r
174 @param StartupRoutine Points to a start-up routine which is below 1M physical\r
175 address and 4K aligned.\r
176**/\r
177VOID\r
178EFIAPI\r
179SendInitSipiSipi (\r
180 IN UINT32 ApicId,\r
181 IN UINT32 StartupRoutine\r
182 );\r
183\r
184/**\r
185 Send an INIT-Start-up-Start-up IPI sequence to all processors excluding self.\r
186\r
187 This function returns after the IPI has been accepted by the target processors. \r
188\r
189 if StartupRoutine >= 1M, then ASSERT.\r
190 if StartupRoutine is not multiple of 4K, then ASSERT.\r
191\r
192 @param StartupRoutine Points to a start-up routine which is below 1M physical\r
193 address and 4K aligned.\r
194**/\r
195VOID\r
196EFIAPI\r
197SendInitSipiSipiAllExcludingSelf (\r
198 IN UINT32 StartupRoutine\r
199 );\r
200\r
201/**\r
202 Programming Virtual Wire Mode.\r
203\r
204 This function programs the local APIC for virtual wire mode following\r
205 the example described in chapter A.3 of the MP 1.4 spec.\r
206\r
207 IOxAPIC is not involved in this type of virtual wire mode.\r
208**/\r
209VOID\r
210EFIAPI\r
211ProgramVirtualWireMode (\r
212 VOID\r
213 );\r
214\r
bf73cc4b 215/**\r
216 Read the initial count value from the init-count register.\r
217\r
218 @return The initial count value read from the init-count register.\r
219**/\r
220UINT32\r
221EFIAPI\r
222GetApicTimerInitCount (\r
223 VOID\r
224 );\r
225\r
226/**\r
227 Read the current count value from the current-count register.\r
228\r
229 @return The current count value read from the current-count register.\r
230**/\r
231UINT32\r
232EFIAPI\r
233GetApicTimerCurrentCount (\r
234 VOID\r
235 );\r
236\r
237/**\r
238 Initialize the local APIC timer.\r
239\r
240 The local APIC timer is initialized and enabled.\r
241\r
242 @param DivideValue The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.\r
243 If it is 0, then use the current divide value in the DCR.\r
244 @param InitCount The initial count value.\r
245 @param PeriodicMode If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.\r
246 @param Vector The timer interrupt vector number.\r
247**/\r
248VOID\r
249EFIAPI\r
250InitializeApicTimer (\r
251 IN UINTN DivideValue,\r
252 IN UINT32 InitCount,\r
253 IN BOOLEAN PeriodicMode,\r
254 IN UINT8 Vector\r
255 );\r
256\r
ae40aef1 257/**\r
258 Get the state of the local APIC timer.\r
259\r
260 @param DivideValue Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.\r
261 @param PeriodicMode Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.\r
262 @param Vector Return the timer interrupt vector number.\r
263**/\r
264VOID\r
265EFIAPI\r
266GetApicTimerState (\r
267 OUT UINTN *DivideValue OPTIONAL,\r
268 OUT BOOLEAN *PeriodicMode OPTIONAL,\r
269 OUT UINT8 *Vector OPTIONAL\r
270 );\r
271\r
bf73cc4b 272/**\r
273 Enable the local APIC timer interrupt.\r
274**/\r
275VOID\r
276EFIAPI\r
277EnableApicTimerInterrupt (\r
278 VOID\r
279 );\r
280\r
281/**\r
282 Disable the local APIC timer interrupt.\r
283**/\r
284VOID\r
285EFIAPI\r
286DisableApicTimerInterrupt (\r
287 VOID\r
288 );\r
289\r
290/**\r
291 Get the local APIC timer interrupt state.\r
292\r
293 @retval TRUE The local APIC timer interrupt is enabled.\r
294 @retval FALSE The local APIC timer interrupt is disabled.\r
295**/\r
296BOOLEAN\r
297EFIAPI\r
298GetApicTimerInterruptState (\r
299 VOID\r
300 );\r
301\r
302/**\r
303 Send EOI to the local APIC.\r
304**/\r
305VOID\r
306EFIAPI\r
307SendApicEoi (\r
308 VOID\r
309 );\r
310\r
311#endif\r
312\r