UefiCpuPkg: Delete redundant PcdGetSize PcdCpuFeaturesSupport
[mirror_edk2.git] / UefiCpuPkg / Library / CpuCommonFeaturesLib / Aesni.c
CommitLineData
80c4b236
JF
1/** @file\r
2 AESNI feature.\r
3\r
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "CpuCommonFeatures.h"\r
16\r
17/**\r
18 Prepares for the data used by CPU feature detection and initialization.\r
19\r
20 @param[in] NumberOfProcessors The number of CPUs in the platform.\r
21\r
22 @return Pointer to a buffer of CPU related configuration data.\r
23\r
24 @note This service could be called by BSP only.\r
25**/\r
26VOID *\r
27EFIAPI\r
28AesniGetConfigData (\r
29 IN UINTN NumberOfProcessors\r
30 )\r
31{\r
32 UINT64 *ConfigData;\r
33\r
34 ConfigData = AllocateZeroPool (sizeof (UINT64) * NumberOfProcessors);\r
35 ASSERT (ConfigData != NULL);\r
36 return ConfigData;\r
37}\r
38\r
39/**\r
40 Detects if AESNI feature supported on current processor.\r
41\r
42 @param[in] ProcessorNumber The index of the CPU executing this function.\r
43 @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r
44 structure for the CPU executing this function.\r
45 @param[in] ConfigData A pointer to the configuration buffer returned\r
46 by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r
47 CPU_FEATURE_GET_CONFIG_DATA was not provided in\r
48 RegisterCpuFeature().\r
49\r
50 @retval TRUE AESNI feature is supported.\r
51 @retval FALSE AESNI feature is not supported.\r
52\r
53 @note This service could be called by BSP/APs.\r
54**/\r
55BOOLEAN\r
56EFIAPI\r
57AesniSupport (\r
58 IN UINTN ProcessorNumber,\r
59 IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r
60 IN VOID *ConfigData OPTIONAL\r
61 )\r
62{\r
63 MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *MsrFeatureConfig;\r
64\r
65 if (IS_SANDY_BRIDGE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
66 IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
67 IS_XEON_5600_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
68 IS_XEON_E7_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
69 IS_XEON_PHI_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r
70 MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;\r
3dcb5325 71 ASSERT (MsrFeatureConfig != NULL);\r
80c4b236
JF
72 MsrFeatureConfig[ProcessorNumber].Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_FEATURE_CONFIG);\r
73 return (CpuInfo->CpuIdVersionInfoEcx.Bits.AESNI == 1);\r
74 }\r
75 return FALSE;\r
76}\r
77\r
78/**\r
79 Initializes AESNI feature to specific state.\r
80\r
81 @param[in] ProcessorNumber The index of the CPU executing this function.\r
82 @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r
83 structure for the CPU executing this function.\r
84 @param[in] ConfigData A pointer to the configuration buffer returned\r
85 by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r
86 CPU_FEATURE_GET_CONFIG_DATA was not provided in\r
87 RegisterCpuFeature().\r
88 @param[in] State If TRUE, then the AESNI feature must be enabled.\r
89 If FALSE, then the AESNI feature must be disabled.\r
90\r
91 @retval RETURN_SUCCESS AESNI feature is initialized.\r
92\r
93 @note This service could be called by BSP only.\r
94**/\r
95RETURN_STATUS\r
96EFIAPI\r
97AesniInitialize (\r
98 IN UINTN ProcessorNumber,\r
99 IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r
100 IN VOID *ConfigData, OPTIONAL\r
101 IN BOOLEAN State\r
102 )\r
103{\r
104 MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *MsrFeatureConfig;\r
105\r
106 //\r
107 // SANDY_BRIDGE, SILVERMONT, XEON_5600, XEON_7, and XEON_PHI have the same MSR index,\r
108 // Simply use MSR_SANDY_BRIDGE_FEATURE_CONFIG here\r
109 //\r
110 // The scope of the MSR_SANDY_BRIDGE_FEATURE_CONFIG is Core, only program MSR_FEATURE_CONFIG for thread 0\r
111 // of each core. Otherwise, once a thread in the core disabled AES, the other thread will cause GP when\r
112 // programming it.\r
113 //\r
114 if (CpuInfo->ProcessorInfo.Location.Thread == 0) {\r
115 MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;\r
3dcb5325 116 ASSERT (MsrFeatureConfig != NULL);\r
80c4b236
JF
117 if ((MsrFeatureConfig[ProcessorNumber].Bits.AESConfiguration & BIT0) == 0) {\r
118 CPU_REGISTER_TABLE_WRITE_FIELD (\r
119 ProcessorNumber,\r
120 Msr,\r
121 MSR_SANDY_BRIDGE_FEATURE_CONFIG,\r
122 MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER,\r
123 Bits.AESConfiguration,\r
124 BIT1 | ((State) ? 0 : BIT0)\r
125 );\r
126 }\r
127 }\r
128 return RETURN_SUCCESS;\r
129}\r