UefiCpuPkg/CpuCommonFeaturesLib: Register MSR base on scope Info.

[mirror_edk2.git] / UefiCpuPkg / Library / CpuCommonFeaturesLib / Eist.c

/** @file\r
  Enhanced Intel SpeedStep feature.\r
\r
  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "CpuCommonFeatures.h"\r
\r
/**\r
  Detects if Enhanced Intel SpeedStep feature supported on current processor.\r
\r
  @param[in]  ProcessorNumber  The index of the CPU executing this function.\r
  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r
                               structure for the CPU executing this function.\r
  @param[in]  ConfigData       A pointer to the configuration buffer returned\r
                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if\r
                               CPU_FEATURE_GET_CONFIG_DATA was not provided in\r
                               RegisterCpuFeature().\r
\r
  @retval TRUE     Enhanced Intel SpeedStep feature is supported.\r
  @retval FALSE    Enhanced Intel SpeedStep feature is not supported.\r
\r
  @note This service could be called by BSP/APs.\r
**/\r
BOOLEAN\r
EFIAPI\r
EistSupport (\r
  IN UINTN                             ProcessorNumber,\r
  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,\r
  IN VOID                              *ConfigData  OPTIONAL\r
  )\r
{\r
  return (CpuInfo->CpuIdVersionInfoEcx.Bits.EIST == 1);\r
}\r
\r
/**\r
  Initializes Enhanced Intel SpeedStep feature to specific state.\r
\r
  @param[in]  ProcessorNumber  The index of the CPU executing this function.\r
  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r
                               structure for the CPU executing this function.\r
  @param[in]  ConfigData       A pointer to the configuration buffer returned\r
                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if\r
                               CPU_FEATURE_GET_CONFIG_DATA was not provided in\r
                               RegisterCpuFeature().\r
  @param[in]  State            If TRUE, then the Enhanced Intel SpeedStep feature\r
                               must be enabled.\r
                               If FALSE, then the Enhanced Intel SpeedStep feature\r
                               must be disabled.\r
\r
  @retval RETURN_SUCCESS       Enhanced Intel SpeedStep feature is initialized.\r
\r
  @note This service could be called by BSP only.\r
**/\r
RETURN_STATUS\r
EFIAPI\r
EistInitialize (\r
  IN UINTN                             ProcessorNumber,\r
  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,\r
  IN VOID                              *ConfigData,  OPTIONAL\r
  IN BOOLEAN                           State\r
  )\r
{\r
  //\r
  // The scope of the MSR_IA32_MISC_ENABLE is core for below processor type, only program\r
  // MSR_IA32_MISC_ENABLE for thread 0 in each core.\r
  //\r
  if (IS_ATOM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
      IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
      IS_CORE2_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r
    if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r
      return RETURN_SUCCESS;\r
    }\r
  }\r
\r
  CPU_REGISTER_TABLE_WRITE_FIELD (\r
    ProcessorNumber,\r
    Msr,\r
    MSR_IA32_MISC_ENABLE,\r
    MSR_IA32_MISC_ENABLE_REGISTER,\r
    Bits.EIST,\r
    (State) ? 1 : 0\r
    );\r
  return RETURN_SUCCESS;\r
}\r