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UefiCpuPkg/CpuCommonFeaturesLib: Register MSR base on scope Info.
[mirror_edk2.git] / UefiCpuPkg / Library / CpuCommonFeaturesLib / ExecuteDisable.c
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1/** @file\r
2 Execute Disable feature.\r
3\r
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "CpuCommonFeatures.h"\r
16\r
17/**\r
18 Detects if Execute Disable feature supported on current processor.\r
19\r
20 @param[in] ProcessorNumber The index of the CPU executing this function.\r
21 @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r
22 structure for the CPU executing this function.\r
23 @param[in] ConfigData A pointer to the configuration buffer returned\r
24 by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r
25 CPU_FEATURE_GET_CONFIG_DATA was not provided in\r
26 RegisterCpuFeature().\r
27\r
28 @retval TRUE Execute Disable feature is supported.\r
29 @retval FALSE Execute Disable feature is not supported.\r
30\r
31 @note This service could be called by BSP/APs.\r
32**/\r
33BOOLEAN\r
34EFIAPI\r
35ExecuteDisableSupport (\r
36 IN UINTN ProcessorNumber,\r
37 IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r
38 IN VOID *ConfigData OPTIONAL\r
39 )\r
40{\r
41 UINT32 Eax;\r
42 CPUID_EXTENDED_CPU_SIG_EDX Edx;\r
43\r
44 AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);\r
45 if (Eax <= CPUID_EXTENDED_FUNCTION) {\r
46 //\r
47 // Extended CPUID functions are not supported on this processor.\r
48 //\r
49 return FALSE;\r
50 }\r
51\r
52 AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32);\r
53 return (Edx.Bits.NX != 0);\r
54}\r
55\r
56/**\r
57 Initializes Execute Disable feature to specific state.\r
58\r
59 @param[in] ProcessorNumber The index of the CPU executing this function.\r
60 @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r
61 structure for the CPU executing this function.\r
62 @param[in] ConfigData A pointer to the configuration buffer returned\r
63 by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r
64 CPU_FEATURE_GET_CONFIG_DATA was not provided in\r
65 RegisterCpuFeature().\r
66 @param[in] State If TRUE, then the Execute Disable feature must be enabled.\r
67 If FALSE, then the Execute Disable feature must be disabled.\r
68\r
69 @retval RETURN_SUCCESS Execute Disable feature is initialized.\r
70\r
71 @note This service could be called by BSP only.\r
72**/\r
73RETURN_STATUS\r
74EFIAPI\r
75ExecuteDisableInitialize (\r
76 IN UINTN ProcessorNumber,\r
77 IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r
78 IN VOID *ConfigData, OPTIONAL\r
79 IN BOOLEAN State\r
80 )\r
81{\r
d28daadd
ED
82 //\r
83 // The scope of the MSR_IA32_EFER is core for below processor type, only program\r
84 // MSR_IA32_EFER for thread 0 in each core.\r
85 //\r
86 if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r
87 if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r
88 return RETURN_SUCCESS;\r
89 }\r
90 }\r
91\r
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92 CPU_REGISTER_TABLE_WRITE_FIELD (\r
93 ProcessorNumber,\r
94 Msr,\r
95 MSR_IA32_EFER,\r
96 MSR_IA32_EFER_REGISTER,\r
97 Bits.NXE,\r
98 (State) ? 1 : 0\r
99 );\r
100 return RETURN_SUCCESS;\r
101}\r