]> git.proxmox.com Git - mirror_edk2.git/blame - UefiCpuPkg/Library/CpuCommonFeaturesLib/PendingBreak.c
UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm
[mirror_edk2.git] / UefiCpuPkg / Library / CpuCommonFeaturesLib / PendingBreak.c
CommitLineData
80c4b236
JF
1/** @file\r
2 Pending Break feature.\r
3\r
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
0acd8697 5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
80c4b236
JF
6\r
7**/\r
8\r
9#include "CpuCommonFeatures.h"\r
10\r
11/**\r
12 Detects if Pending Break feature supported on current processor.\r
13\r
14 @param[in] ProcessorNumber The index of the CPU executing this function.\r
15 @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r
16 structure for the CPU executing this function.\r
17 @param[in] ConfigData A pointer to the configuration buffer returned\r
18 by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r
19 CPU_FEATURE_GET_CONFIG_DATA was not provided in\r
20 RegisterCpuFeature().\r
21\r
22 @retval TRUE Pending Break feature is supported.\r
23 @retval FALSE Pending Break feature is not supported.\r
24\r
25 @note This service could be called by BSP/APs.\r
26**/\r
27BOOLEAN\r
28EFIAPI\r
29PendingBreakSupport (\r
30 IN UINTN ProcessorNumber,\r
31 IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r
32 IN VOID *ConfigData OPTIONAL\r
33 )\r
34{\r
35 if (IS_ATOM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
36 IS_CORE2_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
37 IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
38 IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
053e878b
MK
39 IS_PENTIUM_M_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel))\r
40 {\r
80c4b236
JF
41 return (CpuInfo->CpuIdVersionInfoEdx.Bits.PBE == 1);\r
42 }\r
053e878b 43\r
80c4b236
JF
44 return FALSE;\r
45}\r
46\r
47/**\r
48 Initializes Pending Break feature to specific state.\r
49\r
50 @param[in] ProcessorNumber The index of the CPU executing this function.\r
51 @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r
52 structure for the CPU executing this function.\r
53 @param[in] ConfigData A pointer to the configuration buffer returned\r
54 by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r
55 CPU_FEATURE_GET_CONFIG_DATA was not provided in\r
56 RegisterCpuFeature().\r
57 @param[in] State If TRUE, then the Pending Break feature must be enabled.\r
58 If FALSE, then the Pending Break feature must be disabled.\r
59\r
60 @retval RETURN_SUCCESS Pending Break feature is initialized.\r
61\r
62 @note This service could be called by BSP only.\r
63**/\r
64RETURN_STATUS\r
65EFIAPI\r
66PendingBreakInitialize (\r
67 IN UINTN ProcessorNumber,\r
68 IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r
4ec586b9 69 IN VOID *ConfigData OPTIONAL,\r
80c4b236
JF
70 IN BOOLEAN State\r
71 )\r
72{\r
d28daadd
ED
73 //\r
74 // The scope of the MSR_ATOM_IA32_MISC_ENABLE is core for below processor type, only program\r
75 // MSR_ATOM_IA32_MISC_ENABLE for thread 0 in each core.\r
76 //\r
77 // Support function has check the processer type for this feature, no need to check again\r
78 // here.\r
79 //\r
80 if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r
81 return RETURN_SUCCESS;\r
82 }\r
83\r
80c4b236
JF
84 //\r
85 // ATOM, CORE2, CORE, PENTIUM_4 and IS_PENTIUM_M_PROCESSOR have the same MSR index,\r
86 // Simply use MSR_ATOM_IA32_MISC_ENABLE here\r
87 //\r
88 CPU_REGISTER_TABLE_WRITE_FIELD (\r
89 ProcessorNumber,\r
90 Msr,\r
91 MSR_ATOM_IA32_MISC_ENABLE,\r
92 MSR_ATOM_IA32_MISC_ENABLE_REGISTER,\r
93 Bits.FERR,\r
94 (State) ? 1 : 0\r
95 );\r
96 return RETURN_SUCCESS;\r
97}\r