[mirror_edk2.git] / UefiCpuPkg / Library / CpuExceptionHandlerLib / Ia32 / ExceptionHandlerAsm.S

#------------------------------------------------------------------------------\r
#*\r
#*   Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>\r
#*   This program and the accompanying materials\r
#*   are licensed and made available under the terms and conditions of the BSD License\r
#*   which accompanies this distribution.  The full text of the license may be found at\r
#*   http://opensource.org/licenses/bsd-license.php\r
#*\r
#*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
#*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#*\r
#*    ExceptionHandlerAsm.S\r
#*\r
#*   Abstract:\r
#*\r
#*     IA32 CPU Exception Handler\r
#\r
#------------------------------------------------------------------------------\r
\r
\r
#.MMX\r
#.XMM\r
\r
ASM_GLOBAL ASM_PFX(CommonExceptionHandler)\r
ASM_GLOBAL ASM_PFX(CommonInterruptEntry)\r
ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)\r
\r
#EXTRN ASM_PFX(mErrorCodeFlag):DWORD           # Error code flags for exceptions\r
#EXTRN ASM_PFX(mDoFarReturnFlag):DWORD         # Do far return flag\r
\r
.text\r
\r
#\r
# exception handler stub table\r
#\r
Exception0Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   0\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception1Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   1\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception2Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   2\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception3Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   3\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception4Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   4\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception5Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   5\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception6Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   6\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception7Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   7\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception8Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   8\r
    pushl   %eax\r
     .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception9Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   9\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception10Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   10\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception11Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   11\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception12Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   12\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception13Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   13\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception14Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   14\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception15Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   15\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception16Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   16\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception17Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   17\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception18Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   18\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception19Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   19\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception20Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   20\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception21Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   21\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception22Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   22\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception23Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   23\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception24Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   24\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception25Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   25\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception26Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   26\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception27Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   27\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception28Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   28\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception29Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   29\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception30Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   30\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
Exception31Handle:\r
    .byte   0x6a    #  push #VectorNum\r
    .byte   31\r
    pushl   %eax\r
    .byte   0xB8\r
    .long   ASM_PFX(CommonInterruptEntry)\r
    jmp     *%eax\r
\r
HookAfterStubBegin:\r
    .byte   0x6a       # push\r
VectorNum:\r
    .byte   0          # 0 will be fixed\r
    pushl   %eax\r
    .byte   0xB8       # movl    ASM_PFX(HookAfterStubHeaderEnd), %eax\r
    .long   ASM_PFX(HookAfterStubHeaderEnd)\r
    jmp     *%eax\r
ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)\r
ASM_PFX(HookAfterStubHeaderEnd):\r
    popl    %eax\r
    subl    $8, %esp        # reserve room for filling exception data later\r
    pushl   8(%esp)\r
    xchgl   (%esp), %ecx    # get vector number\r
    bt      %ecx, ASM_PFX(mErrorCodeFlag)\r
    jnc     NoErrorData\r
    pushl    (%esp)         # addition push if exception data needed\r
NoErrorData:\r
    xchg    (%esp), %ecx    # restore ecx\r
    pushl   %eax\r
\r
#---------------------------------------;\r
# CommonInterruptEntry                  ;\r
#---------------------------------------;\r
# The follow algorithm is used for the common interrupt routine.\r
\r
ASM_GLOBAL ASM_PFX(CommonInterruptEntry)\r
ASM_PFX(CommonInterruptEntry):\r
    cli\r
    popl    %eax\r
    #\r
    # All interrupt handlers are invoked through interrupt gates, so\r
    # IF flag automatically cleared at the entry point\r
    #\r
\r
    #\r
    # Get vector number from top of stack\r
    #\r
    xchgl   (%esp), %ecx\r
    andl    $0x0FF, %ecx      # Vector number should be less than 256\r
    cmpl    $32, %ecx         # Intel reserved vector for exceptions?\r
    jae     NoErrorCode\r
    bt      %ecx, ASM_PFX(mErrorCodeFlag)\r
    jc      HasErrorCode\r
\r
NoErrorCode:\r
\r
    #\r
    # Stack:\r
    # +---------------------+\r
    # +    EFlags           +\r
    # +---------------------+\r
    # +    CS               +\r
    # +---------------------+\r
    # +    EIP              +\r
    # +---------------------+\r
    # +    ECX              +\r
    # +---------------------+ <-- ESP\r
    #\r
    # Registers:\r
    #   ECX - Vector Number\r
    #\r
\r
    #\r
    # Put Vector Number on stack\r
    #\r
    pushl   %ecx\r
\r
    #\r
    # Put 0 (dummy) error code on stack, and restore ECX\r
    #\r
    xorl    %ecx, %ecx  # ECX = 0\r
    xchgl   4(%esp), %ecx\r
\r
    jmp     ErrorCodeAndVectorOnStack\r
\r
HasErrorCode:\r
\r
    #\r
    # Stack:\r
    # +---------------------+\r
    # +    EFlags           +\r
    # +---------------------+\r
    # +    CS               +\r
    # +---------------------+\r
    # +    EIP              +\r
    # +---------------------+\r
    # +    Error Code       +\r
    # +---------------------+\r
    # +    ECX              +\r
    # +---------------------+ <-- ESP\r
    #\r
    # Registers:\r
    #   ECX - Vector Number\r
    #\r
\r
    #\r
    # Put Vector Number on stack and restore ECX\r
    #\r
    xchgl   (%esp), %ecx \r
\r
ErrorCodeAndVectorOnStack:\r
    pushl   %ebp\r
    movl    %esp, %ebp\r
\r
    #\r
    # Stack:\r
    # +---------------------+\r
    # +    EFlags           +\r
    # +---------------------+\r
    # +    CS               +\r
    # +---------------------+\r
    # +    EIP              +\r
    # +---------------------+\r
    # +    Error Code       +\r
    # +---------------------+\r
    # +    Vector Number    +\r
    # +---------------------+\r
    # +    EBP              +\r
    # +---------------------+ <-- EBP\r
    #\r
\r
    #\r
    # Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32\r
    # is 16-byte aligned\r
    #\r
    andl    $0x0fffffff0, %esp \r
    subl    $12, %esp\r
\r
    subl    $8, %esp\r
    pushl   $0         # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler\r
    pushl   $0         # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag\r
       \r
#; UINT32  Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
    pushl   %eax\r
    pushl   %ecx\r
    pushl   %edx\r
    pushl   %ebx\r
    leal    24(%ebp), %ecx\r
    pushl   %ecx                          # ESP\r
    pushl   (%ebp)              # EBP\r
    pushl   %esi\r
    pushl   %edi\r
\r
#; UINT32  Gs, Fs, Es, Ds, Cs, Ss;\r
    movl    %ss, %eax\r
    pushl   %eax\r
    movzwl  16(%ebp), %eax \r
    pushl   %eax\r
    movl    %ds, %eax\r
    pushl   %eax\r
    movl    %es, %eax\r
    pushl   %eax\r
    movl    %fs, %eax\r
    pushl   %eax\r
    movl    %gs, %eax\r
    pushl   %eax\r
\r
#; UINT32  Eip;\r
    movl    12(%ebp), %eax\r
    pushl   %eax\r
\r
#; UINT32  Gdtr[2], Idtr[2];\r
    subl    $8, %esp\r
    sidt    (%esp)\r
    movl    2(%esp), %eax\r
    xchgl   (%esp), %eax\r
    andl    $0x0FFFF, %eax \r
    movl    %eax, 4(%esp)\r
\r
    subl    $8, %esp\r
    sgdt    (%esp)\r
    movl    2(%esp), %eax\r
    xchgl   (%esp), %eax\r
    andl    $0x0FFFF, %eax \r
    movl    %eax, 4(%esp)\r
\r
#; UINT32  Ldtr, Tr;\r
    xorl    %eax, %eax\r
    str     %ax\r
    pushl   %eax\r
    sldt    %ax\r
    pushl   %eax\r
\r
#; UINT32  EFlags;\r
    movl    20(%ebp), %eax\r
    pushl   %eax\r
\r
#; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;\r
## insure FXSAVE/FXRSTOR is enabled in CR4...\r
## ... while we're at it, make sure DE is also enabled...\r
    mov     $1, %eax\r
    pushl   %ebx                         # temporarily save value of ebx on stack \r
    cpuid                                # use CPUID to determine if FXSAVE/FXRESTOR\r
                                         # and DE are supported\r
    popl    %ebx                         # retore value of ebx that was overwritten\r
                                         # by CPUID \r
    movl    %cr4, %eax\r
    pushl   %eax                         # push cr4 firstly\r
    testl   $BIT24, %edx                 # Test for FXSAVE/FXRESTOR support\r
    jz      L1\r
    orl     $BIT9, %eax                  # Set CR4.OSFXSR\r
L1:    \r
    testl   $BIT2, %edx                  # Test for Debugging Extensions support\r
    jz      L2\r
    orl     $BIT3, %eax                  # Set CR4.DE\r
L2:    \r
    movl    %eax, %cr4\r
    movl    %cr3, %eax\r
    pushl   %eax\r
    movl    %cr2, %eax\r
    pushl   %eax\r
    xorl    %eax, %eax\r
    pushl   %eax\r
    movl    %cr0, %eax\r
    pushl   %eax\r
\r
#; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
    movl    %dr7, %eax\r
    pushl   %eax\r
    movl    %dr6, %eax\r
    pushl   %eax\r
    movl    %dr3, %eax\r
    pushl   %eax\r
    movl    %dr2, %eax\r
    pushl   %eax\r
    movl    %dr1, %eax\r
    pushl   %eax\r
    movl    %dr0, %eax\r
    pushl   %eax\r
\r
#; FX_SAVE_STATE_IA32 FxSaveState;\r
    subl    $512, %esp\r
    movl    %esp, %edi\r
    testl   $BIT24, %edx     # Test for FXSAVE/FXRESTOR support.  \r
                             # edx still contains result from CPUID above\r
    jz      L3\r
    .byte      0x0f, 0x0ae, 0x07 #fxsave [edi]\r
L3:  \r
\r
#; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear\r
    cld\r
\r
#; UINT32  ExceptionData;\r
    pushl   8(%ebp)\r
\r
#; Prepare parameter and call\r
    movl    %esp, %edx\r
    pushl   %edx\r
    movl    4(%ebp), %edx\r
    pushl   %edx\r
\r
    #\r
    # Call External Exception Handler\r
    #\r
    call    ASM_PFX(CommonExceptionHandler)\r
    addl    $8, %esp\r
\r
    cli\r
#; UINT32  ExceptionData;\r
    addl    $4, %esp\r
\r
#; FX_SAVE_STATE_IA32 FxSaveState;\r
    movl    %esp, %esi\r
    movl    $1, %eax\r
    cpuid                    # use CPUID to determine if FXSAVE/FXRESTOR \r
                             # are supported\r
    testl   $BIT24, %edx     # Test for FXSAVE/FXRESTOR support\r
    jz      L4\r
    .byte      0x0f, 0x0ae, 0x0e # fxrstor [esi]\r
L4:  \r
    addl    $512, %esp\r
\r
#; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
#; Skip restoration of DRx registers to support in-circuit emualators\r
#; or debuggers set breakpoint in interrupt/exception context\r
    addl    $24, %esp\r
\r
#; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;\r
    popl    %eax\r
    movl    %eax, %cr0\r
    addl    $4, %esp    # not for Cr1\r
    popl    %eax\r
    movl    %eax, %cr2\r
    popl    %eax\r
    movl    %eax, %cr3\r
    popl    %eax\r
    movl    %eax, %cr4\r
\r
#; UINT32  EFlags;\r
    popl    20(%ebp)\r
\r
#; UINT32  Ldtr, Tr;\r
#; UINT32  Gdtr[2], Idtr[2];\r
#; Best not let anyone mess with these particular registers...\r
    addl    $24, %esp\r
\r
#; UINT32  Eip;\r
    popl    12(%ebp)\r
\r
#; UINT32  Gs, Fs, Es, Ds, Cs, Ss;\r
#; NOTE - modified segment registers could hang the debugger...  We\r
#;        could attempt to insulate ourselves against this possibility,\r
#;        but that poses risks as well.\r
#;\r
    popl    %gs\r
    popl    %fs\r
    popl    %es\r
    popl    %ds\r
    popl    16(%ebp)\r
    popl    %ss\r
\r
#; UINT32  Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
    popl    %edi\r
    popl    %esi\r
    addl    $4, %esp   # not for ebp\r
    addl    $4, %esp   # not for esp\r
    popl    %ebx\r
    popl    %edx\r
    popl    %ecx\r
    popl    %eax\r
\r
    popl    -8(%ebp)\r
    popl    -4(%ebp)\r
    movl    %ebp, %esp\r
    popl    %ebp\r
    addl    $8, %esp\r
    cmpl    $0, -16(%esp)  # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler\r
    jz      DoReturn\r
    cmpl    $1, -20(%esp)  # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag\r
    jz      ErrorCode\r
    jmp     *-16(%esp)\r
ErrorCode:\r
    subl    $4, %esp\r
    jmp     *-12(%esp)\r
\r
DoReturn:\r
    cmpl    $0, ASM_PFX(mDoFarReturnFlag)\r
    jz      DoIret\r
    pushl   8(%esp)       # save EFLAGS\r
    addl    $16, %esp\r
    pushl   -8(%esp)      # save CS in new location\r
    pushl   -8(%esp)      # save EIP in new location\r
    pushl   -8(%esp)      # save EFLAGS in new location\r
    popfl                 # restore EFLAGS\r
    lret                  # far return\r
\r
DoIret:\r
    iretl\r
\r
\r
#---------------------------------------;\r
# _AsmGetTemplateAddressMap             ;\r
#---------------------------------------;\r
# \r
# Protocol prototype\r
#   AsmGetTemplateAddressMap (\r
#     EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap\r
#   );\r
#           \r
# Routine Description:\r
# \r
#  Return address map of interrupt handler template so that C code can generate\r
#  interrupt table.\r
# \r
# Arguments:\r
# \r
# \r
# Returns: \r
# \r
#   Nothing\r
#\r
# \r
# Input:  [ebp][0]  = Original ebp\r
#         [ebp][4]  = Return address\r
#          \r
# Output: Nothing\r
#          \r
# Destroys: Nothing\r
#-----------------------------------------------------------------------------;\r
#-------------------------------------------------------------------------------------\r
#  AsmGetAddressMap (&AddressMap);\r
#-------------------------------------------------------------------------------------\r
ASM_GLOBAL ASM_PFX(AsmGetTemplateAddressMap)\r
ASM_PFX(AsmGetTemplateAddressMap):\r
\r
        pushl       %ebp\r
        movl        %esp,%ebp\r
        pushal\r
\r
        movl        0x8(%ebp), %ebx\r
        movl        $Exception0Handle, (%ebx)\r
        movl        $(Exception1Handle - Exception0Handle), 0x4(%ebx)\r
        movl        $(HookAfterStubBegin), 0x8(%ebx)\r
\r
        popal\r
        popl        %ebp\r
        ret\r
#-------------------------------------------------------------------------------------\r
#  AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr);\r
#-------------------------------------------------------------------------------------\r
ASM_GLOBAL ASM_PFX(AsmVectorNumFixup)\r
ASM_PFX(AsmVectorNumFixup):\r
        movl  8(%esp), %eax\r
        movl  4(%esp), %ecx\r
        movb  %al, (VectorNum - HookAfterStubBegin)(%ecx)\r
        ret\r
Commit	Line	Data
8f07f895	1	#------------------------------------------------------------------------------\r
8f07f895	2	#*\r
087c67d0	3	#* Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>\r
8f07f895	4	#* This program and the accompanying materials\r
	5	#* are licensed and made available under the terms and conditions of the BSD License\r
	6	#* which accompanies this distribution. The full text of the license may be found at\r
	7	#* http://opensource.org/licenses/bsd-license.php\r
	8	#*\r
	9	#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	10	#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	11	#*\r
	12	#* ExceptionHandlerAsm.S\r
	13	#*\r
	14	#* Abstract:\r
	15	#*\r
	16	#* IA32 CPU Exception Handler\r
	17	#\r
	18	#------------------------------------------------------------------------------\r
	19	\r
	20	\r
8f07f895	21	#.MMX\r
	22	#.XMM\r
	23	\r
	24	ASM_GLOBAL ASM_PFX(CommonExceptionHandler)\r
	25	ASM_GLOBAL ASM_PFX(CommonInterruptEntry)\r
958313ba	26	ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)\r
8f07f895	27	\r
e41aad15 JF	28	#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions\r
e41aad15 JF	29	#EXTRN ASM_PFX(mDoFarReturnFlag):DWORD # Do far return flag\r
8f07f895	30	\r
	31	.text\r
	32	\r
	33	#\r
	34	# exception handler stub table\r
	35	#\r
	36	Exception0Handle:\r
e41aad15 JF	37	.byte 0x6a # push #VectorNum\r
	38	.byte 0\r
	39	pushl %eax\r
	40	.byte 0xB8\r
	41	.long ASM_PFX(CommonInterruptEntry)\r
	42	jmp *%eax\r
8f07f895	43	Exception1Handle:\r
e41aad15 JF	44	.byte 0x6a # push #VectorNum\r
	45	.byte 1\r
	46	pushl %eax\r
	47	.byte 0xB8\r
	48	.long ASM_PFX(CommonInterruptEntry)\r
	49	jmp *%eax\r
8f07f895	50	Exception2Handle:\r
e41aad15 JF	51	.byte 0x6a # push #VectorNum\r
	52	.byte 2\r
	53	pushl %eax\r
	54	.byte 0xB8\r
	55	.long ASM_PFX(CommonInterruptEntry)\r
	56	jmp *%eax\r
8f07f895	57	Exception3Handle:\r
e41aad15 JF	58	.byte 0x6a # push #VectorNum\r
	59	.byte 3\r
	60	pushl %eax\r
	61	.byte 0xB8\r
	62	.long ASM_PFX(CommonInterruptEntry)\r
	63	jmp *%eax\r
8f07f895	64	Exception4Handle:\r
e41aad15 JF	65	.byte 0x6a # push #VectorNum\r
	66	.byte 4\r
	67	pushl %eax\r
	68	.byte 0xB8\r
	69	.long ASM_PFX(CommonInterruptEntry)\r
	70	jmp *%eax\r
8f07f895	71	Exception5Handle:\r
e41aad15 JF	72	.byte 0x6a # push #VectorNum\r
	73	.byte 5\r
	74	pushl %eax\r
	75	.byte 0xB8\r
	76	.long ASM_PFX(CommonInterruptEntry)\r
	77	jmp *%eax\r
8f07f895	78	Exception6Handle:\r
e41aad15 JF	79	.byte 0x6a # push #VectorNum\r
	80	.byte 6\r
	81	pushl %eax\r
	82	.byte 0xB8\r
	83	.long ASM_PFX(CommonInterruptEntry)\r
	84	jmp *%eax\r
8f07f895	85	Exception7Handle:\r
e41aad15 JF	86	.byte 0x6a # push #VectorNum\r
	87	.byte 7\r
	88	pushl %eax\r
	89	.byte 0xB8\r
	90	.long ASM_PFX(CommonInterruptEntry)\r
	91	jmp *%eax\r
8f07f895	92	Exception8Handle:\r
e41aad15 JF	93	.byte 0x6a # push #VectorNum\r
	94	.byte 8\r
	95	pushl %eax\r
	96	.byte 0xB8\r
	97	.long ASM_PFX(CommonInterruptEntry)\r
	98	jmp *%eax\r
8f07f895	99	Exception9Handle:\r
e41aad15 JF	100	.byte 0x6a # push #VectorNum\r
	101	.byte 9\r
	102	pushl %eax\r
	103	.byte 0xB8\r
	104	.long ASM_PFX(CommonInterruptEntry)\r
	105	jmp *%eax\r
8f07f895	106	Exception10Handle:\r
e41aad15 JF	107	.byte 0x6a # push #VectorNum\r
	108	.byte 10\r
	109	pushl %eax\r
	110	.byte 0xB8\r
	111	.long ASM_PFX(CommonInterruptEntry)\r
	112	jmp *%eax\r
8f07f895	113	Exception11Handle:\r
e41aad15 JF	114	.byte 0x6a # push #VectorNum\r
	115	.byte 11\r
	116	pushl %eax\r
	117	.byte 0xB8\r
	118	.long ASM_PFX(CommonInterruptEntry)\r
	119	jmp *%eax\r
8f07f895	120	Exception12Handle:\r
e41aad15 JF	121	.byte 0x6a # push #VectorNum\r
	122	.byte 12\r
	123	pushl %eax\r
	124	.byte 0xB8\r
	125	.long ASM_PFX(CommonInterruptEntry)\r
	126	jmp *%eax\r
8f07f895	127	Exception13Handle:\r
e41aad15 JF	128	.byte 0x6a # push #VectorNum\r
	129	.byte 13\r
	130	pushl %eax\r
	131	.byte 0xB8\r
	132	.long ASM_PFX(CommonInterruptEntry)\r
	133	jmp *%eax\r
8f07f895	134	Exception14Handle:\r
e41aad15 JF	135	.byte 0x6a # push #VectorNum\r
	136	.byte 14\r
	137	pushl %eax\r
	138	.byte 0xB8\r
	139	.long ASM_PFX(CommonInterruptEntry)\r
	140	jmp *%eax\r
8f07f895	141	Exception15Handle:\r
e41aad15 JF	142	.byte 0x6a # push #VectorNum\r
	143	.byte 15\r
	144	pushl %eax\r
	145	.byte 0xB8\r
	146	.long ASM_PFX(CommonInterruptEntry)\r
	147	jmp *%eax\r
8f07f895	148	Exception16Handle:\r
e41aad15 JF	149	.byte 0x6a # push #VectorNum\r
	150	.byte 16\r
	151	pushl %eax\r
	152	.byte 0xB8\r
	153	.long ASM_PFX(CommonInterruptEntry)\r
	154	jmp *%eax\r
8f07f895	155	Exception17Handle:\r
e41aad15 JF	156	.byte 0x6a # push #VectorNum\r
	157	.byte 17\r
	158	pushl %eax\r
	159	.byte 0xB8\r
	160	.long ASM_PFX(CommonInterruptEntry)\r
	161	jmp *%eax\r
8f07f895	162	Exception18Handle:\r
e41aad15 JF	163	.byte 0x6a # push #VectorNum\r
	164	.byte 18\r
	165	pushl %eax\r
	166	.byte 0xB8\r
	167	.long ASM_PFX(CommonInterruptEntry)\r
	168	jmp *%eax\r
8f07f895	169	Exception19Handle:\r
e41aad15 JF	170	.byte 0x6a # push #VectorNum\r
	171	.byte 19\r
	172	pushl %eax\r
	173	.byte 0xB8\r
	174	.long ASM_PFX(CommonInterruptEntry)\r
	175	jmp *%eax\r
8f07f895	176	Exception20Handle:\r
e41aad15 JF	177	.byte 0x6a # push #VectorNum\r
	178	.byte 20\r
	179	pushl %eax\r
	180	.byte 0xB8\r
	181	.long ASM_PFX(CommonInterruptEntry)\r
	182	jmp *%eax\r
8f07f895	183	Exception21Handle:\r
e41aad15 JF	184	.byte 0x6a # push #VectorNum\r
	185	.byte 21\r
	186	pushl %eax\r
	187	.byte 0xB8\r
	188	.long ASM_PFX(CommonInterruptEntry)\r
	189	jmp *%eax\r
8f07f895	190	Exception22Handle:\r
e41aad15 JF	191	.byte 0x6a # push #VectorNum\r
	192	.byte 22\r
	193	pushl %eax\r
	194	.byte 0xB8\r
	195	.long ASM_PFX(CommonInterruptEntry)\r
	196	jmp *%eax\r
8f07f895	197	Exception23Handle:\r
e41aad15 JF	198	.byte 0x6a # push #VectorNum\r
	199	.byte 23\r
	200	pushl %eax\r
	201	.byte 0xB8\r
	202	.long ASM_PFX(CommonInterruptEntry)\r
	203	jmp *%eax\r
8f07f895	204	Exception24Handle:\r
e41aad15 JF	205	.byte 0x6a # push #VectorNum\r
	206	.byte 24\r
	207	pushl %eax\r
	208	.byte 0xB8\r
	209	.long ASM_PFX(CommonInterruptEntry)\r
	210	jmp *%eax\r
8f07f895	211	Exception25Handle:\r
e41aad15 JF	212	.byte 0x6a # push #VectorNum\r
	213	.byte 25\r
	214	pushl %eax\r
	215	.byte 0xB8\r
	216	.long ASM_PFX(CommonInterruptEntry)\r
	217	jmp *%eax\r
8f07f895	218	Exception26Handle:\r
e41aad15 JF	219	.byte 0x6a # push #VectorNum\r
	220	.byte 26\r
	221	pushl %eax\r
	222	.byte 0xB8\r
	223	.long ASM_PFX(CommonInterruptEntry)\r
	224	jmp *%eax\r
8f07f895	225	Exception27Handle:\r
e41aad15 JF	226	.byte 0x6a # push #VectorNum\r
	227	.byte 27\r
	228	pushl %eax\r
	229	.byte 0xB8\r
	230	.long ASM_PFX(CommonInterruptEntry)\r
	231	jmp *%eax\r
8f07f895	232	Exception28Handle:\r
e41aad15 JF	233	.byte 0x6a # push #VectorNum\r
	234	.byte 28\r
	235	pushl %eax\r
	236	.byte 0xB8\r
	237	.long ASM_PFX(CommonInterruptEntry)\r
	238	jmp *%eax\r
8f07f895	239	Exception29Handle:\r
e41aad15 JF	240	.byte 0x6a # push #VectorNum\r
	241	.byte 29\r
	242	pushl %eax\r
	243	.byte 0xB8\r
	244	.long ASM_PFX(CommonInterruptEntry)\r
	245	jmp *%eax\r
8f07f895	246	Exception30Handle:\r
e41aad15 JF	247	.byte 0x6a # push #VectorNum\r
	248	.byte 30\r
	249	pushl %eax\r
	250	.byte 0xB8\r
	251	.long ASM_PFX(CommonInterruptEntry)\r
	252	jmp *%eax\r
8f07f895	253	Exception31Handle:\r
e41aad15 JF	254	.byte 0x6a # push #VectorNum\r
	255	.byte 31\r
	256	pushl %eax\r
	257	.byte 0xB8\r
	258	.long ASM_PFX(CommonInterruptEntry)\r
	259	jmp *%eax\r
	260	\r
	261	HookAfterStubBegin:\r
	262	.byte 0x6a # push\r
	263	VectorNum:\r
	264	.byte 0 # 0 will be fixed\r
	265	pushl %eax\r
	266	.byte 0xB8 # movl ASM_PFX(HookAfterStubHeaderEnd), %eax\r
	267	.long ASM_PFX(HookAfterStubHeaderEnd)\r
	268	jmp *%eax\r
	269	ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)\r
1925ea69	270	ASM_PFX(HookAfterStubHeaderEnd):\r
e41aad15 JF	271	popl %eax\r
	272	subl $8, %esp # reserve room for filling exception data later\r
	273	pushl 8(%esp)\r
	274	xchgl (%esp), %ecx # get vector number\r
	275	bt %ecx, ASM_PFX(mErrorCodeFlag)\r
	276	jnc NoErrorData\r
	277	pushl (%esp) # addition push if exception data needed\r
	278	NoErrorData:\r
	279	xchg (%esp), %ecx # restore ecx\r
	280	pushl %eax\r
8f07f895	281	\r
	282	#---------------------------------------;\r
	283	# CommonInterruptEntry ;\r
	284	#---------------------------------------;\r
	285	# The follow algorithm is used for the common interrupt routine.\r
	286	\r
	287	ASM_GLOBAL ASM_PFX(CommonInterruptEntry)\r
	288	ASM_PFX(CommonInterruptEntry):\r
	289	cli\r
e41aad15	290	popl %eax\r
8f07f895	291	#\r
	292	# All interrupt handlers are invoked through interrupt gates, so\r
	293	# IF flag automatically cleared at the entry point\r
	294	#\r
	295	\r
	296	#\r
e41aad15	297	# Get vector number from top of stack\r
8f07f895	298	#\r
8f07f895	299	xchgl (%esp), %ecx\r
e41aad15	300	andl $0x0FF, %ecx # Vector number should be less than 256\r
8f07f895	301	cmpl $32, %ecx # Intel reserved vector for exceptions?\r
	302	jae NoErrorCode\r
	303	bt %ecx, ASM_PFX(mErrorCodeFlag)\r
	304	jc HasErrorCode\r
	305	\r
	306	NoErrorCode:\r
	307	\r
	308	#\r
	309	# Stack:\r
	310	# +---------------------+\r
	311	# + EFlags +\r
	312	# +---------------------+\r
	313	# + CS +\r
	314	# +---------------------+\r
	315	# + EIP +\r
	316	# +---------------------+\r
	317	# + ECX +\r
	318	# +---------------------+ <-- ESP\r
	319	#\r
	320	# Registers:\r
	321	# ECX - Vector Number\r
	322	#\r
	323	\r
	324	#\r
	325	# Put Vector Number on stack\r
	326	#\r
	327	pushl %ecx\r
	328	\r
	329	#\r
	330	# Put 0 (dummy) error code on stack, and restore ECX\r
	331	#\r
	332	xorl %ecx, %ecx # ECX = 0\r
	333	xchgl 4(%esp), %ecx\r
	334	\r
	335	jmp ErrorCodeAndVectorOnStack\r
	336	\r
	337	HasErrorCode:\r
	338	\r
	339	#\r
	340	# Stack:\r
	341	# +---------------------+\r
	342	# + EFlags +\r
	343	# +---------------------+\r
	344	# + CS +\r
	345	# +---------------------+\r
	346	# + EIP +\r
	347	# +---------------------+\r
	348	# + Error Code +\r
	349	# +---------------------+\r
	350	# + ECX +\r
	351	# +---------------------+ <-- ESP\r
	352	#\r
	353	# Registers:\r
	354	# ECX - Vector Number\r
	355	#\r
	356	\r
	357	#\r
	358	# Put Vector Number on stack and restore ECX\r
	359	#\r
	360	xchgl (%esp), %ecx \r
	361	\r
8f07f895	362	ErrorCodeAndVectorOnStack:\r
	363	pushl %ebp\r
	364	movl %esp, %ebp\r
	365	\r
	366	#\r
	367	# Stack:\r
	368	# +---------------------+\r
	369	# + EFlags +\r
	370	# +---------------------+\r
	371	# + CS +\r
	372	# +---------------------+\r
	373	# + EIP +\r
	374	# +---------------------+\r
	375	# + Error Code +\r
	376	# +---------------------+\r
	377	# + Vector Number +\r
	378	# +---------------------+\r
	379	# + EBP +\r
	380	# +---------------------+ <-- EBP\r
	381	#\r
	382	\r
	383	#\r
	384	# Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32\r
	385	# is 16-byte aligned\r
	386	#\r
	387	andl $0x0fffffff0, %esp \r
	388	subl $12, %esp\r
	389	\r
e41aad15 JF	390	subl $8, %esp\r
	391	pushl $0 # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler\r
	392	pushl $0 # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag\r
	393	\r
8f07f895	394	#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
	395	pushl %eax\r
	396	pushl %ecx\r
	397	pushl %edx\r
	398	pushl %ebx\r
	399	leal 24(%ebp), %ecx\r
	400	pushl %ecx # ESP\r
	401	pushl (%ebp) # EBP\r
	402	pushl %esi\r
	403	pushl %edi\r
	404	\r
	405	#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r
	406	movl %ss, %eax\r
	407	pushl %eax\r
	408	movzwl 16(%ebp), %eax \r
	409	pushl %eax\r
	410	movl %ds, %eax\r
	411	pushl %eax\r
	412	movl %es, %eax\r
	413	pushl %eax\r
	414	movl %fs, %eax\r
	415	pushl %eax\r
	416	movl %gs, %eax\r
	417	pushl %eax\r
	418	\r
	419	#; UINT32 Eip;\r
	420	movl 12(%ebp), %eax\r
	421	pushl %eax\r
	422	\r
	423	#; UINT32 Gdtr[2], Idtr[2];\r
	424	subl $8, %esp\r
	425	sidt (%esp)\r
	426	movl 2(%esp), %eax\r
	427	xchgl (%esp), %eax\r
	428	andl $0x0FFFF, %eax \r
	429	movl %eax, 4(%esp)\r
	430	\r
	431	subl $8, %esp\r
	432	sgdt (%esp)\r
	433	movl 2(%esp), %eax\r
	434	xchgl (%esp), %eax\r
	435	andl $0x0FFFF, %eax \r
	436	movl %eax, 4(%esp)\r
	437	\r
	438	#; UINT32 Ldtr, Tr;\r
	439	xorl %eax, %eax\r
	440	str %ax\r
	441	pushl %eax\r
	442	sldt %ax\r
	443	pushl %eax\r
	444	\r
	445	#; UINT32 EFlags;\r
	446	movl 20(%ebp), %eax\r
	447	pushl %eax\r
	448	\r
	449	#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
087c67d0 MK	450	## insure FXSAVE/FXRSTOR is enabled in CR4...\r
	451	## ... while we're at it, make sure DE is also enabled...\r
	452	mov $1, %eax\r
	453	pushl %ebx # temporarily save value of ebx on stack \r
	454	cpuid # use CPUID to determine if FXSAVE/FXRESTOR\r
	455	# and DE are supported\r
	456	popl %ebx # retore value of ebx that was overwritten\r
	457	# by CPUID \r
8f07f895	458	movl %cr4, %eax\r
087c67d0 MK	459	pushl %eax # push cr4 firstly\r
	460	testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support\r
	461	jz L1\r
	462	orl $BIT9, %eax # Set CR4.OSFXSR\r
	463	L1: \r
	464	testl $BIT2, %edx # Test for Debugging Extensions support\r
	465	jz L2\r
	466	orl $BIT3, %eax # Set CR4.DE\r
	467	L2: \r
8f07f895	468	movl %eax, %cr4\r
8f07f895	469	movl %cr3, %eax\r
	470	pushl %eax\r
	471	movl %cr2, %eax\r
	472	pushl %eax\r
	473	xorl %eax, %eax\r
	474	pushl %eax\r
	475	movl %cr0, %eax\r
	476	pushl %eax\r
	477	\r
	478	#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
	479	movl %dr7, %eax\r
	480	pushl %eax\r
	481	movl %dr6, %eax\r
	482	pushl %eax\r
	483	movl %dr3, %eax\r
	484	pushl %eax\r
	485	movl %dr2, %eax\r
	486	pushl %eax\r
	487	movl %dr1, %eax\r
	488	pushl %eax\r
	489	movl %dr0, %eax\r
	490	pushl %eax\r
	491	\r
	492	#; FX_SAVE_STATE_IA32 FxSaveState;\r
	493	subl $512, %esp\r
	494	movl %esp, %edi\r
087c67d0 MK	495	testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support. \r
	496	# edx still contains result from CPUID above\r
	497	jz L3\r
8f07f895	498	.byte 0x0f, 0x0ae, 0x07 #fxsave [edi]\r
087c67d0	499	L3: \r
8f07f895	500	\r
	501	#; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear\r
	502	cld\r
	503	\r
	504	#; UINT32 ExceptionData;\r
	505	pushl 8(%ebp)\r
	506	\r
	507	#; Prepare parameter and call\r
	508	movl %esp, %edx\r
	509	pushl %edx\r
	510	movl 4(%ebp), %edx\r
	511	pushl %edx\r
	512	\r
	513	#\r
	514	# Call External Exception Handler\r
	515	#\r
	516	call ASM_PFX(CommonExceptionHandler)\r
	517	addl $8, %esp\r
	518	\r
	519	cli\r
	520	#; UINT32 ExceptionData;\r
	521	addl $4, %esp\r
	522	\r
	523	#; FX_SAVE_STATE_IA32 FxSaveState;\r
	524	movl %esp, %esi\r
087c67d0 MK	525	movl $1, %eax\r
	526	cpuid # use CPUID to determine if FXSAVE/FXRESTOR \r
	527	# are supported\r
	528	testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support\r
	529	jz L4\r
8f07f895	530	.byte 0x0f, 0x0ae, 0x0e # fxrstor [esi]\r
087c67d0	531	L4: \r
8f07f895	532	addl $512, %esp\r
	533	\r
	534	#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
	535	#; Skip restoration of DRx registers to support in-circuit emualators\r
	536	#; or debuggers set breakpoint in interrupt/exception context\r
	537	addl $24, %esp\r
	538	\r
	539	#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
	540	popl %eax\r
	541	movl %eax, %cr0\r
	542	addl $4, %esp # not for Cr1\r
	543	popl %eax\r
	544	movl %eax, %cr2\r
	545	popl %eax\r
	546	movl %eax, %cr3\r
	547	popl %eax\r
	548	movl %eax, %cr4\r
	549	\r
	550	#; UINT32 EFlags;\r
	551	popl 20(%ebp)\r
	552	\r
	553	#; UINT32 Ldtr, Tr;\r
	554	#; UINT32 Gdtr[2], Idtr[2];\r
	555	#; Best not let anyone mess with these particular registers...\r
	556	addl $24, %esp\r
	557	\r
	558	#; UINT32 Eip;\r
	559	popl 12(%ebp)\r
	560	\r
	561	#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r
	562	#; NOTE - modified segment registers could hang the debugger... We\r
	563	#; could attempt to insulate ourselves against this possibility,\r
	564	#; but that poses risks as well.\r
	565	#;\r
	566	popl %gs\r
	567	popl %fs\r
	568	popl %es\r
	569	popl %ds\r
	570	popl 16(%ebp)\r
	571	popl %ss\r
	572	\r
	573	#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
	574	popl %edi\r
	575	popl %esi\r
	576	addl $4, %esp # not for ebp\r
	577	addl $4, %esp # not for esp\r
	578	popl %ebx\r
	579	popl %edx\r
	580	popl %ecx\r
	581	popl %eax\r
	582	\r
e41aad15 JF	583	popl -8(%ebp)\r
e41aad15 JF	584	popl -4(%ebp)\r
8f07f895	585	movl %ebp, %esp\r
	586	popl %ebp\r
	587	addl $8, %esp\r
e41aad15 JF	588	cmpl $0, -16(%esp) # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler\r
	589	jz DoReturn\r
	590	cmpl $1, -20(%esp) # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag\r
	591	jz ErrorCode\r
	592	jmp *-16(%esp)\r
	593	ErrorCode:\r
	594	subl $4, %esp\r
	595	jmp *-12(%esp)\r
	596	\r
	597	DoReturn:\r
	598	cmpl $0, ASM_PFX(mDoFarReturnFlag)\r
	599	jz DoIret\r
	600	pushl 8(%esp) # save EFLAGS\r
	601	addl $16, %esp\r
	602	pushl -8(%esp) # save CS in new location\r
	603	pushl -8(%esp) # save EIP in new location\r
	604	pushl -8(%esp) # save EFLAGS in new location\r
	605	popfl # restore EFLAGS\r
010f55d3	606	lret # far return\r
e41aad15 JF	607	\r
e41aad15 JF	608	DoIret:\r
8f07f895	609	iretl\r
	610	\r
	611	\r
	612	#---------------------------------------;\r
e41aad15 JF	613	# _AsmGetTemplateAddressMap ;\r
e41aad15 JF	614	#---------------------------------------;\r
8f07f895	615	# \r
8f07f895	616	# Protocol prototype\r
e41aad15	617	# AsmGetTemplateAddressMap (\r
8f07f895	618	# EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap\r
	619	# );\r
	620	# \r
	621	# Routine Description:\r
	622	# \r
	623	# Return address map of interrupt handler template so that C code can generate\r
	624	# interrupt table.\r
	625	# \r
	626	# Arguments:\r
	627	# \r
	628	# \r
	629	# Returns: \r
	630	# \r
	631	# Nothing\r
	632	#\r
	633	# \r
	634	# Input: [ebp][0] = Original ebp\r
	635	# [ebp][4] = Return address\r
	636	# \r
	637	# Output: Nothing\r
	638	# \r
	639	# Destroys: Nothing\r
	640	#-----------------------------------------------------------------------------;\r
	641	#-------------------------------------------------------------------------------------\r
	642	# AsmGetAddressMap (&AddressMap);\r
	643	#-------------------------------------------------------------------------------------\r
e41aad15 JF	644	ASM_GLOBAL ASM_PFX(AsmGetTemplateAddressMap)\r
e41aad15 JF	645	ASM_PFX(AsmGetTemplateAddressMap):\r
8f07f895	646	\r
	647	pushl %ebp\r
	648	movl %esp,%ebp\r
	649	pushal\r
	650	\r
	651	movl 0x8(%ebp), %ebx\r
	652	movl $Exception0Handle, (%ebx)\r
	653	movl $(Exception1Handle - Exception0Handle), 0x4(%ebx)\r
e41aad15	654	movl $(HookAfterStubBegin), 0x8(%ebx)\r
8f07f895	655	\r
	656	popal\r
	657	popl %ebp\r
	658	ret\r
e41aad15	659	#-------------------------------------------------------------------------------------\r
07da1ac8	660	# AsmVectorNumFixup (NewVectorAddr, VectorNum, OldVectorAddr);\r
e41aad15 JF	661	#-------------------------------------------------------------------------------------\r
	662	ASM_GLOBAL ASM_PFX(AsmVectorNumFixup)\r
	663	ASM_PFX(AsmVectorNumFixup):\r
	664	movl 8(%esp), %eax\r
	665	movl 4(%esp), %ecx\r
	666	movb %al, (VectorNum - HookAfterStubBegin)(%ecx)\r
	667	ret\r