UefiCpuPkg/MpInitLib: Add EnableExecuteDisable in MP_CPU_EXCHANGE_INFO

[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / Ia32 / MpFuncs.nasm

;------------------------------------------------------------------------------ ;\r
; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution.  The full text of the license may be found at\r
; http://opensource.org/licenses/bsd-license.php.\r
;\r
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
;\r
; Module Name:\r
;\r
;   MpFuncs.nasm\r
;\r
; Abstract:\r
;\r
;   This is the assembly code for MP support\r
;\r
;-------------------------------------------------------------------------------\r
\r
%include "MpEqu.inc"\r
extern ASM_PFX(InitializeFloatingPointUnits)\r
\r
SECTION .text\r
\r
;-------------------------------------------------------------------------------------\r
;RendezvousFunnelProc  procedure follows. All APs execute their procedure. This\r
;procedure serializes all the AP processors through an Init sequence. It must be\r
;noted that APs arrive here very raw...ie: real mode, no stack.\r
;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC\r
;IS IN MACHINE CODE.\r
;-------------------------------------------------------------------------------------\r
global ASM_PFX(RendezvousFunnelProc)\r
ASM_PFX(RendezvousFunnelProc):\r
RendezvousFunnelProcStart:\r
; At this point CS = 0x(vv00) and ip= 0x0.\r
BITS 16\r
    mov        ebp, eax                        ; save BIST information\r
\r
    mov        ax, cs\r
    mov        ds, ax\r
    mov        es, ax\r
    mov        ss, ax\r
    xor        ax, ax\r
    mov        fs, ax\r
    mov        gs, ax\r
\r
    mov        si,  BufferStartLocation\r
    mov        ebx, [si]\r
\r
    mov        si,  ModeOffsetLocation\r
    mov        eax, [si]\r
    mov        si,  CodeSegmentLocation\r
    mov        edx, [si]\r
    mov        di,  ax\r
    sub        di,  02h\r
    mov        [di], dx\r
    sub        di,  04h\r
    add        eax, ebx\r
    mov        [di],eax\r
\r
    mov        si,  DataSegmentLocation\r
    mov        edx, [si]\r
\r
    mov        si, GdtrLocation\r
o32 lgdt       [cs:si]\r
\r
    mov        si, IdtrLocation\r
o32 lidt       [cs:si]\r
\r
    xor        ax,  ax\r
    mov        ds,  ax\r
\r
    mov        eax, cr0                        ; Get control register 0\r
    or         eax, 000000003h                 ; Set PE bit (bit #0) & MP\r
    mov        cr0, eax\r
\r
    jmp        0:strict dword 0                ; far jump to protected mode\r
BITS 32\r
Flat32Start:                                   ; protected mode entry point\r
    mov        ds, dx\r
    mov        es, dx\r
    mov        fs, dx\r
    mov        gs, dx\r
    mov        ss, dx\r
\r
    mov        esi, ebx\r
\r
    mov         edi, esi\r
    add         edi, EnableExecuteDisableLocation\r
    cmp         byte [edi], 0\r
    jz          SkipEnableExecuteDisable\r
\r
    ;\r
    ; Enable IA32 PAE execute disable\r
    ;\r
\r
    mov         ecx, 0xc0000080\r
    rdmsr\r
    bts         eax, 11\r
    wrmsr\r
\r
    mov         edi, esi\r
    add         edi, Cr3Location\r
    mov         eax, dword [edi]\r
    mov         cr3, eax\r
\r
    mov         eax, cr4\r
    bts         eax, 5\r
    mov         cr4, eax\r
\r
    mov         eax, cr0\r
    bts         eax, 31\r
    mov         cr0, eax\r
\r
SkipEnableExecuteDisable:\r
\r
    mov        edi, esi\r
    add        edi, LockLocation\r
    mov        eax, NotVacantFlag\r
\r
TestLock:\r
    xchg       [edi], eax\r
    cmp        eax, NotVacantFlag\r
    jz         TestLock\r
\r
    mov        edi, esi\r
    add        edi, NumApsExecutingLocation\r
    inc        dword [edi]\r
    mov        ebx, [edi]\r
\r
ProgramStack:\r
    mov        edi, esi\r
    add        edi, StackSizeLocation\r
    mov        eax, [edi]\r
    mov        edi, esi\r
    add        edi, StackStartAddressLocation\r
    add        eax, [edi]\r
    mov        esp, eax\r
    mov        [edi], eax\r
\r
Releaselock:\r
    mov        eax, VacantFlag\r
    mov        edi, esi\r
    add        edi, LockLocation\r
    xchg       [edi], eax\r
\r
CProcedureInvoke:\r
    push       ebp               ; push BIST data at top of AP stack\r
    xor        ebp, ebp          ; clear ebp for call stack trace\r
    push       ebp\r
    mov        ebp, esp\r
\r
    mov        eax, ASM_PFX(InitializeFloatingPointUnits)\r
    call       eax               ; Call assembly function to initialize FPU per UEFI spec\r
\r
    push       ebx               ; Push NumApsExecuting\r
    mov        eax, esi\r
    add        eax, LockLocation\r
    push       eax               ; push address of exchange info data buffer\r
\r
    mov        edi, esi\r
    add        edi, ApProcedureLocation\r
    mov        eax, [edi]\r
\r
    call       eax               ; Invoke C function\r
\r
    jmp        $                 ; Never reach here\r
RendezvousFunnelProcEnd:\r
\r
;-------------------------------------------------------------------------------------\r
;  AsmGetAddressMap (&AddressMap);\r
;-------------------------------------------------------------------------------------\r
global ASM_PFX(AsmGetAddressMap)\r
ASM_PFX(AsmGetAddressMap):\r
    pushad\r
    mov        ebp,esp\r
\r
    mov        ebx,  [ebp + 24h]\r
    mov        dword [ebx], RendezvousFunnelProcStart\r
    mov        dword [ebx +  4h], Flat32Start - RendezvousFunnelProcStart\r
    mov        dword [ebx +  8h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart\r
\r
    popad\r
    ret\r
\r
;-------------------------------------------------------------------------------------\r
;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is\r
;about to become an AP. It switches it'stack with the current AP.\r
;AsmExchangeRole (IN   CPU_EXCHANGE_INFO    *MyInfo, IN   CPU_EXCHANGE_INFO    *OthersInfo);\r
;-------------------------------------------------------------------------------------\r
global ASM_PFX(AsmExchangeRole)\r
ASM_PFX(AsmExchangeRole):\r
    ; DO NOT call other functions in this function, since 2 CPU may use 1 stack\r
    ; at the same time. If 1 CPU try to call a function, stack will be corrupted.\r
    pushad\r
    mov        ebp,esp\r
\r
    ; esi contains MyInfo pointer\r
    mov        esi, [ebp + 24h]\r
\r
    ; edi contains OthersInfo pointer\r
    mov        edi, [ebp + 28h]\r
\r
    ;Store EFLAGS, GDTR and IDTR register to stack\r
    pushfd\r
    mov        eax, cr4\r
    push       eax       ; push cr4 firstly\r
    mov        eax, cr0\r
    push       eax\r
\r
    sgdt       [esi + 8]\r
    sidt       [esi + 14]\r
\r
    ; Store the its StackPointer\r
    mov        [esi + 4],esp\r
\r
    ; update its switch state to STORED\r
    mov        byte [esi], CPU_SWITCH_STATE_STORED\r
\r
WaitForOtherStored:\r
    ; wait until the other CPU finish storing its state\r
    cmp        byte [edi], CPU_SWITCH_STATE_STORED\r
    jz         OtherStored\r
    pause\r
    jmp        WaitForOtherStored\r
\r
OtherStored:\r
    ; Since another CPU already stored its state, load them\r
    ; load GDTR value\r
    lgdt       [edi + 8]\r
\r
    ; load IDTR value\r
    lidt       [edi + 14]\r
\r
    ; load its future StackPointer\r
    mov        esp, [edi + 4]\r
\r
    ; update the other CPU's switch state to LOADED\r
    mov        byte [edi], CPU_SWITCH_STATE_LOADED\r
\r
WaitForOtherLoaded:\r
    ; wait until the other CPU finish loading new state,\r
    ; otherwise the data in stack may corrupt\r
    cmp        byte [esi], CPU_SWITCH_STATE_LOADED\r
    jz         OtherLoaded\r
    pause\r
    jmp        WaitForOtherLoaded\r
\r
OtherLoaded:\r
    ; since the other CPU already get the data it want, leave this procedure\r
    pop        eax\r
    mov        cr0, eax\r
    pop        eax\r
    mov        cr4, eax\r
    popfd\r
\r
    popad\r
    ret\r