[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / Microcode.c

/** @file\r
  Implementation of loading microcode on processors.\r
\r
  Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "MpLib.h"\r
\r
/**\r
  Get microcode update signature of currently loaded microcode update.\r
\r
  @return  Microcode signature.\r
**/\r
UINT32\r
GetCurrentMicrocodeSignature (\r
  VOID\r
  )\r
{\r
  MSR_IA32_BIOS_SIGN_ID_REGISTER   BiosSignIdMsr;\r
\r
  AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);\r
  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);\r
  BiosSignIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID);\r
  return BiosSignIdMsr.Bits.MicrocodeUpdateSignature;\r
}\r
\r
/**\r
  Detect whether specified processor can find matching microcode patch and load it.\r
\r
  @param[in]  CpuMpData    The pointer to CPU MP Data structure.\r
  @param[in]  IsBspCallIn  Indicate whether the caller is BSP or not.\r
**/\r
VOID\r
MicrocodeDetect (\r
  IN CPU_MP_DATA             *CpuMpData,\r
  IN BOOLEAN                 IsBspCallIn\r
  )\r
{\r
  UINT32                                  ExtendedTableLength;\r
  UINT32                                  ExtendedTableCount;\r
  CPU_MICROCODE_EXTENDED_TABLE            *ExtendedTable;\r
  CPU_MICROCODE_EXTENDED_TABLE_HEADER     *ExtendedTableHeader;\r
  CPU_MICROCODE_HEADER                    *MicrocodeEntryPoint;\r
  UINTN                                   MicrocodeEnd;\r
  UINTN                                   Index;\r
  UINT8                                   PlatformId;\r
  CPUID_VERSION_INFO_EAX                  Eax;\r
  UINT32                                  CurrentRevision;\r
  UINT32                                  LatestRevision;\r
  UINTN                                   TotalSize;\r
  UINT32                                  CheckSum32;\r
  BOOLEAN                                 CorrectMicrocode;\r
  VOID                                    *MicrocodeData;\r
  MSR_IA32_PLATFORM_ID_REGISTER           PlatformIdMsr;\r
  UINT32                                  ProcessorFlags;\r
  UINT32                                  ThreadId;\r
\r
  if (CpuMpData->MicrocodePatchRegionSize == 0) {\r
    //\r
    // There is no microcode patches\r
    //\r
    return;\r
  }\r
\r
  CurrentRevision = GetCurrentMicrocodeSignature ();\r
  if (CurrentRevision != 0 && !IsBspCallIn) {\r
    //\r
    // Skip loading microcode if it has been loaded successfully\r
    //\r
    return;\r
  }\r
\r
  GetProcessorLocationByApicId (GetInitialApicId (), NULL, NULL, &ThreadId);\r
  if (ThreadId != 0) {\r
    //\r
    // Skip loading microcode if it is not the first thread in one core.\r
    //\r
    return;\r
  }\r
\r
  ExtendedTableLength = 0;\r
  //\r
  // Here data of CPUID leafs have not been collected into context buffer, so\r
  // GetProcessorCpuid() cannot be used here to retrieve CPUID data.\r
  //\r
  AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, NULL, NULL);\r
\r
  //\r
  // The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID\r
  //\r
  PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);\r
  PlatformId = (UINT8) PlatformIdMsr.Bits.PlatformId;\r
\r
  //\r
  // Check whether AP has same processor with BSP.\r
  // If yes, direct use microcode info saved by BSP.\r
  //\r
  if (!IsBspCallIn) {\r
    if ((CpuMpData->ProcessorSignature == Eax.Uint32) &&\r
        (CpuMpData->ProcessorFlags & (1 << PlatformId)) != 0) {\r
        MicrocodeData = (VOID *)(UINTN) CpuMpData->MicrocodeDataAddress;\r
        LatestRevision = CpuMpData->MicrocodeRevision;\r
        goto Done;\r
    }\r
  }\r
\r
  LatestRevision = 0;\r
  MicrocodeData  = NULL;\r
  MicrocodeEnd = (UINTN) (CpuMpData->MicrocodePatchAddress + CpuMpData->MicrocodePatchRegionSize);\r
  MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) CpuMpData->MicrocodePatchAddress;\r
  do {\r
    //\r
    // Check if the microcode is for the Cpu and the version is newer\r
    // and the update can be processed on the platform\r
    //\r
    CorrectMicrocode = FALSE;\r
    if (MicrocodeEntryPoint->HeaderVersion == 0x1) {\r
      //\r
      // It is the microcode header. It is not the padding data between microcode patches\r
      // because the padding data should not include 0x00000001 and it should be the repeated\r
      // byte format (like 0xXYXYXYXY....).\r
      //\r
      if (MicrocodeEntryPoint->ProcessorSignature.Uint32 == Eax.Uint32 &&\r
          MicrocodeEntryPoint->UpdateRevision > LatestRevision &&\r
          (MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))\r
          ) {\r
        if (MicrocodeEntryPoint->DataSize == 0) {\r
          CheckSum32 = CalculateSum32 ((UINT32 *) MicrocodeEntryPoint, 2048);\r
        } else {\r
          CheckSum32 = CalculateSum32 (\r
                         (UINT32 *) MicrocodeEntryPoint,\r
                         MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER)\r
                         );\r
        }\r
        if (CheckSum32 == 0) {\r
          CorrectMicrocode = TRUE;\r
          ProcessorFlags = MicrocodeEntryPoint->ProcessorFlags;\r
        }\r
      } else if ((MicrocodeEntryPoint->DataSize != 0) &&\r
                 (MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {\r
        ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize +\r
                                sizeof (CPU_MICROCODE_HEADER));\r
        if (ExtendedTableLength != 0) {\r
          //\r
          // Extended Table exist, check if the CPU in support list\r
          //\r
          ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER *) ((UINT8 *) (MicrocodeEntryPoint)\r
                                  + MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER));\r
          //\r
          // Calculate Extended Checksum\r
          //\r
          if ((ExtendedTableLength % 4) == 0) {\r
            CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTableHeader, ExtendedTableLength);\r
            if (CheckSum32 == 0) {\r
              //\r
              // Checksum correct\r
              //\r
              ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;\r
              ExtendedTable      = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);\r
              for (Index = 0; Index < ExtendedTableCount; Index ++) {\r
                CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTable, sizeof(CPU_MICROCODE_EXTENDED_TABLE));\r
                if (CheckSum32 == 0) {\r
                  //\r
                  // Verify Header\r
                  //\r
                  if ((ExtendedTable->ProcessorSignature.Uint32 == Eax.Uint32) &&\r
                      (ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {\r
                    //\r
                    // Find one\r
                    //\r
                    CorrectMicrocode = TRUE;\r
                    ProcessorFlags = ExtendedTable->ProcessorFlag;\r
                    break;\r
                  }\r
                }\r
                ExtendedTable ++;\r
              }\r
            }\r
          }\r
        }\r
      }\r
    } else {\r
      //\r
      // It is the padding data between the microcode patches for microcode patches alignment.\r
      // Because the microcode patch is the multiple of 1-KByte, the padding data should not\r
      // exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode\r
      // alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to\r
      // find the next possible microcode patch header.\r
      //\r
      MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);\r
      continue;\r
    }\r
    //\r
    // Get the next patch.\r
    //\r
    if (MicrocodeEntryPoint->DataSize == 0) {\r
      TotalSize = 2048;\r
    } else {\r
      TotalSize = MicrocodeEntryPoint->TotalSize;\r
    }\r
\r
    if (CorrectMicrocode) {\r
      LatestRevision = MicrocodeEntryPoint->UpdateRevision;\r
      MicrocodeData = (VOID *) ((UINTN) MicrocodeEntryPoint + sizeof (CPU_MICROCODE_HEADER));\r
    }\r
\r
    MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);\r
  } while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));\r
\r
Done:\r
  if (LatestRevision > CurrentRevision) {\r
    //\r
    // BIOS only authenticate updates that contain a numerically larger revision\r
    // than the currently loaded revision, where Current Signature < New Update\r
    // Revision. A processor with no loaded update is considered to have a\r
    // revision equal to zero.\r
    //\r
    ASSERT (MicrocodeData != NULL);\r
    AsmWriteMsr64 (\r
        MSR_IA32_BIOS_UPDT_TRIG,\r
        (UINT64) (UINTN) MicrocodeData\r
        );\r
    //\r
    // Get and check new microcode signature\r
    //\r
    CurrentRevision = GetCurrentMicrocodeSignature ();\r
    if (CurrentRevision != LatestRevision) {\r
      AcquireSpinLock(&CpuMpData->MpLock);\r
      DEBUG ((EFI_D_ERROR, "Updated microcode signature [0x%08x] does not match \\r
                loaded microcode signature [0x%08x]\n", CurrentRevision, LatestRevision));\r
      ReleaseSpinLock(&CpuMpData->MpLock);\r
    }\r
  }\r
\r
  if (IsBspCallIn && (LatestRevision != 0)) {\r
    //\r
    // Save BSP processor info and microcode info for later AP use.\r
    //\r
    CpuMpData->ProcessorSignature   = Eax.Uint32;\r
    CpuMpData->ProcessorFlags       = ProcessorFlags;\r
    CpuMpData->MicrocodeDataAddress = (UINTN) MicrocodeData;\r
    CpuMpData->MicrocodeRevision    = LatestRevision;\r
    DEBUG ((DEBUG_INFO, "BSP Microcode:: signature [0x%08x], ProcessorFlags [0x%08x], \\r
       MicroData [0x%08x], Revision [0x%08x]\n", Eax.Uint32, ProcessorFlags, (UINTN) MicrocodeData, LatestRevision));\r
  }\r
}\r
Commit	Line	Data
94f63c76 JF	1	/** @file\r
	2	Implementation of loading microcode on processors.\r
	3	\r
3e5c6c07	4	Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
94f63c76 JF	5	This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	**/\r
	14	\r
	15	#include "MpLib.h"\r
	16	\r
	17	/**\r
	18	Get microcode update signature of currently loaded microcode update.\r
	19	\r
	20	@return Microcode signature.\r
	21	**/\r
	22	UINT32\r
	23	GetCurrentMicrocodeSignature (\r
	24	VOID\r
	25	)\r
	26	{\r
	27	MSR_IA32_BIOS_SIGN_ID_REGISTER BiosSignIdMsr;\r
	28	\r
	29	AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);\r
	30	AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);\r
	31	BiosSignIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID);\r
	32	return BiosSignIdMsr.Bits.MicrocodeUpdateSignature;\r
	33	}\r
	34	\r
	35	/**\r
	36	Detect whether specified processor can find matching microcode patch and load it.\r
	37	\r
2a089134 ED	38	@param[in] CpuMpData The pointer to CPU MP Data structure.\r
2a089134 ED	39	@param[in] IsBspCallIn Indicate whether the caller is BSP or not.\r
94f63c76 JF	40	**/\r
	41	VOID\r
	42	MicrocodeDetect (\r
2a089134 ED	43	IN CPU_MP_DATA *CpuMpData,\r
2a089134 ED	44	IN BOOLEAN IsBspCallIn\r
94f63c76 JF	45	)\r
94f63c76 JF	46	{\r
94f63c76 JF	47	UINT32 ExtendedTableLength;\r
	48	UINT32 ExtendedTableCount;\r
	49	CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;\r
	50	CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;\r
	51	CPU_MICROCODE_HEADER *MicrocodeEntryPoint;\r
	52	UINTN MicrocodeEnd;\r
	53	UINTN Index;\r
	54	UINT8 PlatformId;\r
	55	CPUID_VERSION_INFO_EAX Eax;\r
	56	UINT32 CurrentRevision;\r
	57	UINT32 LatestRevision;\r
	58	UINTN TotalSize;\r
	59	UINT32 CheckSum32;\r
	60	BOOLEAN CorrectMicrocode;\r
	61	VOID *MicrocodeData;\r
	62	MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr;\r
2a089134	63	UINT32 ProcessorFlags;\r
f63a3e28	64	UINT32 ThreadId;\r
94f63c76	65	\r
1e3f7a37	66	if (CpuMpData->MicrocodePatchRegionSize == 0) {\r
94f63c76 JF	67	//\r
	68	// There is no microcode patches\r
	69	//\r
	70	return;\r
	71	}\r
	72	\r
	73	CurrentRevision = GetCurrentMicrocodeSignature ();\r
2a089134	74	if (CurrentRevision != 0 && !IsBspCallIn) {\r
94f63c76 JF	75	//\r
	76	// Skip loading microcode if it has been loaded successfully\r
	77	//\r
	78	return;\r
	79	}\r
	80	\r
f63a3e28 ED	81	GetProcessorLocationByApicId (GetInitialApicId (), NULL, NULL, &ThreadId);\r
	82	if (ThreadId != 0) {\r
	83	//\r
	84	// Skip loading microcode if it is not the first thread in one core.\r
	85	//\r
	86	return;\r
	87	}\r
	88	\r
94f63c76 JF	89	ExtendedTableLength = 0;\r
	90	//\r
	91	// Here data of CPUID leafs have not been collected into context buffer, so\r
3e5c6c07	92	// GetProcessorCpuid() cannot be used here to retrieve CPUID data.\r
94f63c76 JF	93	//\r
	94	AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, NULL, NULL);\r
	95	\r
	96	//\r
	97	// The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID\r
	98	//\r
	99	PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);\r
	100	PlatformId = (UINT8) PlatformIdMsr.Bits.PlatformId;\r
	101	\r
2a089134 ED	102	//\r
	103	// Check whether AP has same processor with BSP.\r
	104	// If yes, direct use microcode info saved by BSP.\r
	105	//\r
	106	if (!IsBspCallIn) {\r
	107	if ((CpuMpData->ProcessorSignature == Eax.Uint32) &&\r
	108	(CpuMpData->ProcessorFlags & (1 << PlatformId)) != 0) {\r
	109	MicrocodeData = (VOID *)(UINTN) CpuMpData->MicrocodeDataAddress;\r
	110	LatestRevision = CpuMpData->MicrocodeRevision;\r
	111	goto Done;\r
	112	}\r
	113	}\r
	114	\r
94f63c76	115	LatestRevision = 0;\r
8cce3c9a	116	MicrocodeData = NULL;\r
1e3f7a37 ED	117	MicrocodeEnd = (UINTN) (CpuMpData->MicrocodePatchAddress + CpuMpData->MicrocodePatchRegionSize);\r
1e3f7a37 ED	118	MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) CpuMpData->MicrocodePatchAddress;\r
94f63c76 JF	119	do {\r
	120	//\r
	121	// Check if the microcode is for the Cpu and the version is newer\r
	122	// and the update can be processed on the platform\r
	123	//\r
	124	CorrectMicrocode = FALSE;\r
	125	if (MicrocodeEntryPoint->HeaderVersion == 0x1) {\r
	126	//\r
	127	// It is the microcode header. It is not the padding data between microcode patches\r
	128	// because the padding data should not include 0x00000001 and it should be the repeated\r
	129	// byte format (like 0xXYXYXYXY....).\r
	130	//\r
	131	if (MicrocodeEntryPoint->ProcessorSignature.Uint32 == Eax.Uint32 &&\r
	132	MicrocodeEntryPoint->UpdateRevision > LatestRevision &&\r
	133	(MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))\r
	134	) {\r
	135	if (MicrocodeEntryPoint->DataSize == 0) {\r
	136	CheckSum32 = CalculateSum32 ((UINT32 *) MicrocodeEntryPoint, 2048);\r
	137	} else {\r
	138	CheckSum32 = CalculateSum32 (\r
	139	(UINT32 *) MicrocodeEntryPoint,\r
	140	MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER)\r
	141	);\r
	142	}\r
	143	if (CheckSum32 == 0) {\r
	144	CorrectMicrocode = TRUE;\r
2a089134	145	ProcessorFlags = MicrocodeEntryPoint->ProcessorFlags;\r
94f63c76 JF	146	}\r
	147	} else if ((MicrocodeEntryPoint->DataSize != 0) &&\r
	148	(MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {\r
	149	ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize +\r
	150	sizeof (CPU_MICROCODE_HEADER));\r
	151	if (ExtendedTableLength != 0) {\r
	152	//\r
	153	// Extended Table exist, check if the CPU in support list\r
	154	//\r
	155	ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER ) ((UINT8 ) (MicrocodeEntryPoint)\r
	156	+ MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER));\r
	157	//\r
	158	// Calculate Extended Checksum\r
	159	//\r
	160	if ((ExtendedTableLength % 4) == 0) {\r
	161	CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTableHeader, ExtendedTableLength);\r
	162	if (CheckSum32 == 0) {\r
	163	//\r
	164	// Checksum correct\r
	165	//\r
	166	ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;\r
	167	ExtendedTable = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);\r
	168	for (Index = 0; Index < ExtendedTableCount; Index ++) {\r
	169	CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTable, sizeof(CPU_MICROCODE_EXTENDED_TABLE));\r
	170	if (CheckSum32 == 0) {\r
	171	//\r
	172	// Verify Header\r
	173	//\r
	174	if ((ExtendedTable->ProcessorSignature.Uint32 == Eax.Uint32) &&\r
	175	(ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {\r
	176	//\r
	177	// Find one\r
	178	//\r
	179	CorrectMicrocode = TRUE;\r
2a089134	180	ProcessorFlags = ExtendedTable->ProcessorFlag;\r
94f63c76 JF	181	break;\r
	182	}\r
	183	}\r
	184	ExtendedTable ++;\r
	185	}\r
	186	}\r
	187	}\r
	188	}\r
	189	}\r
	190	} else {\r
	191	//\r
	192	// It is the padding data between the microcode patches for microcode patches alignment.\r
	193	// Because the microcode patch is the multiple of 1-KByte, the padding data should not\r
	194	// exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode\r
	195	// alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to\r
	196	// find the next possible microcode patch header.\r
	197	//\r
	198	MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);\r
	199	continue;\r
	200	}\r
	201	//\r
	202	// Get the next patch.\r
	203	//\r
	204	if (MicrocodeEntryPoint->DataSize == 0) {\r
	205	TotalSize = 2048;\r
	206	} else {\r
	207	TotalSize = MicrocodeEntryPoint->TotalSize;\r
	208	}\r
	209	\r
	210	if (CorrectMicrocode) {\r
	211	LatestRevision = MicrocodeEntryPoint->UpdateRevision;\r
	212	MicrocodeData = (VOID *) ((UINTN) MicrocodeEntryPoint + sizeof (CPU_MICROCODE_HEADER));\r
	213	}\r
	214	\r
	215	MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);\r
	216	} while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));\r
	217	\r
2a089134	218	Done:\r
94f63c76 JF	219	if (LatestRevision > CurrentRevision) {\r
	220	//\r
	221	// BIOS only authenticate updates that contain a numerically larger revision\r
	222	// than the currently loaded revision, where Current Signature < New Update\r
	223	// Revision. A processor with no loaded update is considered to have a\r
	224	// revision equal to zero.\r
	225	//\r
8cce3c9a	226	ASSERT (MicrocodeData != NULL);\r
94f63c76 JF	227	AsmWriteMsr64 (\r
	228	MSR_IA32_BIOS_UPDT_TRIG,\r
	229	(UINT64) (UINTN) MicrocodeData\r
	230	);\r
	231	//\r
	232	// Get and check new microcode signature\r
	233	//\r
	234	CurrentRevision = GetCurrentMicrocodeSignature ();\r
	235	if (CurrentRevision != LatestRevision) {\r
	236	AcquireSpinLock(&CpuMpData->MpLock);\r
	237	DEBUG ((EFI_D_ERROR, "Updated microcode signature [0x%08x] does not match \\r
	238	loaded microcode signature [0x%08x]\n", CurrentRevision, LatestRevision));\r
	239	ReleaseSpinLock(&CpuMpData->MpLock);\r
	240	}\r
	241	}\r
2a089134 ED	242	\r
	243	if (IsBspCallIn && (LatestRevision != 0)) {\r
	244	//\r
	245	// Save BSP processor info and microcode info for later AP use.\r
	246	//\r
	247	CpuMpData->ProcessorSignature = Eax.Uint32;\r
	248	CpuMpData->ProcessorFlags = ProcessorFlags;\r
	249	CpuMpData->MicrocodeDataAddress = (UINTN) MicrocodeData;\r
	250	CpuMpData->MicrocodeRevision = LatestRevision;\r
	251	DEBUG ((DEBUG_INFO, "BSP Microcode:: signature [0x%08x], ProcessorFlags [0x%08x], \\r
	252	MicroData [0x%08x], Revision [0x%08x]\n", Eax.Uint32, ProcessorFlags, (UINTN) MicrocodeData, LatestRevision));\r
	253	}\r
94f63c76	254	}\r