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1/** @file\r
2 Implementation of loading microcode on processors.\r
3\r
08a475df 4 Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved.<BR>\r
0acd8697 5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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6\r
7**/\r
8\r
9#include "MpLib.h"\r
10\r
11/**\r
12 Get microcode update signature of currently loaded microcode update.\r
13\r
14 @return Microcode signature.\r
15**/\r
16UINT32\r
17GetCurrentMicrocodeSignature (\r
18 VOID\r
19 )\r
20{\r
21 MSR_IA32_BIOS_SIGN_ID_REGISTER BiosSignIdMsr;\r
22\r
23 AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);\r
24 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);\r
25 BiosSignIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID);\r
26 return BiosSignIdMsr.Bits.MicrocodeUpdateSignature;\r
27}\r
28\r
29/**\r
30 Detect whether specified processor can find matching microcode patch and load it.\r
31\r
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32 Microcode Payload as the following format:\r
33 +----------------------------------------+------------------+\r
34 | CPU_MICROCODE_HEADER | |\r
35 +----------------------------------------+ CheckSum Part1 |\r
36 | Microcode Binary | |\r
37 +----------------------------------------+------------------+\r
38 | CPU_MICROCODE_EXTENDED_TABLE_HEADER | |\r
39 +----------------------------------------+ CheckSum Part2 |\r
40 | CPU_MICROCODE_EXTENDED_TABLE | |\r
41 | ... | |\r
42 +----------------------------------------+------------------+\r
43\r
44 There may by multiple CPU_MICROCODE_EXTENDED_TABLE in this format.\r
45 The count of CPU_MICROCODE_EXTENDED_TABLE is indicated by ExtendedSignatureCount\r
46 of CPU_MICROCODE_EXTENDED_TABLE_HEADER structure.\r
47\r
48 When we are trying to verify the CheckSum32 with extended table.\r
49 We should use the fields of exnteded table to replace the corresponding\r
50 fields in CPU_MICROCODE_HEADER structure, and recalculate the\r
51 CheckSum32 with CPU_MICROCODE_HEADER + Microcode Binary. We named\r
52 it as CheckSum Part3.\r
53\r
54 The CheckSum Part2 is used to verify the CPU_MICROCODE_EXTENDED_TABLE_HEADER\r
55 and CPU_MICROCODE_EXTENDED_TABLE parts. We should make sure CheckSum Part2\r
56 is correct before we are going to verify each CPU_MICROCODE_EXTENDED_TABLE.\r
57\r
58 Only ProcessorSignature, ProcessorFlag and CheckSum are different between\r
59 CheckSum Part1 and CheckSum Part3. To avoid multiple computing CheckSum Part3.\r
60 Save an in-complete CheckSum32 from CheckSum Part1 for common parts.\r
61 When we are going to calculate CheckSum32, just should use the corresponding part\r
62 of the ProcessorSignature, ProcessorFlag and CheckSum with in-complete CheckSum32.\r
63\r
64 Notes: CheckSum32 is not a strong verification.\r
65 It does not guarantee that the data has not been modified.\r
66 CPU has its own mechanism to verify Microcode Binary part.\r
67\r
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68 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
69 @param[in] ProcessorNumber The handle number of the processor. The range is\r
70 from 0 to the total number of logical processors\r
71 minus 1.\r
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72**/\r
73VOID\r
74MicrocodeDetect (\r
2a089134 75 IN CPU_MP_DATA *CpuMpData,\r
e1ed5573 76 IN UINTN ProcessorNumber\r
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77 )\r
78{\r
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79 UINT32 ExtendedTableLength;\r
80 UINT32 ExtendedTableCount;\r
81 CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;\r
82 CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;\r
83 CPU_MICROCODE_HEADER *MicrocodeEntryPoint;\r
84 UINTN MicrocodeEnd;\r
85 UINTN Index;\r
86 UINT8 PlatformId;\r
87 CPUID_VERSION_INFO_EAX Eax;\r
fd30b007 88 CPU_AP_DATA *CpuData;\r
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89 UINT32 CurrentRevision;\r
90 UINT32 LatestRevision;\r
91 UINTN TotalSize;\r
92 UINT32 CheckSum32;\r
b6f67b4d 93 UINT32 InCompleteCheckSum32;\r
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94 BOOLEAN CorrectMicrocode;\r
95 VOID *MicrocodeData;\r
f63a3e28 96 UINT32 ThreadId;\r
e1ed5573 97 BOOLEAN IsBspCallIn;\r
94f63c76 98\r
1e3f7a37 99 if (CpuMpData->MicrocodePatchRegionSize == 0) {\r
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100 //\r
101 // There is no microcode patches\r
102 //\r
103 return;\r
104 }\r
105\r
106 CurrentRevision = GetCurrentMicrocodeSignature ();\r
e1ed5573 107 IsBspCallIn = (ProcessorNumber == (UINTN)CpuMpData->BspNumber) ? TRUE : FALSE;\r
94f63c76 108\r
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109 GetProcessorLocationByApicId (GetInitialApicId (), NULL, NULL, &ThreadId);\r
110 if (ThreadId != 0) {\r
111 //\r
112 // Skip loading microcode if it is not the first thread in one core.\r
113 //\r
114 return;\r
115 }\r
116\r
94f63c76 117 ExtendedTableLength = 0;\r
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118 Eax.Uint32 = CpuMpData->CpuData[ProcessorNumber].ProcessorSignature;\r
119 PlatformId = CpuMpData->CpuData[ProcessorNumber].PlatformId;\r
94f63c76 120\r
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121 //\r
122 // Check whether AP has same processor with BSP.\r
123 // If yes, direct use microcode info saved by BSP.\r
124 //\r
125 if (!IsBspCallIn) {\r
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HW
126 //\r
127 // Get the CPU data for BSP\r
128 //\r
129 CpuData = &(CpuMpData->CpuData[CpuMpData->BspNumber]);\r
130 if ((CpuData->ProcessorSignature == Eax.Uint32) &&\r
131 (CpuData->PlatformId == PlatformId) &&\r
132 (CpuData->MicrocodeEntryAddr != 0)) {\r
133 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *)(UINTN) CpuData->MicrocodeEntryAddr;\r
134 MicrocodeData = (VOID *) (MicrocodeEntryPoint + 1);\r
135 LatestRevision = MicrocodeEntryPoint->UpdateRevision;\r
136 goto Done;\r
2a089134
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137 }\r
138 }\r
139\r
94f63c76 140 LatestRevision = 0;\r
8cce3c9a 141 MicrocodeData = NULL;\r
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142 MicrocodeEnd = (UINTN) (CpuMpData->MicrocodePatchAddress + CpuMpData->MicrocodePatchRegionSize);\r
143 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) CpuMpData->MicrocodePatchAddress;\r
b6f67b4d 144\r
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145 do {\r
146 //\r
147 // Check if the microcode is for the Cpu and the version is newer\r
148 // and the update can be processed on the platform\r
149 //\r
150 CorrectMicrocode = FALSE;\r
c3947b54 151\r
c3947b54 152 if (MicrocodeEntryPoint->DataSize == 0) {\r
219e560c 153 TotalSize = sizeof (CPU_MICROCODE_HEADER) + 2000;\r
c3947b54 154 } else {\r
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155 TotalSize = sizeof (CPU_MICROCODE_HEADER) + MicrocodeEntryPoint->DataSize;\r
156 }\r
157\r
158 ///\r
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159 /// 0x0 MicrocodeBegin MicrocodeEntry MicrocodeEnd 0xffffffff\r
160 /// |--------------|---------------|---------------|---------------|\r
161 /// valid TotalSize\r
162 /// TotalSize is only valid between 0 and (MicrocodeEnd - MicrocodeEntry).\r
163 /// And it should be aligned with 4 bytes.\r
164 /// If the TotalSize is invalid, skip 1KB to check next entry.\r
219e560c 165 ///\r
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166 if ( (UINTN)MicrocodeEntryPoint > (MAX_ADDRESS - TotalSize) ||\r
167 ((UINTN)MicrocodeEntryPoint + TotalSize) > MicrocodeEnd ||\r
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CC
168 (TotalSize & 0x3) != 0\r
169 ) {\r
170 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);\r
171 continue;\r
c3947b54 172 }\r
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CC
173\r
174 //\r
175 // Save an in-complete CheckSum32 from CheckSum Part1 for common parts.\r
176 //\r
177 InCompleteCheckSum32 = CalculateSum32 (\r
178 (UINT32 *) MicrocodeEntryPoint,\r
179 TotalSize\r
180 );\r
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CC
181 InCompleteCheckSum32 -= MicrocodeEntryPoint->ProcessorSignature.Uint32;\r
182 InCompleteCheckSum32 -= MicrocodeEntryPoint->ProcessorFlags;\r
183 InCompleteCheckSum32 -= MicrocodeEntryPoint->Checksum;\r
184\r
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185 if (MicrocodeEntryPoint->HeaderVersion == 0x1) {\r
186 //\r
187 // It is the microcode header. It is not the padding data between microcode patches\r
188 // because the padding data should not include 0x00000001 and it should be the repeated\r
189 // byte format (like 0xXYXYXYXY....).\r
190 //\r
191 if (MicrocodeEntryPoint->ProcessorSignature.Uint32 == Eax.Uint32 &&\r
192 MicrocodeEntryPoint->UpdateRevision > LatestRevision &&\r
193 (MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))\r
194 ) {\r
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195 //\r
196 // Calculate CheckSum Part1.\r
197 //\r
198 CheckSum32 = InCompleteCheckSum32;\r
199 CheckSum32 += MicrocodeEntryPoint->ProcessorSignature.Uint32;\r
200 CheckSum32 += MicrocodeEntryPoint->ProcessorFlags;\r
201 CheckSum32 += MicrocodeEntryPoint->Checksum;\r
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202 if (CheckSum32 == 0) {\r
203 CorrectMicrocode = TRUE;\r
204 }\r
205 } else if ((MicrocodeEntryPoint->DataSize != 0) &&\r
206 (MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {\r
207 ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize +\r
208 sizeof (CPU_MICROCODE_HEADER));\r
209 if (ExtendedTableLength != 0) {\r
210 //\r
211 // Extended Table exist, check if the CPU in support list\r
212 //\r
213 ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER *) ((UINT8 *) (MicrocodeEntryPoint)\r
214 + MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER));\r
215 //\r
216 // Calculate Extended Checksum\r
217 //\r
218 if ((ExtendedTableLength % 4) == 0) {\r
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219 //\r
220 // Calculate CheckSum Part2.\r
221 //\r
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222 CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTableHeader, ExtendedTableLength);\r
223 if (CheckSum32 == 0) {\r
224 //\r
225 // Checksum correct\r
226 //\r
227 ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;\r
228 ExtendedTable = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);\r
229 for (Index = 0; Index < ExtendedTableCount; Index ++) {\r
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230 //\r
231 // Calculate CheckSum Part3.\r
232 //\r
233 CheckSum32 = InCompleteCheckSum32;\r
234 CheckSum32 += ExtendedTable->ProcessorSignature.Uint32;\r
235 CheckSum32 += ExtendedTable->ProcessorFlag;\r
236 CheckSum32 += ExtendedTable->Checksum;\r
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237 if (CheckSum32 == 0) {\r
238 //\r
239 // Verify Header\r
240 //\r
241 if ((ExtendedTable->ProcessorSignature.Uint32 == Eax.Uint32) &&\r
242 (ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {\r
243 //\r
244 // Find one\r
245 //\r
246 CorrectMicrocode = TRUE;\r
247 break;\r
248 }\r
249 }\r
250 ExtendedTable ++;\r
251 }\r
252 }\r
253 }\r
254 }\r
255 }\r
256 } else {\r
257 //\r
258 // It is the padding data between the microcode patches for microcode patches alignment.\r
259 // Because the microcode patch is the multiple of 1-KByte, the padding data should not\r
260 // exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode\r
261 // alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to\r
262 // find the next possible microcode patch header.\r
263 //\r
264 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);\r
265 continue;\r
266 }\r
267 //\r
268 // Get the next patch.\r
269 //\r
270 if (MicrocodeEntryPoint->DataSize == 0) {\r
271 TotalSize = 2048;\r
272 } else {\r
273 TotalSize = MicrocodeEntryPoint->TotalSize;\r
274 }\r
275\r
276 if (CorrectMicrocode) {\r
277 LatestRevision = MicrocodeEntryPoint->UpdateRevision;\r
278 MicrocodeData = (VOID *) ((UINTN) MicrocodeEntryPoint + sizeof (CPU_MICROCODE_HEADER));\r
279 }\r
280\r
281 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);\r
282 } while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));\r
283\r
2a089134 284Done:\r
e1ed5573
HW
285 if (LatestRevision != 0) {\r
286 //\r
287 // Save the detected microcode patch entry address (including the\r
288 // microcode patch header) for each processor.\r
289 // It will be used when building the microcode patch cache HOB.\r
290 //\r
291 CpuMpData->CpuData[ProcessorNumber].MicrocodeEntryAddr =\r
292 (UINTN) MicrocodeData - sizeof (CPU_MICROCODE_HEADER);\r
293 }\r
294\r
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295 if (LatestRevision > CurrentRevision) {\r
296 //\r
297 // BIOS only authenticate updates that contain a numerically larger revision\r
298 // than the currently loaded revision, where Current Signature < New Update\r
299 // Revision. A processor with no loaded update is considered to have a\r
300 // revision equal to zero.\r
301 //\r
8cce3c9a 302 ASSERT (MicrocodeData != NULL);\r
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303 AsmWriteMsr64 (\r
304 MSR_IA32_BIOS_UPDT_TRIG,\r
305 (UINT64) (UINTN) MicrocodeData\r
306 );\r
307 //\r
308 // Get and check new microcode signature\r
309 //\r
310 CurrentRevision = GetCurrentMicrocodeSignature ();\r
311 if (CurrentRevision != LatestRevision) {\r
312 AcquireSpinLock(&CpuMpData->MpLock);\r
313 DEBUG ((EFI_D_ERROR, "Updated microcode signature [0x%08x] does not match \\r
314 loaded microcode signature [0x%08x]\n", CurrentRevision, LatestRevision));\r
315 ReleaseSpinLock(&CpuMpData->MpLock);\r
316 }\r
317 }\r
318}\r
d786a172
HW
319\r
320/**\r
321 Determine if a microcode patch will be loaded into memory.\r
322\r
323 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
324 @param[in] ProcessorSignature The processor signature field value\r
325 supported by a microcode patch.\r
326 @param[in] ProcessorFlags The prcessor flags field value supported by\r
327 a microcode patch.\r
328\r
329 @retval TRUE The specified microcode patch will be loaded.\r
330 @retval FALSE The specified microcode patch will not be loaded.\r
331**/\r
332BOOLEAN\r
333IsMicrocodePatchNeedLoad (\r
334 IN CPU_MP_DATA *CpuMpData,\r
335 IN UINT32 ProcessorSignature,\r
336 IN UINT32 ProcessorFlags\r
337 )\r
338{\r
339 UINTN Index;\r
340 CPU_AP_DATA *CpuData;\r
341\r
342 for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
343 CpuData = &CpuMpData->CpuData[Index];\r
344 if ((ProcessorSignature == CpuData->ProcessorSignature) &&\r
345 (ProcessorFlags & (1 << CpuData->PlatformId)) != 0) {\r
346 return TRUE;\r
347 }\r
348 }\r
349\r
350 return FALSE;\r
351}\r
352\r
353/**\r
354 Actual worker function that loads the required microcode patches into memory.\r
355\r
356 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
357 @param[in] Patches The pointer to an array of information on\r
358 the microcode patches that will be loaded\r
359 into memory.\r
360 @param[in] PatchCount The number of microcode patches that will\r
361 be loaded into memory.\r
362 @param[in] TotalLoadSize The total size of all the microcode patches\r
363 to be loaded.\r
364**/\r
365VOID\r
366LoadMicrocodePatchWorker (\r
367 IN OUT CPU_MP_DATA *CpuMpData,\r
368 IN MICROCODE_PATCH_INFO *Patches,\r
369 IN UINTN PatchCount,\r
370 IN UINTN TotalLoadSize\r
371 )\r
372{\r
373 UINTN Index;\r
374 VOID *MicrocodePatchInRam;\r
375 UINT8 *Walker;\r
376\r
377 ASSERT ((Patches != NULL) && (PatchCount != 0));\r
378\r
379 MicrocodePatchInRam = AllocatePages (EFI_SIZE_TO_PAGES (TotalLoadSize));\r
380 if (MicrocodePatchInRam == NULL) {\r
381 return;\r
382 }\r
383\r
384 //\r
385 // Load all the required microcode patches into memory\r
386 //\r
387 for (Walker = MicrocodePatchInRam, Index = 0; Index < PatchCount; Index++) {\r
388 CopyMem (\r
389 Walker,\r
390 (VOID *) Patches[Index].Address,\r
391 Patches[Index].Size\r
392 );\r
393\r
08a475df 394 Walker += Patches[Index].Size;\r
d786a172
HW
395 }\r
396\r
397 //\r
398 // Update the microcode patch related fields in CpuMpData\r
399 //\r
400 CpuMpData->MicrocodePatchAddress = (UINTN) MicrocodePatchInRam;\r
401 CpuMpData->MicrocodePatchRegionSize = TotalLoadSize;\r
402\r
403 DEBUG ((\r
404 DEBUG_INFO,\r
405 "%a: Required microcode patches have been loaded at 0x%lx, with size 0x%lx.\n",\r
406 __FUNCTION__, CpuMpData->MicrocodePatchAddress, CpuMpData->MicrocodePatchRegionSize\r
407 ));\r
408\r
409 return;\r
410}\r
411\r
412/**\r
413 Load the required microcode patches data into memory.\r
414\r
415 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
416**/\r
417VOID\r
418LoadMicrocodePatch (\r
419 IN OUT CPU_MP_DATA *CpuMpData\r
420 )\r
421{\r
422 CPU_MICROCODE_HEADER *MicrocodeEntryPoint;\r
423 UINTN MicrocodeEnd;\r
424 UINTN DataSize;\r
425 UINTN TotalSize;\r
426 CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;\r
427 UINT32 ExtendedTableCount;\r
428 CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;\r
429 MICROCODE_PATCH_INFO *PatchInfoBuffer;\r
430 UINTN MaxPatchNumber;\r
431 UINTN PatchCount;\r
432 UINTN TotalLoadSize;\r
433 UINTN Index;\r
434 BOOLEAN NeedLoad;\r
435\r
436 //\r
437 // Initialize the microcode patch related fields in CpuMpData as the values\r
438 // specified by the PCD pair. If the microcode patches are loaded into memory,\r
439 // these fields will be updated.\r
440 //\r
441 CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);\r
442 CpuMpData->MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);\r
443\r
444 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) CpuMpData->MicrocodePatchAddress;\r
445 MicrocodeEnd = (UINTN) MicrocodeEntryPoint +\r
446 (UINTN) CpuMpData->MicrocodePatchRegionSize;\r
447 if ((MicrocodeEntryPoint == NULL) || ((UINTN) MicrocodeEntryPoint == MicrocodeEnd)) {\r
448 //\r
449 // There is no microcode patches\r
450 //\r
451 return;\r
452 }\r
453\r
454 PatchCount = 0;\r
455 MaxPatchNumber = DEFAULT_MAX_MICROCODE_PATCH_NUM;\r
456 TotalLoadSize = 0;\r
457 PatchInfoBuffer = AllocatePool (MaxPatchNumber * sizeof (MICROCODE_PATCH_INFO));\r
458 if (PatchInfoBuffer == NULL) {\r
459 return;\r
460 }\r
461\r
462 //\r
463 // Process the header of each microcode patch within the region.\r
464 // The purpose is to decide which microcode patch(es) will be loaded into memory.\r
465 //\r
466 do {\r
467 if (MicrocodeEntryPoint->HeaderVersion != 0x1) {\r
468 //\r
469 // Padding data between the microcode patches, skip 1KB to check next entry.\r
470 //\r
471 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);\r
472 continue;\r
473 }\r
474\r
475 DataSize = MicrocodeEntryPoint->DataSize;\r
476 TotalSize = (DataSize == 0) ? 2048 : MicrocodeEntryPoint->TotalSize;\r
477 if ( (UINTN)MicrocodeEntryPoint > (MAX_ADDRESS - TotalSize) ||\r
478 ((UINTN)MicrocodeEntryPoint + TotalSize) > MicrocodeEnd ||\r
479 (DataSize & 0x3) != 0 ||\r
480 (TotalSize & (SIZE_1KB - 1)) != 0 ||\r
481 TotalSize < DataSize\r
482 ) {\r
483 //\r
484 // Not a valid microcode header, skip 1KB to check next entry.\r
485 //\r
486 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);\r
487 continue;\r
488 }\r
489\r
490 //\r
491 // Check the 'ProcessorSignature' and 'ProcessorFlags' of the microcode\r
492 // patch header with the CPUID and PlatformID of the processors within\r
493 // system to decide if it will be copied into memory\r
494 //\r
495 NeedLoad = IsMicrocodePatchNeedLoad (\r
496 CpuMpData,\r
497 MicrocodeEntryPoint->ProcessorSignature.Uint32,\r
498 MicrocodeEntryPoint->ProcessorFlags\r
499 );\r
500\r
501 //\r
502 // If the Extended Signature Table exists, check if the processor is in the\r
503 // support list\r
504 //\r
505 if ((!NeedLoad) && (DataSize != 0) &&\r
506 (TotalSize - DataSize > sizeof (CPU_MICROCODE_HEADER) +\r
507 sizeof (CPU_MICROCODE_EXTENDED_TABLE_HEADER))) {\r
508 ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER *) ((UINT8 *) (MicrocodeEntryPoint)\r
509 + DataSize + sizeof (CPU_MICROCODE_HEADER));\r
510 ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;\r
511 ExtendedTable = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);\r
512\r
513 for (Index = 0; Index < ExtendedTableCount; Index ++) {\r
514 //\r
515 // Avoid access content beyond MicrocodeEnd\r
516 //\r
517 if ((UINTN) ExtendedTable > MicrocodeEnd - sizeof (CPU_MICROCODE_EXTENDED_TABLE)) {\r
518 break;\r
519 }\r
520\r
521 //\r
522 // Check the 'ProcessorSignature' and 'ProcessorFlag' of the Extended\r
523 // Signature Table entry with the CPUID and PlatformID of the processors\r
524 // within system to decide if it will be copied into memory\r
525 //\r
526 NeedLoad = IsMicrocodePatchNeedLoad (\r
527 CpuMpData,\r
528 ExtendedTable->ProcessorSignature.Uint32,\r
529 ExtendedTable->ProcessorFlag\r
530 );\r
531 if (NeedLoad) {\r
532 break;\r
533 }\r
534 ExtendedTable ++;\r
535 }\r
536 }\r
537\r
538 if (NeedLoad) {\r
539 PatchCount++;\r
540 if (PatchCount > MaxPatchNumber) {\r
541 //\r
542 // Current 'PatchInfoBuffer' cannot hold the information, double the size\r
543 // and allocate a new buffer.\r
544 //\r
545 if (MaxPatchNumber > MAX_UINTN / 2 / sizeof (MICROCODE_PATCH_INFO)) {\r
546 //\r
547 // Overflow check for MaxPatchNumber\r
548 //\r
549 goto OnExit;\r
550 }\r
551\r
552 PatchInfoBuffer = ReallocatePool (\r
553 MaxPatchNumber * sizeof (MICROCODE_PATCH_INFO),\r
554 2 * MaxPatchNumber * sizeof (MICROCODE_PATCH_INFO),\r
555 PatchInfoBuffer\r
556 );\r
557 if (PatchInfoBuffer == NULL) {\r
558 goto OnExit;\r
559 }\r
560 MaxPatchNumber = MaxPatchNumber * 2;\r
561 }\r
562\r
563 //\r
564 // Store the information of this microcode patch\r
565 //\r
08a475df
SF
566 PatchInfoBuffer[PatchCount - 1].Address = (UINTN) MicrocodeEntryPoint;\r
567 PatchInfoBuffer[PatchCount - 1].Size = TotalSize;\r
568 TotalLoadSize += TotalSize;\r
d786a172
HW
569 }\r
570\r
571 //\r
572 // Process the next microcode patch\r
573 //\r
574 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);\r
575 } while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));\r
576\r
577 if (PatchCount != 0) {\r
578 DEBUG ((\r
579 DEBUG_INFO,\r
580 "%a: 0x%x microcode patches will be loaded into memory, with size 0x%x.\n",\r
581 __FUNCTION__, PatchCount, TotalLoadSize\r
582 ));\r
583\r
584 LoadMicrocodePatchWorker (CpuMpData, PatchInfoBuffer, PatchCount, TotalLoadSize);\r
585 }\r
586\r
587OnExit:\r
588 if (PatchInfoBuffer != NULL) {\r
589 FreePool (PatchInfoBuffer);\r
590 }\r
591 return;\r
592}\r