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3e8ad6bd JF |
1 | /** @file\r |
2 | Common header file for MP Initialize Library.\r | |
3 | \r | |
4 | Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r | |
5 | This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef _MP_LIB_H_\r | |
16 | #define _MP_LIB_H_\r | |
17 | \r | |
18 | #include <PiPei.h>\r | |
19 | \r | |
20 | #include <Register/Cpuid.h>\r | |
21 | #include <Register/Msr.h>\r | |
22 | #include <Register/LocalApic.h>\r | |
23 | #include <Register/Microcode.h>\r | |
24 | \r | |
25 | #include <Library/MpInitLib.h>\r | |
26 | #include <Library/BaseLib.h>\r | |
27 | #include <Library/BaseMemoryLib.h>\r | |
28 | #include <Library/MemoryAllocationLib.h>\r | |
29 | #include <Library/DebugLib.h>\r | |
30 | #include <Library/LocalApicLib.h>\r | |
31 | #include <Library/CpuLib.h>\r | |
32 | #include <Library/UefiCpuLib.h>\r | |
33 | #include <Library/TimerLib.h>\r | |
34 | #include <Library/SynchronizationLib.h>\r | |
35 | #include <Library/MtrrLib.h>\r | |
36 | #include <Library/HobLib.h>\r | |
37 | \r | |
9ebcf0f4 JF |
38 | //\r |
39 | // AP loop state when APs are in idle state\r | |
40 | // It's value is the same with PcdCpuApLoopMode\r | |
41 | //\r | |
42 | typedef enum {\r | |
43 | ApInHltLoop = 1,\r | |
44 | ApInMwaitLoop = 2,\r | |
45 | ApInRunLoop = 3\r | |
46 | } AP_LOOP_MODE;\r | |
47 | \r | |
e59f8f6b JF |
48 | //\r |
49 | // AP initialization state during APs wakeup\r | |
50 | //\r | |
51 | typedef enum {\r | |
52 | ApInitConfig = 1,\r | |
53 | ApInitReconfig = 2,\r | |
54 | ApInitDone = 3\r | |
55 | } AP_INIT_STATE;\r | |
56 | \r | |
03a1a925 JF |
57 | //\r |
58 | // AP state\r | |
59 | //\r | |
60 | typedef enum {\r | |
61 | CpuStateIdle,\r | |
62 | CpuStateReady,\r | |
63 | CpuStateBusy,\r | |
64 | CpuStateFinished,\r | |
65 | CpuStateDisabled\r | |
66 | } CPU_STATE;\r | |
67 | \r | |
68cb9330 JF |
68 | //\r |
69 | // CPU volatile registers around INIT-SIPI-SIPI\r | |
70 | //\r | |
71 | typedef struct {\r | |
72 | UINTN Cr0;\r | |
73 | UINTN Cr3;\r | |
74 | UINTN Cr4;\r | |
75 | UINTN Dr0;\r | |
76 | UINTN Dr1;\r | |
77 | UINTN Dr2;\r | |
78 | UINTN Dr3;\r | |
79 | UINTN Dr6;\r | |
80 | UINTN Dr7;\r | |
81 | } CPU_VOLATILE_REGISTERS;\r | |
82 | \r | |
e59f8f6b JF |
83 | //\r |
84 | // AP related data\r | |
85 | //\r | |
86 | typedef struct {\r | |
87 | SPIN_LOCK ApLock;\r | |
88 | volatile UINT32 *StartupApSignal;\r | |
89 | volatile UINTN ApFunction;\r | |
90 | volatile UINTN ApFunctionArgument;\r | |
91 | UINT32 InitialApicId;\r | |
92 | UINT32 ApicId;\r | |
93 | UINT32 Health;\r | |
94 | BOOLEAN CpuHealthy;\r | |
03a1a925 | 95 | volatile CPU_STATE State;\r |
68cb9330 | 96 | CPU_VOLATILE_REGISTERS VolatileRegisters;\r |
e59f8f6b JF |
97 | BOOLEAN Waiting;\r |
98 | BOOLEAN *Finished;\r | |
99 | UINT64 ExpectedTime;\r | |
100 | UINT64 CurrentTime;\r | |
101 | UINT64 TotalTime;\r | |
102 | EFI_EVENT WaitEvent;\r | |
103 | } CPU_AP_DATA;\r | |
104 | \r | |
105 | //\r | |
106 | // Basic CPU information saved in Guided HOB.\r | |
107 | // Because the contents will be shard between PEI and DXE,\r | |
108 | // we need to make sure the each fields offset same in different\r | |
109 | // architecture.\r | |
110 | //\r | |
111 | typedef struct {\r | |
112 | UINT32 InitialApicId;\r | |
113 | UINT32 ApicId;\r | |
114 | UINT32 Health;\r | |
115 | } CPU_INFO_IN_HOB;\r | |
116 | \r | |
f7f85d83 JF |
117 | //\r |
118 | // AP reset code information including code address and size,\r | |
119 | // this structure will be shared be C code and assembly code.\r | |
120 | // It is natural aligned by design.\r | |
121 | //\r | |
122 | typedef struct {\r | |
123 | UINT8 *RendezvousFunnelAddress;\r | |
124 | UINTN ModeEntryOffset;\r | |
125 | UINTN RendezvousFunnelSize;\r | |
126 | UINT8 *RelocateApLoopFuncAddress;\r | |
127 | UINTN RelocateApLoopFuncSize;\r | |
128 | } MP_ASSEMBLY_ADDRESS_MAP;\r | |
3e8ad6bd | 129 | \r |
e59f8f6b JF |
130 | typedef struct _CPU_MP_DATA CPU_MP_DATA;\r |
131 | \r | |
d94e5f67 JF |
132 | #pragma pack(1)\r |
133 | \r | |
134 | //\r | |
135 | // MP CPU exchange information for AP reset code\r | |
136 | // This structure is required to be packed because fixed field offsets\r | |
137 | // into this structure are used in assembly code in this module\r | |
138 | //\r | |
139 | typedef struct {\r | |
140 | UINTN Lock;\r | |
141 | UINTN StackStart;\r | |
142 | UINTN StackSize;\r | |
143 | UINTN CFunction;\r | |
144 | IA32_DESCRIPTOR GdtrProfile;\r | |
145 | IA32_DESCRIPTOR IdtrProfile;\r | |
146 | UINTN BufferStart;\r | |
147 | UINTN ModeOffset;\r | |
148 | UINTN NumApsExecuting;\r | |
149 | UINTN CodeSegment;\r | |
150 | UINTN DataSegment;\r | |
5c66d125 | 151 | UINTN EnableExecuteDisable;\r |
d94e5f67 | 152 | UINTN Cr3;\r |
e59f8f6b | 153 | CPU_MP_DATA *CpuMpData;\r |
d94e5f67 JF |
154 | } MP_CPU_EXCHANGE_INFO;\r |
155 | \r | |
156 | #pragma pack()\r | |
e59f8f6b JF |
157 | \r |
158 | //\r | |
159 | // CPU MP Data save in memory\r | |
160 | //\r | |
161 | struct _CPU_MP_DATA {\r | |
162 | UINT64 CpuInfoInHob;\r | |
163 | UINT32 CpuCount;\r | |
164 | UINT32 BspNumber;\r | |
165 | //\r | |
166 | // The above fields data will be passed from PEI to DXE\r | |
167 | // Please make sure the fields offset same in the different\r | |
168 | // architecture.\r | |
169 | //\r | |
170 | SPIN_LOCK MpLock;\r | |
171 | UINTN Buffer;\r | |
172 | UINTN CpuApStackSize;\r | |
173 | MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r | |
174 | UINTN WakeupBuffer;\r | |
175 | UINTN BackupBuffer;\r | |
176 | UINTN BackupBufferSize;\r | |
177 | BOOLEAN EndOfPeiFlag;\r | |
178 | \r | |
179 | volatile UINT32 StartCount;\r | |
180 | volatile UINT32 FinishedCount;\r | |
181 | volatile UINT32 RunningCount;\r | |
182 | BOOLEAN SingleThread;\r | |
183 | EFI_AP_PROCEDURE Procedure;\r | |
184 | VOID *ProcArguments;\r | |
185 | BOOLEAN *Finished;\r | |
186 | UINT64 ExpectedTime;\r | |
187 | UINT64 CurrentTime;\r | |
188 | UINT64 TotalTime;\r | |
189 | EFI_EVENT WaitEvent;\r | |
190 | UINTN **FailedCpuList;\r | |
191 | \r | |
192 | AP_INIT_STATE InitFlag;\r | |
193 | BOOLEAN X2ApicEnable;\r | |
194 | MTRR_SETTINGS MtrrTable;\r | |
195 | UINT8 ApLoopMode;\r | |
196 | UINT8 ApTargetCState;\r | |
197 | UINT16 PmCodeSegment;\r | |
198 | CPU_AP_DATA *CpuData;\r | |
199 | volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r | |
200 | };\r | |
76157021 JF |
201 | /**\r |
202 | Assembly code to place AP into safe loop mode.\r | |
203 | \r | |
204 | Place AP into targeted C-State if MONITOR is supported, otherwise\r | |
205 | place AP into hlt state.\r | |
206 | Place AP in protected mode if the current is long mode. Due to AP maybe\r | |
207 | wakeup by some hardware event. It could avoid accessing page table that\r | |
208 | may not available during booting to OS.\r | |
209 | \r | |
210 | @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r | |
211 | FALSE indicates MONITOR is not supported.\r | |
212 | @param[in] ApTargetCState Target C-State value.\r | |
213 | @param[in] PmCodeSegment Protected mode code segment value.\r | |
214 | **/\r | |
215 | typedef\r | |
216 | VOID\r | |
217 | (EFIAPI * ASM_RELOCATE_AP_LOOP) (\r | |
218 | IN BOOLEAN MwaitSupport,\r | |
219 | IN UINTN ApTargetCState,\r | |
220 | IN UINTN PmCodeSegment\r | |
221 | );\r | |
f7f85d83 JF |
222 | \r |
223 | /**\r | |
224 | Assembly code to get starting address and size of the rendezvous entry for APs.\r | |
225 | Information for fixing a jump instruction in the code is also returned.\r | |
226 | \r | |
227 | @param[out] AddressMap Output buffer for address map information.\r | |
228 | **/\r | |
229 | VOID\r | |
230 | EFIAPI\r | |
231 | AsmGetAddressMap (\r | |
232 | OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r | |
233 | );\r | |
234 | \r | |
94f63c76 JF |
235 | /**\r |
236 | Detect whether specified processor can find matching microcode patch and load it.\r | |
237 | \r | |
238 | @param[in] PeiCpuMpData Pointer to PEI CPU MP Data\r | |
239 | **/\r | |
240 | VOID\r | |
241 | MicrocodeDetect (\r | |
242 | IN CPU_MP_DATA *CpuMpData\r | |
243 | );\r | |
244 | \r | |
3e8ad6bd JF |
245 | #endif\r |
246 | \r |