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3e8ad6bd JF |
1 | /** @file\r |
2 | Common header file for MP Initialize Library.\r | |
3 | \r | |
0c3f8766 | 4 | Copyright (c) 2016 - 2023, Intel Corporation. All rights reserved.<BR>\r |
4c0f6e34 LD |
5 | Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r |
6 | \r | |
0acd8697 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
3e8ad6bd JF |
8 | \r |
9 | **/\r | |
10 | \r | |
11 | #ifndef _MP_LIB_H_\r | |
12 | #define _MP_LIB_H_\r | |
13 | \r | |
14 | #include <PiPei.h>\r | |
15 | \r | |
01acb06c | 16 | #include <Register/Intel/Cpuid.h>\r |
4c0f6e34 | 17 | #include <Register/Amd/Cpuid.h>\r |
06544455 | 18 | #include <Register/Amd/Ghcb.h>\r |
01acb06c RN |
19 | #include <Register/Intel/Msr.h>\r |
20 | #include <Register/Intel/LocalApic.h>\r | |
21 | #include <Register/Intel/Microcode.h>\r | |
3e8ad6bd JF |
22 | \r |
23 | #include <Library/MpInitLib.h>\r | |
24 | #include <Library/BaseLib.h>\r | |
25 | #include <Library/BaseMemoryLib.h>\r | |
26 | #include <Library/MemoryAllocationLib.h>\r | |
27 | #include <Library/DebugLib.h>\r | |
28 | #include <Library/LocalApicLib.h>\r | |
29 | #include <Library/CpuLib.h>\r | |
30 | #include <Library/UefiCpuLib.h>\r | |
31 | #include <Library/TimerLib.h>\r | |
32 | #include <Library/SynchronizationLib.h>\r | |
33 | #include <Library/MtrrLib.h>\r | |
34 | #include <Library/HobLib.h>\r | |
d5339c04 | 35 | #include <Library/PcdLib.h>\r |
bce03284 | 36 | #include <Library/MicrocodeLib.h>\r |
b95908e0 | 37 | #include <ConfidentialComputingGuestAttr.h>\r |
3e8ad6bd | 38 | \r |
e2289d19 BS |
39 | #include <Register/Amd/Fam17Msr.h>\r |
40 | #include <Register/Amd/Ghcb.h>\r | |
41 | \r | |
348a34d9 HW |
42 | #include <Guid/MicrocodePatchHob.h>\r |
43 | \r | |
053e878b | 44 | #define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r |
b8b04307 | 45 | \r |
93ca4c0f JF |
46 | #define CPU_INIT_MP_LIB_HOB_GUID \\r |
47 | { \\r | |
48 | 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r | |
49 | }\r | |
50 | \r | |
41be0da5 JF |
51 | //\r |
52 | // The MP data for switch BSP\r | |
53 | //\r | |
053e878b MK |
54 | #define CPU_SWITCH_STATE_IDLE 0\r |
55 | #define CPU_SWITCH_STATE_STORED 1\r | |
56 | #define CPU_SWITCH_STATE_LOADED 2\r | |
41be0da5 | 57 | \r |
d786a172 HW |
58 | //\r |
59 | // Default maximum number of entries to store the microcode patches information\r | |
60 | //\r | |
053e878b | 61 | #define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r |
d786a172 HW |
62 | \r |
63 | //\r | |
64 | // Data structure for microcode patch information\r | |
65 | //\r | |
66 | typedef struct {\r | |
67 | UINTN Address;\r | |
68 | UINTN Size;\r | |
d786a172 HW |
69 | } MICROCODE_PATCH_INFO;\r |
70 | \r | |
d1abb876 ZL |
71 | //\r |
72 | // CPU volatile registers around INIT-SIPI-SIPI\r | |
73 | //\r | |
74 | typedef struct {\r | |
75 | UINTN Cr0;\r | |
76 | UINTN Cr3;\r | |
77 | UINTN Cr4;\r | |
78 | UINTN Dr0;\r | |
79 | UINTN Dr1;\r | |
80 | UINTN Dr2;\r | |
81 | UINTN Dr3;\r | |
82 | UINTN Dr6;\r | |
83 | UINTN Dr7;\r | |
84 | IA32_DESCRIPTOR Gdtr;\r | |
85 | IA32_DESCRIPTOR Idtr;\r | |
86 | UINT16 Tr;\r | |
87 | } CPU_VOLATILE_REGISTERS;\r | |
88 | \r | |
41be0da5 JF |
89 | //\r |
90 | // CPU exchange information for switch BSP\r | |
91 | //\r | |
92 | typedef struct {\r | |
d1abb876 ZL |
93 | UINT8 State; // offset 0\r |
94 | UINTN StackPointer; // offset 4 / 8\r | |
95 | CPU_VOLATILE_REGISTERS VolatileRegisters; // offset 8 / 16\r | |
41be0da5 JF |
96 | } CPU_EXCHANGE_ROLE_INFO;\r |
97 | \r | |
9ebcf0f4 JF |
98 | //\r |
99 | // AP loop state when APs are in idle state\r | |
100 | // It's value is the same with PcdCpuApLoopMode\r | |
101 | //\r | |
102 | typedef enum {\r | |
103 | ApInHltLoop = 1,\r | |
104 | ApInMwaitLoop = 2,\r | |
105 | ApInRunLoop = 3\r | |
106 | } AP_LOOP_MODE;\r | |
107 | \r | |
e59f8f6b JF |
108 | //\r |
109 | // AP initialization state during APs wakeup\r | |
110 | //\r | |
111 | typedef enum {\r | |
112 | ApInitConfig = 1,\r | |
113 | ApInitReconfig = 2,\r | |
114 | ApInitDone = 3\r | |
115 | } AP_INIT_STATE;\r | |
116 | \r | |
03a1a925 JF |
117 | //\r |
118 | // AP state\r | |
119 | //\r | |
2a5997f8 ED |
120 | // The state transitions for an AP when it process a procedure are:\r |
121 | // Idle ----> Ready ----> Busy ----> Idle\r | |
122 | // [BSP] [AP] [AP]\r | |
123 | //\r | |
03a1a925 JF |
124 | typedef enum {\r |
125 | CpuStateIdle,\r | |
126 | CpuStateReady,\r | |
127 | CpuStateBusy,\r | |
e048ce88 | 128 | CpuStateFinished,\r |
03a1a925 JF |
129 | CpuStateDisabled\r |
130 | } CPU_STATE;\r | |
131 | \r | |
e59f8f6b JF |
132 | //\r |
133 | // AP related data\r | |
134 | //\r | |
135 | typedef struct {\r | |
053e878b MK |
136 | SPIN_LOCK ApLock;\r |
137 | volatile UINT32 *StartupApSignal;\r | |
138 | volatile UINTN ApFunction;\r | |
139 | volatile UINTN ApFunctionArgument;\r | |
140 | BOOLEAN CpuHealthy;\r | |
141 | volatile CPU_STATE State;\r | |
142 | CPU_VOLATILE_REGISTERS VolatileRegisters;\r | |
143 | BOOLEAN Waiting;\r | |
144 | BOOLEAN *Finished;\r | |
145 | UINT64 ExpectedTime;\r | |
146 | UINT64 CurrentTime;\r | |
147 | UINT64 TotalTime;\r | |
148 | EFI_EVENT WaitEvent;\r | |
149 | UINT32 ProcessorSignature;\r | |
150 | UINT8 PlatformId;\r | |
151 | UINT64 MicrocodeEntryAddr;\r | |
152 | UINT32 MicrocodeRevision;\r | |
06544455 | 153 | SEV_ES_SAVE_AREA *SevEsSaveArea;\r |
e59f8f6b JF |
154 | } CPU_AP_DATA;\r |
155 | \r | |
156 | //\r | |
157 | // Basic CPU information saved in Guided HOB.\r | |
158 | // Because the contents will be shard between PEI and DXE,\r | |
159 | // we need to make sure the each fields offset same in different\r | |
160 | // architecture.\r | |
161 | //\r | |
dd3fa0cd | 162 | #pragma pack (1)\r |
e59f8f6b | 163 | typedef struct {\r |
053e878b MK |
164 | UINT32 InitialApicId;\r |
165 | UINT32 ApicId;\r | |
166 | UINT32 Health;\r | |
167 | UINT64 ApTopOfStack;\r | |
e59f8f6b | 168 | } CPU_INFO_IN_HOB;\r |
dd3fa0cd | 169 | #pragma pack ()\r |
e59f8f6b | 170 | \r |
f7f85d83 JF |
171 | //\r |
172 | // AP reset code information including code address and size,\r | |
173 | // this structure will be shared be C code and assembly code.\r | |
174 | // It is natural aligned by design.\r | |
175 | //\r | |
176 | typedef struct {\r | |
053e878b MK |
177 | UINT8 *RendezvousFunnelAddress;\r |
178 | UINTN ModeEntryOffset;\r | |
179 | UINTN RendezvousFunnelSize;\r | |
facf52ae XY |
180 | UINT8 *RelocateApLoopFuncAddressGeneric;\r |
181 | UINTN RelocateApLoopFuncSizeGeneric;\r | |
0d1ad06c YX |
182 | UINT8 *RelocateApLoopFuncAddressAmdSev;\r |
183 | UINTN RelocateApLoopFuncSizeAmdSev;\r | |
053e878b | 184 | UINTN ModeTransitionOffset;\r |
053e878b MK |
185 | UINTN SwitchToRealNoNxOffset;\r |
186 | UINTN SwitchToRealPM16ModeOffset;\r | |
187 | UINTN SwitchToRealPM16ModeSize;\r | |
f7f85d83 | 188 | } MP_ASSEMBLY_ADDRESS_MAP;\r |
3e8ad6bd | 189 | \r |
053e878b | 190 | typedef struct _CPU_MP_DATA CPU_MP_DATA;\r |
e59f8f6b | 191 | \r |
d94e5f67 JF |
192 | #pragma pack(1)\r |
193 | \r | |
194 | //\r | |
195 | // MP CPU exchange information for AP reset code\r | |
196 | // This structure is required to be packed because fixed field offsets\r | |
197 | // into this structure are used in assembly code in this module\r | |
198 | //\r | |
199 | typedef struct {\r | |
053e878b MK |
200 | UINTN StackStart;\r |
201 | UINTN StackSize;\r | |
202 | UINTN CFunction;\r | |
203 | IA32_DESCRIPTOR GdtrProfile;\r | |
204 | IA32_DESCRIPTOR IdtrProfile;\r | |
205 | UINTN BufferStart;\r | |
206 | UINTN ModeOffset;\r | |
207 | UINTN ApIndex;\r | |
208 | UINTN CodeSegment;\r | |
209 | UINTN DataSegment;\r | |
210 | UINTN EnableExecuteDisable;\r | |
211 | UINTN Cr3;\r | |
212 | UINTN InitFlag;\r | |
213 | CPU_INFO_IN_HOB *CpuInfo;\r | |
214 | UINTN NumApsExecuting;\r | |
215 | CPU_MP_DATA *CpuMpData;\r | |
216 | UINTN InitializeFloatingPointUnitsAddress;\r | |
217 | UINT32 ModeTransitionMemory;\r | |
218 | UINT16 ModeTransitionSegment;\r | |
219 | UINT32 ModeHighMemory;\r | |
220 | UINT16 ModeHighSegment;\r | |
09f69a87 RN |
221 | //\r |
222 | // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r | |
223 | //\r | |
053e878b MK |
224 | BOOLEAN Enable5LevelPaging;\r |
225 | BOOLEAN SevEsIsEnabled;\r | |
9c703bc0 | 226 | BOOLEAN SevSnpIsEnabled;\r |
053e878b | 227 | UINTN GhcbBase;\r |
d4d7c9ad | 228 | BOOLEAN ExtTopoAvail;\r |
d94e5f67 JF |
229 | } MP_CPU_EXCHANGE_INFO;\r |
230 | \r | |
231 | #pragma pack()\r | |
e59f8f6b JF |
232 | \r |
233 | //\r | |
234 | // CPU MP Data save in memory\r | |
235 | //\r | |
236 | struct _CPU_MP_DATA {\r | |
053e878b MK |
237 | UINT64 CpuInfoInHob;\r |
238 | UINT32 CpuCount;\r | |
239 | UINT32 BspNumber;\r | |
e59f8f6b JF |
240 | //\r |
241 | // The above fields data will be passed from PEI to DXE\r | |
242 | // Please make sure the fields offset same in the different\r | |
243 | // architecture.\r | |
244 | //\r | |
053e878b MK |
245 | SPIN_LOCK MpLock;\r |
246 | UINTN Buffer;\r | |
247 | UINTN CpuApStackSize;\r | |
248 | MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r | |
249 | UINTN WakeupBuffer;\r | |
250 | UINTN WakeupBufferHigh;\r | |
251 | UINTN BackupBuffer;\r | |
252 | UINTN BackupBufferSize;\r | |
253 | \r | |
254 | volatile UINT32 FinishedCount;\r | |
255 | UINT32 RunningCount;\r | |
256 | BOOLEAN SingleThread;\r | |
257 | EFI_AP_PROCEDURE Procedure;\r | |
258 | VOID *ProcArguments;\r | |
259 | BOOLEAN *Finished;\r | |
260 | UINT64 ExpectedTime;\r | |
261 | UINT64 CurrentTime;\r | |
262 | UINT64 TotalTime;\r | |
263 | EFI_EVENT WaitEvent;\r | |
264 | UINTN **FailedCpuList;\r | |
265 | \r | |
266 | AP_INIT_STATE InitFlag;\r | |
267 | BOOLEAN SwitchBspFlag;\r | |
268 | UINTN NewBspNumber;\r | |
269 | CPU_EXCHANGE_ROLE_INFO BSPInfo;\r | |
270 | CPU_EXCHANGE_ROLE_INFO APInfo;\r | |
271 | MTRR_SETTINGS MtrrTable;\r | |
272 | UINT8 ApLoopMode;\r | |
273 | UINT8 ApTargetCState;\r | |
274 | UINT16 PmCodeSegment;\r | |
275 | UINT16 Pm16CodeSegment;\r | |
276 | CPU_AP_DATA *CpuData;\r | |
277 | volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r | |
278 | \r | |
279 | UINT32 CurrentTimerCount;\r | |
280 | UINTN DivideValue;\r | |
281 | UINT8 Vector;\r | |
282 | BOOLEAN PeriodicMode;\r | |
283 | BOOLEAN TimerInterruptState;\r | |
284 | UINT64 MicrocodePatchAddress;\r | |
285 | UINT64 MicrocodePatchRegionSize;\r | |
2a089134 | 286 | \r |
58942277 ED |
287 | //\r |
288 | // Whether need to use Init-Sipi-Sipi to wake up the APs.\r | |
289 | // Two cases need to set this value to TRUE. One is in HLT\r | |
290 | // loop mode, the other is resume from S3 which loop mode\r | |
e23d9c3e | 291 | // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r |
58942277 ED |
292 | // driver.\r |
293 | //\r | |
053e878b | 294 | BOOLEAN WakeUpByInitSipiSipi;\r |
e88a5b98 | 295 | \r |
053e878b | 296 | BOOLEAN SevEsIsEnabled;\r |
9c703bc0 | 297 | BOOLEAN SevSnpIsEnabled;\r |
06544455 | 298 | BOOLEAN UseSevEsAPMethod;\r |
053e878b MK |
299 | UINTN SevEsAPBuffer;\r |
300 | UINTN SevEsAPResetStackStart;\r | |
301 | CPU_MP_DATA *NewCpuMpData;\r | |
7b7508ad | 302 | \r |
053e878b | 303 | UINT64 GhcbBase;\r |
e59f8f6b | 304 | };\r |
93ca4c0f | 305 | \r |
9ab2b34d YX |
306 | //\r |
307 | // AP_STACK_DATA is stored at the top of each AP stack.\r | |
308 | //\r | |
309 | typedef struct {\r | |
310 | UINTN Bist;\r | |
311 | CPU_MP_DATA *MpData;\r | |
312 | } AP_STACK_DATA;\r | |
313 | \r | |
053e878b MK |
314 | #define AP_SAFE_STACK_SIZE 128\r |
315 | #define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE\r | |
0c3f8766 | 316 | STATIC_ASSERT ((AP_SAFE_STACK_SIZE & (CPU_STACK_ALIGNMENT - 1)) == 0, "AP_SAFE_STACK_SIZE is not aligned with CPU_STACK_ALIGNMENT");\r |
7b7508ad TL |
317 | \r |
318 | #pragma pack(1)\r | |
319 | \r | |
320 | typedef struct {\r | |
053e878b MK |
321 | UINT8 InsnBuffer[8];\r |
322 | UINT16 Rip;\r | |
323 | UINT16 Segment;\r | |
7b7508ad TL |
324 | } SEV_ES_AP_JMP_FAR;\r |
325 | \r | |
326 | #pragma pack()\r | |
327 | \r | |
328 | /**\r | |
329 | Assembly code to move an AP from long mode to real mode.\r | |
330 | \r | |
331 | Move an AP from long mode to real mode in preparation to invoking\r | |
332 | the reset vector. This is used for SEV-ES guests where a hypervisor\r | |
333 | is not allowed to set the CS and RIP to point to the reset vector.\r | |
334 | \r | |
335 | @param[in] BufferStart The reset vector target.\r | |
336 | @param[in] Code16 16-bit protected mode code segment value.\r | |
337 | @param[in] Code32 32-bit protected mode code segment value.\r | |
338 | @param[in] StackStart The start of a stack to be used for transitioning\r | |
339 | from long mode to real mode.\r | |
340 | **/\r | |
341 | typedef\r | |
e2289d19 | 342 | VOID\r |
053e878b | 343 | (EFIAPI AP_RESET)(\r |
7b7508ad TL |
344 | IN UINTN BufferStart,\r |
345 | IN UINT16 Code16,\r | |
346 | IN UINT16 Code32,\r | |
347 | IN UINTN StackStart\r | |
348 | );\r | |
349 | \r | |
053e878b | 350 | extern EFI_GUID mCpuInitMpLibHobGuid;\r |
93ca4c0f | 351 | \r |
76157021 JF |
352 | /**\r |
353 | Assembly code to place AP into safe loop mode.\r | |
354 | \r | |
355 | Place AP into targeted C-State if MONITOR is supported, otherwise\r | |
356 | place AP into hlt state.\r | |
357 | Place AP in protected mode if the current is long mode. Due to AP maybe\r | |
358 | wakeup by some hardware event. It could avoid accessing page table that\r | |
359 | may not available during booting to OS.\r | |
360 | \r | |
361 | @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r | |
362 | FALSE indicates MONITOR is not supported.\r | |
363 | @param[in] ApTargetCState Target C-State value.\r | |
364 | @param[in] PmCodeSegment Protected mode code segment value.\r | |
365 | **/\r | |
facf52ae XY |
366 | typedef\r |
367 | VOID\r | |
368 | (EFIAPI *ASM_RELOCATE_AP_LOOP_GENERIC)(\r | |
369 | IN BOOLEAN MwaitSupport,\r | |
370 | IN UINTN ApTargetCState,\r | |
371 | IN UINTN TopOfApStack,\r | |
372 | IN UINTN NumberToFinish,\r | |
373 | IN UINTN Cr3\r | |
374 | );\r | |
375 | \r | |
376 | /**\r | |
377 | Assembly code to place AP into safe loop mode for Amd processors\r | |
378 | with Sev enabled.\r | |
379 | Place AP into targeted C-State if MONITOR is supported, otherwise\r | |
380 | place AP into hlt state.\r | |
381 | Place AP in protected mode if the current is long mode. Due to AP maybe\r | |
382 | wakeup by some hardware event. It could avoid accessing page table that\r | |
383 | may not available during booting to OS.\r | |
384 | @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r | |
385 | FALSE indicates MONITOR is not supported.\r | |
386 | @param[in] ApTargetCState Target C-State value.\r | |
387 | @param[in] PmCodeSegment Protected mode code segment value.\r | |
388 | **/\r | |
76157021 | 389 | typedef\r |
e2289d19 | 390 | VOID\r |
0d1ad06c | 391 | (EFIAPI *ASM_RELOCATE_AP_LOOP_AMDSEV)(\r |
76157021 JF |
392 | IN BOOLEAN MwaitSupport,\r |
393 | IN UINTN ApTargetCState,\r | |
cbcf0cd6 | 394 | IN UINTN PmCodeSegment,\r |
9f91cb01 | 395 | IN UINTN TopOfApStack,\r |
20da7ca4 | 396 | IN UINTN NumberToFinish,\r |
cbcf0cd6 YX |
397 | IN UINTN Pm16CodeSegment,\r |
398 | IN UINTN SevEsAPJumpTable,\r | |
399 | IN UINTN WakeupBuffer\r | |
76157021 | 400 | );\r |
f7f85d83 JF |
401 | \r |
402 | /**\r | |
403 | Assembly code to get starting address and size of the rendezvous entry for APs.\r | |
404 | Information for fixing a jump instruction in the code is also returned.\r | |
405 | \r | |
406 | @param[out] AddressMap Output buffer for address map information.\r | |
407 | **/\r | |
408 | VOID\r | |
409 | EFIAPI\r | |
410 | AsmGetAddressMap (\r | |
053e878b | 411 | OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r |
f7f85d83 JF |
412 | );\r |
413 | \r | |
41be0da5 JF |
414 | /**\r |
415 | This function is called by both the BSP and the AP which is to become the BSP to\r | |
416 | Exchange execution context including stack between them. After return from this\r | |
417 | function, the BSP becomes AP and the AP becomes the BSP.\r | |
418 | \r | |
419 | @param[in] MyInfo Pointer to buffer holding the exchanging information for the executing processor.\r | |
420 | @param[in] OthersInfo Pointer to buffer holding the exchanging information for the peer.\r | |
421 | \r | |
422 | **/\r | |
423 | VOID\r | |
424 | EFIAPI\r | |
425 | AsmExchangeRole (\r | |
053e878b MK |
426 | IN CPU_EXCHANGE_ROLE_INFO *MyInfo,\r |
427 | IN CPU_EXCHANGE_ROLE_INFO *OthersInfo\r | |
41be0da5 JF |
428 | );\r |
429 | \r | |
a6f799e7 | 430 | typedef union {\r |
facf52ae | 431 | VOID *Data;\r |
0d1ad06c | 432 | ASM_RELOCATE_AP_LOOP_AMDSEV AmdSevEntry; // 64-bit AMD Sev processors\r |
facf52ae | 433 | ASM_RELOCATE_AP_LOOP_GENERIC GenericEntry; // Intel processors (32-bit or 64-bit), 32-bit AMD processors, or AMD non-Sev processors\r |
a6f799e7 XY |
434 | } RELOCATE_AP_LOOP_ENTRY;\r |
435 | \r | |
93ca4c0f JF |
436 | /**\r |
437 | Get the pointer to CPU MP Data structure.\r | |
438 | \r | |
439 | @return The pointer to CPU MP Data structure.\r | |
440 | **/\r | |
441 | CPU_MP_DATA *\r | |
442 | GetCpuMpData (\r | |
443 | VOID\r | |
444 | );\r | |
445 | \r | |
446 | /**\r | |
447 | Save the pointer to CPU MP Data structure.\r | |
448 | \r | |
449 | @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r | |
450 | **/\r | |
451 | VOID\r | |
452 | SaveCpuMpData (\r | |
053e878b | 453 | IN CPU_MP_DATA *CpuMpData\r |
93ca4c0f JF |
454 | );\r |
455 | \r | |
ed66e0e3 | 456 | /**\r |
a6b3d753 | 457 | Get available system memory below 1MB by specified size.\r |
ed66e0e3 | 458 | \r |
a6b3d753 SZ |
459 | @param[in] WakeupBufferSize Wakeup buffer size required\r |
460 | \r | |
461 | @retval other Return wakeup buffer address below 1MB.\r | |
462 | @retval -1 Cannot find free memory below 1MB.\r | |
ed66e0e3 | 463 | **/\r |
a6b3d753 SZ |
464 | UINTN\r |
465 | GetWakeupBuffer (\r | |
053e878b | 466 | IN UINTN WakeupBufferSize\r |
ed66e0e3 JF |
467 | );\r |
468 | \r | |
f32bfe6d JW |
469 | /**\r |
470 | Get available EfiBootServicesCode memory below 4GB by specified size.\r | |
471 | \r | |
472 | This buffer is required to safely transfer AP from real address mode to\r | |
473 | protected mode or long mode, due to the fact that the buffer returned by\r | |
474 | GetWakeupBuffer() may be marked as non-executable.\r | |
475 | \r | |
476 | @param[in] BufferSize Wakeup transition buffer size.\r | |
477 | \r | |
478 | @retval other Return wakeup transition buffer address below 4GB.\r | |
479 | @retval 0 Cannot find free memory below 4GB.\r | |
480 | **/\r | |
481 | UINTN\r | |
54aeed7e | 482 | AllocateCodeBuffer (\r |
053e878b | 483 | IN UINTN BufferSize\r |
f32bfe6d JW |
484 | );\r |
485 | \r | |
7b7508ad TL |
486 | /**\r |
487 | Return the address of the SEV-ES AP jump table.\r | |
488 | \r | |
489 | This buffer is required in order for an SEV-ES guest to transition from\r | |
490 | UEFI into an OS.\r | |
491 | \r | |
492 | @return Return SEV-ES AP jump table buffer\r | |
493 | **/\r | |
494 | UINTN\r | |
495 | GetSevEsAPMemory (\r | |
496 | VOID\r | |
497 | );\r | |
498 | \r | |
facf52ae XY |
499 | /**\r |
500 | Create 1:1 mapping page table in reserved memory to map the specified address range.\r | |
501 | @param[in] LinearAddress The start of the linear address range.\r | |
502 | @param[in] Length The length of the linear address range.\r | |
503 | @return The page table to be created.\r | |
504 | **/\r | |
505 | UINTN\r | |
506 | CreatePageTable (\r | |
507 | IN UINTN Address,\r | |
508 | IN UINTN Length\r | |
509 | );\r | |
510 | \r | |
96f5920d JF |
511 | /**\r |
512 | This function will be called by BSP to wakeup AP.\r | |
513 | \r | |
514 | @param[in] CpuMpData Pointer to CPU MP Data\r | |
515 | @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r | |
516 | FALSE: Send IPI to AP by ApicId\r | |
517 | @param[in] ProcessorNumber The handle number of specified processor\r | |
518 | @param[in] Procedure The function to be invoked by AP\r | |
519 | @param[in] ProcedureArgument The argument to be passed into AP function\r | |
cf4e79e4 | 520 | @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r |
96f5920d JF |
521 | **/\r |
522 | VOID\r | |
523 | WakeUpAP (\r | |
053e878b MK |
524 | IN CPU_MP_DATA *CpuMpData,\r |
525 | IN BOOLEAN Broadcast,\r | |
526 | IN UINTN ProcessorNumber,\r | |
527 | IN EFI_AP_PROCEDURE Procedure OPTIONAL,\r | |
528 | IN VOID *ProcedureArgument OPTIONAL,\r | |
0fdd466c | 529 | IN BOOLEAN WakeUpDisabledAps\r |
96f5920d JF |
530 | );\r |
531 | \r | |
93ca4c0f JF |
532 | /**\r |
533 | Initialize global data for MP support.\r | |
534 | \r | |
535 | @param[in] CpuMpData The pointer to CPU MP Data structure.\r | |
536 | **/\r | |
537 | VOID\r | |
538 | InitMpGlobalData (\r | |
053e878b | 539 | IN CPU_MP_DATA *CpuMpData\r |
93ca4c0f JF |
540 | );\r |
541 | \r | |
86efe976 JF |
542 | /**\r |
543 | Worker function to execute a caller provided function on all enabled APs.\r | |
544 | \r | |
545 | @param[in] Procedure A pointer to the function to be run on\r | |
546 | enabled APs of the system.\r | |
547 | @param[in] SingleThread If TRUE, then all the enabled APs execute\r | |
548 | the function specified by Procedure one by\r | |
549 | one, in ascending order of processor handle\r | |
550 | number. If FALSE, then all the enabled APs\r | |
551 | execute the function specified by Procedure\r | |
552 | simultaneously.\r | |
ee0c39fa | 553 | @param[in] ExcludeBsp Whether let BSP also trig this task.\r |
86efe976 JF |
554 | @param[in] WaitEvent The event created by the caller with CreateEvent()\r |
555 | service.\r | |
367284e7 | 556 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r |
86efe976 JF |
557 | APs to return from Procedure, either for\r |
558 | blocking or non-blocking mode.\r | |
559 | @param[in] ProcedureArgument The parameter passed into Procedure for\r | |
560 | all APs.\r | |
561 | @param[out] FailedCpuList If all APs finish successfully, then its\r | |
562 | content is set to NULL. If not all APs\r | |
563 | finish before timeout expires, then its\r | |
564 | content is set to address of the buffer\r | |
565 | holding handle numbers of the failed APs.\r | |
566 | \r | |
567 | @retval EFI_SUCCESS In blocking mode, all APs have finished before\r | |
568 | the timeout expired.\r | |
569 | @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r | |
570 | to all enabled APs.\r | |
571 | @retval others Failed to Startup all APs.\r | |
572 | \r | |
573 | **/\r | |
574 | EFI_STATUS\r | |
ee0c39fa | 575 | StartupAllCPUsWorker (\r |
053e878b MK |
576 | IN EFI_AP_PROCEDURE Procedure,\r |
577 | IN BOOLEAN SingleThread,\r | |
578 | IN BOOLEAN ExcludeBsp,\r | |
579 | IN EFI_EVENT WaitEvent OPTIONAL,\r | |
580 | IN UINTN TimeoutInMicroseconds,\r | |
581 | IN VOID *ProcedureArgument OPTIONAL,\r | |
582 | OUT UINTN **FailedCpuList OPTIONAL\r | |
86efe976 JF |
583 | );\r |
584 | \r | |
20ae5774 JF |
585 | /**\r |
586 | Worker function to let the caller get one enabled AP to execute a caller-provided\r | |
587 | function.\r | |
588 | \r | |
589 | @param[in] Procedure A pointer to the function to be run on\r | |
590 | enabled APs of the system.\r | |
591 | @param[in] ProcessorNumber The handle number of the AP.\r | |
592 | @param[in] WaitEvent The event created by the caller with CreateEvent()\r | |
593 | service.\r | |
367284e7 | 594 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r |
20ae5774 JF |
595 | APs to return from Procedure, either for\r |
596 | blocking or non-blocking mode.\r | |
597 | @param[in] ProcedureArgument The parameter passed into Procedure for\r | |
598 | all APs.\r | |
599 | @param[out] Finished If AP returns from Procedure before the\r | |
600 | timeout expires, its content is set to TRUE.\r | |
601 | Otherwise, the value is set to FALSE.\r | |
602 | \r | |
603 | @retval EFI_SUCCESS In blocking mode, specified AP finished before\r | |
604 | the timeout expires.\r | |
605 | @retval others Failed to Startup AP.\r | |
606 | \r | |
607 | **/\r | |
608 | EFI_STATUS\r | |
609 | StartupThisAPWorker (\r | |
053e878b MK |
610 | IN EFI_AP_PROCEDURE Procedure,\r |
611 | IN UINTN ProcessorNumber,\r | |
612 | IN EFI_EVENT WaitEvent OPTIONAL,\r | |
613 | IN UINTN TimeoutInMicroseconds,\r | |
614 | IN VOID *ProcedureArgument OPTIONAL,\r | |
615 | OUT BOOLEAN *Finished OPTIONAL\r | |
20ae5774 JF |
616 | );\r |
617 | \r | |
41be0da5 JF |
618 | /**\r |
619 | Worker function to switch the requested AP to be the BSP from that point onward.\r | |
620 | \r | |
621 | @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r | |
622 | @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an\r | |
623 | enabled AP. Otherwise, it will be disabled.\r | |
624 | \r | |
625 | @retval EFI_SUCCESS BSP successfully switched.\r | |
7367cc6c | 626 | @retval others Failed to switch BSP.\r |
41be0da5 JF |
627 | \r |
628 | **/\r | |
629 | EFI_STATUS\r | |
630 | SwitchBSPWorker (\r | |
053e878b MK |
631 | IN UINTN ProcessorNumber,\r |
632 | IN BOOLEAN EnableOldBSP\r | |
41be0da5 JF |
633 | );\r |
634 | \r | |
e37109bc JF |
635 | /**\r |
636 | Worker function to let the caller enable or disable an AP from this point onward.\r | |
637 | This service may only be called from the BSP.\r | |
638 | \r | |
639 | @param[in] ProcessorNumber The handle number of AP.\r | |
640 | @param[in] EnableAP Specifies the new state for the processor for\r | |
641 | enabled, FALSE for disabled.\r | |
642 | @param[in] HealthFlag If not NULL, a pointer to a value that specifies\r | |
643 | the new health status of the AP.\r | |
644 | \r | |
645 | @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.\r | |
646 | @retval others Failed to Enable/Disable AP.\r | |
647 | \r | |
648 | **/\r | |
649 | EFI_STATUS\r | |
650 | EnableDisableApWorker (\r | |
053e878b MK |
651 | IN UINTN ProcessorNumber,\r |
652 | IN BOOLEAN EnableAP,\r | |
653 | IN UINT32 *HealthFlag OPTIONAL\r | |
e37109bc JF |
654 | );\r |
655 | \r | |
93ca4c0f JF |
656 | /**\r |
657 | Get pointer to CPU MP Data structure from GUIDed HOB.\r | |
658 | \r | |
659 | @return The pointer to CPU MP Data structure.\r | |
660 | **/\r | |
661 | CPU_MP_DATA *\r | |
662 | GetCpuMpDataFromGuidedHob (\r | |
663 | VOID\r | |
664 | );\r | |
08085f08 JF |
665 | \r |
666 | /** Checks status of specified AP.\r | |
667 | \r | |
668 | This function checks whether the specified AP has finished the task assigned\r | |
669 | by StartupThisAP(), and whether timeout expires.\r | |
670 | \r | |
671 | @param[in] ProcessorNumber The handle number of processor.\r | |
672 | \r | |
673 | @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r | |
674 | @retval EFI_TIMEOUT The timeout expires.\r | |
675 | @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r | |
676 | **/\r | |
677 | EFI_STATUS\r | |
678 | CheckThisAP (\r | |
053e878b | 679 | IN UINTN ProcessorNumber\r |
08085f08 JF |
680 | );\r |
681 | \r | |
682 | /**\r | |
683 | Checks status of all APs.\r | |
684 | \r | |
685 | This function checks whether all APs have finished task assigned by StartupAllAPs(),\r | |
686 | and whether timeout expires.\r | |
687 | \r | |
688 | @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r | |
689 | @retval EFI_TIMEOUT The timeout expires.\r | |
690 | @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r | |
691 | **/\r | |
692 | EFI_STATUS\r | |
693 | CheckAllAPs (\r | |
694 | VOID\r | |
695 | );\r | |
696 | \r | |
697 | /**\r | |
698 | Checks APs status and updates APs status if needed.\r | |
699 | \r | |
700 | **/\r | |
701 | VOID\r | |
702 | CheckAndUpdateApsStatus (\r | |
703 | VOID\r | |
704 | );\r | |
705 | \r | |
94f63c76 JF |
706 | /**\r |
707 | Detect whether specified processor can find matching microcode patch and load it.\r | |
708 | \r | |
e1ed5573 HW |
709 | @param[in] CpuMpData The pointer to CPU MP Data structure.\r |
710 | @param[in] ProcessorNumber The handle number of the processor. The range is\r | |
711 | from 0 to the total number of logical processors\r | |
712 | minus 1.\r | |
94f63c76 JF |
713 | **/\r |
714 | VOID\r | |
715 | MicrocodeDetect (\r | |
053e878b MK |
716 | IN CPU_MP_DATA *CpuMpData,\r |
717 | IN UINTN ProcessorNumber\r | |
94f63c76 JF |
718 | );\r |
719 | \r | |
d786a172 | 720 | /**\r |
dd017041 | 721 | Shadow the required microcode patches data into memory.\r |
d786a172 HW |
722 | \r |
723 | @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r | |
724 | **/\r | |
725 | VOID\r | |
dd017041 | 726 | ShadowMicrocodeUpdatePatch (\r |
053e878b | 727 | IN OUT CPU_MP_DATA *CpuMpData\r |
d786a172 HW |
728 | );\r |
729 | \r | |
348a34d9 HW |
730 | /**\r |
731 | Get the cached microcode patch base address and size from the microcode patch\r | |
732 | information cache HOB.\r | |
733 | \r | |
734 | @param[out] Address Base address of the microcode patches data.\r | |
735 | It will be updated if the microcode patch\r | |
736 | information cache HOB is found.\r | |
737 | @param[out] RegionSize Size of the microcode patches data.\r | |
738 | It will be updated if the microcode patch\r | |
739 | information cache HOB is found.\r | |
740 | \r | |
741 | @retval TRUE The microcode patch information cache HOB is found.\r | |
742 | @retval FALSE The microcode patch information cache HOB is not found.\r | |
743 | \r | |
744 | **/\r | |
745 | BOOLEAN\r | |
746 | GetMicrocodePatchInfoFromHob (\r | |
053e878b MK |
747 | UINT64 *Address,\r |
748 | UINT64 *RegionSize\r | |
348a34d9 HW |
749 | );\r |
750 | \r | |
4d3314f6 JF |
751 | /**\r |
752 | Detect whether Mwait-monitor feature is supported.\r | |
753 | \r | |
754 | @retval TRUE Mwait-monitor feature is supported.\r | |
755 | @retval FALSE Mwait-monitor feature is not supported.\r | |
756 | **/\r | |
757 | BOOLEAN\r | |
758 | IsMwaitSupport (\r | |
759 | VOID\r | |
760 | );\r | |
761 | \r | |
43c9fdcc JF |
762 | /**\r |
763 | Enable Debug Agent to support source debugging on AP function.\r | |
764 | \r | |
765 | **/\r | |
766 | VOID\r | |
767 | EnableDebugAgent (\r | |
768 | VOID\r | |
769 | );\r | |
770 | \r | |
e1ed5573 HW |
771 | /**\r |
772 | Find the current Processor number by APIC ID.\r | |
773 | \r | |
774 | @param[in] CpuMpData Pointer to PEI CPU MP Data\r | |
775 | @param[out] ProcessorNumber Return the pocessor number found\r | |
776 | \r | |
777 | @retval EFI_SUCCESS ProcessorNumber is found and returned.\r | |
778 | @retval EFI_NOT_FOUND ProcessorNumber is not found.\r | |
779 | **/\r | |
780 | EFI_STATUS\r | |
781 | GetProcessorNumber (\r | |
053e878b MK |
782 | IN CPU_MP_DATA *CpuMpData,\r |
783 | OUT UINTN *ProcessorNumber\r | |
e1ed5573 HW |
784 | );\r |
785 | \r | |
c788c2b1 SF |
786 | /**\r |
787 | This funtion will try to invoke platform specific microcode shadow logic to\r | |
788 | relocate microcode update patches into memory.\r | |
789 | \r | |
4ac82ea1 | 790 | @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r |
c788c2b1 SF |
791 | \r |
792 | @retval EFI_SUCCESS Shadow microcode success.\r | |
793 | @retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.\r | |
794 | @retval EFI_UNSUPPORTED Can't find platform specific microcode shadow\r | |
795 | PPI/Protocol.\r | |
796 | **/\r | |
797 | EFI_STATUS\r | |
798 | PlatformShadowMicrocode (\r | |
053e878b | 799 | IN OUT CPU_MP_DATA *CpuMpData\r |
c788c2b1 SF |
800 | );\r |
801 | \r | |
e2289d19 BS |
802 | /**\r |
803 | Allocate the SEV-ES AP jump table buffer.\r | |
804 | \r | |
805 | @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r | |
806 | **/\r | |
807 | VOID\r | |
808 | AllocateSevEsAPMemory (\r | |
809 | IN OUT CPU_MP_DATA *CpuMpData\r | |
810 | );\r | |
811 | \r | |
812 | /**\r | |
813 | Program the SEV-ES AP jump table buffer.\r | |
814 | \r | |
815 | @param[in] SipiVector The SIPI vector used for the AP Reset\r | |
816 | **/\r | |
817 | VOID\r | |
818 | SetSevEsJumpTable (\r | |
819 | IN UINTN SipiVector\r | |
820 | );\r | |
821 | \r | |
822 | /**\r | |
823 | The function puts the AP in halt loop.\r | |
824 | \r | |
825 | @param[in] CpuMpData The pointer to CPU MP Data structure.\r | |
826 | **/\r | |
827 | VOID\r | |
828 | SevEsPlaceApHlt (\r | |
829 | CPU_MP_DATA *CpuMpData\r | |
830 | );\r | |
831 | \r | |
b95908e0 BS |
832 | /**\r |
833 | Check if the specified confidential computing attribute is active.\r | |
834 | \r | |
835 | @retval TRUE The specified Attr is active.\r | |
836 | @retval FALSE The specified Attr is not active.\r | |
837 | **/\r | |
838 | BOOLEAN\r | |
839 | EFIAPI\r | |
840 | ConfidentialComputingGuestHas (\r | |
841 | CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr\r | |
842 | );\r | |
843 | \r | |
d4d7c9ad MR |
844 | /**\r |
845 | The function fills the exchange data for the AP.\r | |
846 | \r | |
847 | @param[in] ExchangeInfo The pointer to CPU Exchange Data structure\r | |
848 | **/\r | |
849 | VOID\r | |
850 | FillExchangeInfoDataSevEs (\r | |
851 | IN volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo\r | |
852 | );\r | |
853 | \r | |
06544455 TL |
854 | /**\r |
855 | Issue RMPADJUST to adjust the VMSA attribute of an SEV-SNP page.\r | |
856 | \r | |
857 | @param[in] PageAddress\r | |
858 | @param[in] VmsaPage\r | |
859 | \r | |
860 | @return RMPADJUST return value\r | |
861 | **/\r | |
862 | UINT32\r | |
863 | SevSnpRmpAdjust (\r | |
864 | IN EFI_PHYSICAL_ADDRESS PageAddress,\r | |
865 | IN BOOLEAN VmsaPage\r | |
866 | );\r | |
867 | \r | |
868 | /**\r | |
869 | Create an SEV-SNP AP save area (VMSA) for use in running the vCPU.\r | |
870 | \r | |
871 | @param[in] CpuMpData Pointer to CPU MP Data\r | |
872 | @param[in] CpuData Pointer to CPU AP Data\r | |
873 | @param[in] ApicId APIC ID of the vCPU\r | |
874 | **/\r | |
875 | VOID\r | |
876 | SevSnpCreateSaveArea (\r | |
877 | IN CPU_MP_DATA *CpuMpData,\r | |
878 | IN CPU_AP_DATA *CpuData,\r | |
879 | UINT32 ApicId\r | |
880 | );\r | |
881 | \r | |
882 | /**\r | |
883 | Create SEV-SNP APs.\r | |
884 | \r | |
885 | @param[in] CpuMpData Pointer to CPU MP Data\r | |
886 | @param[in] ProcessorNumber The handle number of specified processor\r | |
887 | (-1 for all APs)\r | |
888 | **/\r | |
889 | VOID\r | |
890 | SevSnpCreateAP (\r | |
891 | IN CPU_MP_DATA *CpuMpData,\r | |
892 | IN INTN ProcessorNumber\r | |
893 | );\r | |
894 | \r | |
3e8ad6bd | 895 | #endif\r |