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1/** @file\r
2 Common header file for MP Initialize Library.\r
3\r
b4d7b9d2 4 Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>\r
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5 Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
6\r
0acd8697 7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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8\r
9**/\r
10\r
11#ifndef _MP_LIB_H_\r
12#define _MP_LIB_H_\r
13\r
14#include <PiPei.h>\r
15\r
01acb06c 16#include <Register/Intel/Cpuid.h>\r
4c0f6e34 17#include <Register/Amd/Cpuid.h>\r
06544455 18#include <Register/Amd/Ghcb.h>\r
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19#include <Register/Intel/Msr.h>\r
20#include <Register/Intel/LocalApic.h>\r
21#include <Register/Intel/Microcode.h>\r
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22\r
23#include <Library/MpInitLib.h>\r
24#include <Library/BaseLib.h>\r
25#include <Library/BaseMemoryLib.h>\r
26#include <Library/MemoryAllocationLib.h>\r
27#include <Library/DebugLib.h>\r
28#include <Library/LocalApicLib.h>\r
29#include <Library/CpuLib.h>\r
30#include <Library/UefiCpuLib.h>\r
31#include <Library/TimerLib.h>\r
32#include <Library/SynchronizationLib.h>\r
33#include <Library/MtrrLib.h>\r
34#include <Library/HobLib.h>\r
d5339c04 35#include <Library/PcdLib.h>\r
bce03284 36#include <Library/MicrocodeLib.h>\r
b95908e0 37#include <ConfidentialComputingGuestAttr.h>\r
3e8ad6bd 38\r
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39#include <Register/Amd/Fam17Msr.h>\r
40#include <Register/Amd/Ghcb.h>\r
41\r
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42#include <Guid/MicrocodePatchHob.h>\r
43\r
053e878b 44#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r
b8b04307 45\r
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46#define CPU_INIT_MP_LIB_HOB_GUID \\r
47 { \\r
48 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r
49 }\r
50\r
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51//\r
52// The MP data for switch BSP\r
53//\r
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54#define CPU_SWITCH_STATE_IDLE 0\r
55#define CPU_SWITCH_STATE_STORED 1\r
56#define CPU_SWITCH_STATE_LOADED 2\r
41be0da5 57\r
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58//\r
59// Default maximum number of entries to store the microcode patches information\r
60//\r
053e878b 61#define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r
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62\r
63//\r
64// Data structure for microcode patch information\r
65//\r
66typedef struct {\r
67 UINTN Address;\r
68 UINTN Size;\r
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69} MICROCODE_PATCH_INFO;\r
70\r
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71//\r
72// CPU volatile registers around INIT-SIPI-SIPI\r
73//\r
74typedef struct {\r
75 UINTN Cr0;\r
76 UINTN Cr3;\r
77 UINTN Cr4;\r
78 UINTN Dr0;\r
79 UINTN Dr1;\r
80 UINTN Dr2;\r
81 UINTN Dr3;\r
82 UINTN Dr6;\r
83 UINTN Dr7;\r
84 IA32_DESCRIPTOR Gdtr;\r
85 IA32_DESCRIPTOR Idtr;\r
86 UINT16 Tr;\r
87} CPU_VOLATILE_REGISTERS;\r
88\r
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89//\r
90// CPU exchange information for switch BSP\r
91//\r
92typedef struct {\r
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93 UINT8 State; // offset 0\r
94 UINTN StackPointer; // offset 4 / 8\r
95 CPU_VOLATILE_REGISTERS VolatileRegisters; // offset 8 / 16\r
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96} CPU_EXCHANGE_ROLE_INFO;\r
97\r
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98//\r
99// AP loop state when APs are in idle state\r
100// It's value is the same with PcdCpuApLoopMode\r
101//\r
102typedef enum {\r
103 ApInHltLoop = 1,\r
104 ApInMwaitLoop = 2,\r
105 ApInRunLoop = 3\r
106} AP_LOOP_MODE;\r
107\r
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108//\r
109// AP initialization state during APs wakeup\r
110//\r
111typedef enum {\r
112 ApInitConfig = 1,\r
113 ApInitReconfig = 2,\r
114 ApInitDone = 3\r
115} AP_INIT_STATE;\r
116\r
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117//\r
118// AP state\r
119//\r
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120// The state transitions for an AP when it process a procedure are:\r
121// Idle ----> Ready ----> Busy ----> Idle\r
122// [BSP] [AP] [AP]\r
123//\r
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124typedef enum {\r
125 CpuStateIdle,\r
126 CpuStateReady,\r
127 CpuStateBusy,\r
e048ce88 128 CpuStateFinished,\r
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129 CpuStateDisabled\r
130} CPU_STATE;\r
131\r
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132//\r
133// AP related data\r
134//\r
135typedef struct {\r
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136 SPIN_LOCK ApLock;\r
137 volatile UINT32 *StartupApSignal;\r
138 volatile UINTN ApFunction;\r
139 volatile UINTN ApFunctionArgument;\r
140 BOOLEAN CpuHealthy;\r
141 volatile CPU_STATE State;\r
142 CPU_VOLATILE_REGISTERS VolatileRegisters;\r
143 BOOLEAN Waiting;\r
144 BOOLEAN *Finished;\r
145 UINT64 ExpectedTime;\r
146 UINT64 CurrentTime;\r
147 UINT64 TotalTime;\r
148 EFI_EVENT WaitEvent;\r
149 UINT32 ProcessorSignature;\r
150 UINT8 PlatformId;\r
151 UINT64 MicrocodeEntryAddr;\r
152 UINT32 MicrocodeRevision;\r
06544455 153 SEV_ES_SAVE_AREA *SevEsSaveArea;\r
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154} CPU_AP_DATA;\r
155\r
156//\r
157// Basic CPU information saved in Guided HOB.\r
158// Because the contents will be shard between PEI and DXE,\r
159// we need to make sure the each fields offset same in different\r
160// architecture.\r
161//\r
dd3fa0cd 162#pragma pack (1)\r
e59f8f6b 163typedef struct {\r
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164 UINT32 InitialApicId;\r
165 UINT32 ApicId;\r
166 UINT32 Health;\r
167 UINT64 ApTopOfStack;\r
e59f8f6b 168} CPU_INFO_IN_HOB;\r
dd3fa0cd 169#pragma pack ()\r
e59f8f6b 170\r
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171//\r
172// AP reset code information including code address and size,\r
173// this structure will be shared be C code and assembly code.\r
174// It is natural aligned by design.\r
175//\r
176typedef struct {\r
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177 UINT8 *RendezvousFunnelAddress;\r
178 UINTN ModeEntryOffset;\r
179 UINTN RendezvousFunnelSize;\r
180 UINT8 *RelocateApLoopFuncAddress;\r
181 UINTN RelocateApLoopFuncSize;\r
182 UINTN ModeTransitionOffset;\r
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183 UINTN SwitchToRealNoNxOffset;\r
184 UINTN SwitchToRealPM16ModeOffset;\r
185 UINTN SwitchToRealPM16ModeSize;\r
f7f85d83 186} MP_ASSEMBLY_ADDRESS_MAP;\r
3e8ad6bd 187\r
053e878b 188typedef struct _CPU_MP_DATA CPU_MP_DATA;\r
e59f8f6b 189\r
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190#pragma pack(1)\r
191\r
192//\r
193// MP CPU exchange information for AP reset code\r
194// This structure is required to be packed because fixed field offsets\r
195// into this structure are used in assembly code in this module\r
196//\r
197typedef struct {\r
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198 UINTN StackStart;\r
199 UINTN StackSize;\r
200 UINTN CFunction;\r
201 IA32_DESCRIPTOR GdtrProfile;\r
202 IA32_DESCRIPTOR IdtrProfile;\r
203 UINTN BufferStart;\r
204 UINTN ModeOffset;\r
205 UINTN ApIndex;\r
206 UINTN CodeSegment;\r
207 UINTN DataSegment;\r
208 UINTN EnableExecuteDisable;\r
209 UINTN Cr3;\r
210 UINTN InitFlag;\r
211 CPU_INFO_IN_HOB *CpuInfo;\r
212 UINTN NumApsExecuting;\r
213 CPU_MP_DATA *CpuMpData;\r
214 UINTN InitializeFloatingPointUnitsAddress;\r
215 UINT32 ModeTransitionMemory;\r
216 UINT16 ModeTransitionSegment;\r
217 UINT32 ModeHighMemory;\r
218 UINT16 ModeHighSegment;\r
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219 //\r
220 // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r
221 //\r
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222 BOOLEAN Enable5LevelPaging;\r
223 BOOLEAN SevEsIsEnabled;\r
9c703bc0 224 BOOLEAN SevSnpIsEnabled;\r
053e878b 225 UINTN GhcbBase;\r
d4d7c9ad 226 BOOLEAN ExtTopoAvail;\r
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227} MP_CPU_EXCHANGE_INFO;\r
228\r
229#pragma pack()\r
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230\r
231//\r
232// CPU MP Data save in memory\r
233//\r
234struct _CPU_MP_DATA {\r
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235 UINT64 CpuInfoInHob;\r
236 UINT32 CpuCount;\r
237 UINT32 BspNumber;\r
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238 //\r
239 // The above fields data will be passed from PEI to DXE\r
240 // Please make sure the fields offset same in the different\r
241 // architecture.\r
242 //\r
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243 SPIN_LOCK MpLock;\r
244 UINTN Buffer;\r
245 UINTN CpuApStackSize;\r
246 MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
247 UINTN WakeupBuffer;\r
248 UINTN WakeupBufferHigh;\r
249 UINTN BackupBuffer;\r
250 UINTN BackupBufferSize;\r
251\r
252 volatile UINT32 FinishedCount;\r
253 UINT32 RunningCount;\r
254 BOOLEAN SingleThread;\r
255 EFI_AP_PROCEDURE Procedure;\r
256 VOID *ProcArguments;\r
257 BOOLEAN *Finished;\r
258 UINT64 ExpectedTime;\r
259 UINT64 CurrentTime;\r
260 UINT64 TotalTime;\r
261 EFI_EVENT WaitEvent;\r
262 UINTN **FailedCpuList;\r
263\r
264 AP_INIT_STATE InitFlag;\r
265 BOOLEAN SwitchBspFlag;\r
266 UINTN NewBspNumber;\r
267 CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
268 CPU_EXCHANGE_ROLE_INFO APInfo;\r
269 MTRR_SETTINGS MtrrTable;\r
270 UINT8 ApLoopMode;\r
271 UINT8 ApTargetCState;\r
272 UINT16 PmCodeSegment;\r
273 UINT16 Pm16CodeSegment;\r
274 CPU_AP_DATA *CpuData;\r
275 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
276\r
277 UINT32 CurrentTimerCount;\r
278 UINTN DivideValue;\r
279 UINT8 Vector;\r
280 BOOLEAN PeriodicMode;\r
281 BOOLEAN TimerInterruptState;\r
282 UINT64 MicrocodePatchAddress;\r
283 UINT64 MicrocodePatchRegionSize;\r
2a089134 284\r
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285 //\r
286 // Whether need to use Init-Sipi-Sipi to wake up the APs.\r
287 // Two cases need to set this value to TRUE. One is in HLT\r
288 // loop mode, the other is resume from S3 which loop mode\r
e23d9c3e 289 // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r
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290 // driver.\r
291 //\r
053e878b 292 BOOLEAN WakeUpByInitSipiSipi;\r
e88a5b98 293\r
053e878b 294 BOOLEAN SevEsIsEnabled;\r
9c703bc0 295 BOOLEAN SevSnpIsEnabled;\r
06544455 296 BOOLEAN UseSevEsAPMethod;\r
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297 UINTN SevEsAPBuffer;\r
298 UINTN SevEsAPResetStackStart;\r
299 CPU_MP_DATA *NewCpuMpData;\r
7b7508ad 300\r
053e878b 301 UINT64 GhcbBase;\r
e59f8f6b 302};\r
93ca4c0f 303\r
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304//\r
305// AP_STACK_DATA is stored at the top of each AP stack.\r
306//\r
307typedef struct {\r
308 UINTN Bist;\r
309 CPU_MP_DATA *MpData;\r
310} AP_STACK_DATA;\r
311\r
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312#define AP_SAFE_STACK_SIZE 128\r
313#define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE\r
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314\r
315#pragma pack(1)\r
316\r
317typedef struct {\r
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318 UINT8 InsnBuffer[8];\r
319 UINT16 Rip;\r
320 UINT16 Segment;\r
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321} SEV_ES_AP_JMP_FAR;\r
322\r
323#pragma pack()\r
324\r
325/**\r
326 Assembly code to move an AP from long mode to real mode.\r
327\r
328 Move an AP from long mode to real mode in preparation to invoking\r
329 the reset vector. This is used for SEV-ES guests where a hypervisor\r
330 is not allowed to set the CS and RIP to point to the reset vector.\r
331\r
332 @param[in] BufferStart The reset vector target.\r
333 @param[in] Code16 16-bit protected mode code segment value.\r
334 @param[in] Code32 32-bit protected mode code segment value.\r
335 @param[in] StackStart The start of a stack to be used for transitioning\r
336 from long mode to real mode.\r
337**/\r
338typedef\r
e2289d19 339 VOID\r
053e878b 340(EFIAPI AP_RESET)(\r
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341 IN UINTN BufferStart,\r
342 IN UINT16 Code16,\r
343 IN UINT16 Code32,\r
344 IN UINTN StackStart\r
345 );\r
346\r
053e878b 347extern EFI_GUID mCpuInitMpLibHobGuid;\r
93ca4c0f 348\r
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349/**\r
350 Assembly code to place AP into safe loop mode.\r
351\r
352 Place AP into targeted C-State if MONITOR is supported, otherwise\r
353 place AP into hlt state.\r
354 Place AP in protected mode if the current is long mode. Due to AP maybe\r
355 wakeup by some hardware event. It could avoid accessing page table that\r
356 may not available during booting to OS.\r
357\r
358 @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r
359 FALSE indicates MONITOR is not supported.\r
360 @param[in] ApTargetCState Target C-State value.\r
361 @param[in] PmCodeSegment Protected mode code segment value.\r
362**/\r
363typedef\r
e2289d19 364 VOID\r
053e878b 365(EFIAPI *ASM_RELOCATE_AP_LOOP)(\r
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366 IN BOOLEAN MwaitSupport,\r
367 IN UINTN ApTargetCState,\r
cbcf0cd6 368 IN UINTN PmCodeSegment,\r
9f91cb01 369 IN UINTN TopOfApStack,\r
20da7ca4 370 IN UINTN NumberToFinish,\r
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371 IN UINTN Pm16CodeSegment,\r
372 IN UINTN SevEsAPJumpTable,\r
373 IN UINTN WakeupBuffer\r
76157021 374 );\r
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375\r
376/**\r
377 Assembly code to get starting address and size of the rendezvous entry for APs.\r
378 Information for fixing a jump instruction in the code is also returned.\r
379\r
380 @param[out] AddressMap Output buffer for address map information.\r
381**/\r
382VOID\r
383EFIAPI\r
384AsmGetAddressMap (\r
053e878b 385 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
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386 );\r
387\r
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388/**\r
389 This function is called by both the BSP and the AP which is to become the BSP to\r
390 Exchange execution context including stack between them. After return from this\r
391 function, the BSP becomes AP and the AP becomes the BSP.\r
392\r
393 @param[in] MyInfo Pointer to buffer holding the exchanging information for the executing processor.\r
394 @param[in] OthersInfo Pointer to buffer holding the exchanging information for the peer.\r
395\r
396**/\r
397VOID\r
398EFIAPI\r
399AsmExchangeRole (\r
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400 IN CPU_EXCHANGE_ROLE_INFO *MyInfo,\r
401 IN CPU_EXCHANGE_ROLE_INFO *OthersInfo\r
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402 );\r
403\r
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404/**\r
405 Get the pointer to CPU MP Data structure.\r
406\r
407 @return The pointer to CPU MP Data structure.\r
408**/\r
409CPU_MP_DATA *\r
410GetCpuMpData (\r
411 VOID\r
412 );\r
413\r
414/**\r
415 Save the pointer to CPU MP Data structure.\r
416\r
417 @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r
418**/\r
419VOID\r
420SaveCpuMpData (\r
053e878b 421 IN CPU_MP_DATA *CpuMpData\r
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422 );\r
423\r
ed66e0e3 424/**\r
a6b3d753 425 Get available system memory below 1MB by specified size.\r
ed66e0e3 426\r
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427 @param[in] WakeupBufferSize Wakeup buffer size required\r
428\r
429 @retval other Return wakeup buffer address below 1MB.\r
430 @retval -1 Cannot find free memory below 1MB.\r
ed66e0e3 431**/\r
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432UINTN\r
433GetWakeupBuffer (\r
053e878b 434 IN UINTN WakeupBufferSize\r
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435 );\r
436\r
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437/**\r
438 Get available EfiBootServicesCode memory below 4GB by specified size.\r
439\r
440 This buffer is required to safely transfer AP from real address mode to\r
441 protected mode or long mode, due to the fact that the buffer returned by\r
442 GetWakeupBuffer() may be marked as non-executable.\r
443\r
444 @param[in] BufferSize Wakeup transition buffer size.\r
445\r
446 @retval other Return wakeup transition buffer address below 4GB.\r
447 @retval 0 Cannot find free memory below 4GB.\r
448**/\r
449UINTN\r
54aeed7e 450AllocateCodeBuffer (\r
053e878b 451 IN UINTN BufferSize\r
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452 );\r
453\r
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454/**\r
455 Return the address of the SEV-ES AP jump table.\r
456\r
457 This buffer is required in order for an SEV-ES guest to transition from\r
458 UEFI into an OS.\r
459\r
460 @return Return SEV-ES AP jump table buffer\r
461**/\r
462UINTN\r
463GetSevEsAPMemory (\r
464 VOID\r
465 );\r
466\r
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467/**\r
468 This function will be called by BSP to wakeup AP.\r
469\r
470 @param[in] CpuMpData Pointer to CPU MP Data\r
471 @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r
472 FALSE: Send IPI to AP by ApicId\r
473 @param[in] ProcessorNumber The handle number of specified processor\r
474 @param[in] Procedure The function to be invoked by AP\r
475 @param[in] ProcedureArgument The argument to be passed into AP function\r
cf4e79e4 476 @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r
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477**/\r
478VOID\r
479WakeUpAP (\r
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480 IN CPU_MP_DATA *CpuMpData,\r
481 IN BOOLEAN Broadcast,\r
482 IN UINTN ProcessorNumber,\r
483 IN EFI_AP_PROCEDURE Procedure OPTIONAL,\r
484 IN VOID *ProcedureArgument OPTIONAL,\r
0fdd466c 485 IN BOOLEAN WakeUpDisabledAps\r
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486 );\r
487\r
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488/**\r
489 Initialize global data for MP support.\r
490\r
491 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
492**/\r
493VOID\r
494InitMpGlobalData (\r
053e878b 495 IN CPU_MP_DATA *CpuMpData\r
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496 );\r
497\r
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498/**\r
499 Worker function to execute a caller provided function on all enabled APs.\r
500\r
501 @param[in] Procedure A pointer to the function to be run on\r
502 enabled APs of the system.\r
503 @param[in] SingleThread If TRUE, then all the enabled APs execute\r
504 the function specified by Procedure one by\r
505 one, in ascending order of processor handle\r
506 number. If FALSE, then all the enabled APs\r
507 execute the function specified by Procedure\r
508 simultaneously.\r
ee0c39fa 509 @param[in] ExcludeBsp Whether let BSP also trig this task.\r
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510 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
511 service.\r
367284e7 512 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
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513 APs to return from Procedure, either for\r
514 blocking or non-blocking mode.\r
515 @param[in] ProcedureArgument The parameter passed into Procedure for\r
516 all APs.\r
517 @param[out] FailedCpuList If all APs finish successfully, then its\r
518 content is set to NULL. If not all APs\r
519 finish before timeout expires, then its\r
520 content is set to address of the buffer\r
521 holding handle numbers of the failed APs.\r
522\r
523 @retval EFI_SUCCESS In blocking mode, all APs have finished before\r
524 the timeout expired.\r
525 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r
526 to all enabled APs.\r
527 @retval others Failed to Startup all APs.\r
528\r
529**/\r
530EFI_STATUS\r
ee0c39fa 531StartupAllCPUsWorker (\r
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MK
532 IN EFI_AP_PROCEDURE Procedure,\r
533 IN BOOLEAN SingleThread,\r
534 IN BOOLEAN ExcludeBsp,\r
535 IN EFI_EVENT WaitEvent OPTIONAL,\r
536 IN UINTN TimeoutInMicroseconds,\r
537 IN VOID *ProcedureArgument OPTIONAL,\r
538 OUT UINTN **FailedCpuList OPTIONAL\r
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539 );\r
540\r
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541/**\r
542 Worker function to let the caller get one enabled AP to execute a caller-provided\r
543 function.\r
544\r
545 @param[in] Procedure A pointer to the function to be run on\r
546 enabled APs of the system.\r
547 @param[in] ProcessorNumber The handle number of the AP.\r
548 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
549 service.\r
367284e7 550 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
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551 APs to return from Procedure, either for\r
552 blocking or non-blocking mode.\r
553 @param[in] ProcedureArgument The parameter passed into Procedure for\r
554 all APs.\r
555 @param[out] Finished If AP returns from Procedure before the\r
556 timeout expires, its content is set to TRUE.\r
557 Otherwise, the value is set to FALSE.\r
558\r
559 @retval EFI_SUCCESS In blocking mode, specified AP finished before\r
560 the timeout expires.\r
561 @retval others Failed to Startup AP.\r
562\r
563**/\r
564EFI_STATUS\r
565StartupThisAPWorker (\r
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MK
566 IN EFI_AP_PROCEDURE Procedure,\r
567 IN UINTN ProcessorNumber,\r
568 IN EFI_EVENT WaitEvent OPTIONAL,\r
569 IN UINTN TimeoutInMicroseconds,\r
570 IN VOID *ProcedureArgument OPTIONAL,\r
571 OUT BOOLEAN *Finished OPTIONAL\r
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572 );\r
573\r
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574/**\r
575 Worker function to switch the requested AP to be the BSP from that point onward.\r
576\r
577 @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r
578 @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an\r
579 enabled AP. Otherwise, it will be disabled.\r
580\r
581 @retval EFI_SUCCESS BSP successfully switched.\r
7367cc6c 582 @retval others Failed to switch BSP.\r
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583\r
584**/\r
585EFI_STATUS\r
586SwitchBSPWorker (\r
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587 IN UINTN ProcessorNumber,\r
588 IN BOOLEAN EnableOldBSP\r
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589 );\r
590\r
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591/**\r
592 Worker function to let the caller enable or disable an AP from this point onward.\r
593 This service may only be called from the BSP.\r
594\r
595 @param[in] ProcessorNumber The handle number of AP.\r
596 @param[in] EnableAP Specifies the new state for the processor for\r
597 enabled, FALSE for disabled.\r
598 @param[in] HealthFlag If not NULL, a pointer to a value that specifies\r
599 the new health status of the AP.\r
600\r
601 @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.\r
602 @retval others Failed to Enable/Disable AP.\r
603\r
604**/\r
605EFI_STATUS\r
606EnableDisableApWorker (\r
053e878b
MK
607 IN UINTN ProcessorNumber,\r
608 IN BOOLEAN EnableAP,\r
609 IN UINT32 *HealthFlag OPTIONAL\r
e37109bc
JF
610 );\r
611\r
93ca4c0f
JF
612/**\r
613 Get pointer to CPU MP Data structure from GUIDed HOB.\r
614\r
615 @return The pointer to CPU MP Data structure.\r
616**/\r
617CPU_MP_DATA *\r
618GetCpuMpDataFromGuidedHob (\r
619 VOID\r
620 );\r
08085f08
JF
621\r
622/** Checks status of specified AP.\r
623\r
624 This function checks whether the specified AP has finished the task assigned\r
625 by StartupThisAP(), and whether timeout expires.\r
626\r
627 @param[in] ProcessorNumber The handle number of processor.\r
628\r
629 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r
630 @retval EFI_TIMEOUT The timeout expires.\r
631 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r
632**/\r
633EFI_STATUS\r
634CheckThisAP (\r
053e878b 635 IN UINTN ProcessorNumber\r
08085f08
JF
636 );\r
637\r
638/**\r
639 Checks status of all APs.\r
640\r
641 This function checks whether all APs have finished task assigned by StartupAllAPs(),\r
642 and whether timeout expires.\r
643\r
644 @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r
645 @retval EFI_TIMEOUT The timeout expires.\r
646 @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r
647**/\r
648EFI_STATUS\r
649CheckAllAPs (\r
650 VOID\r
651 );\r
652\r
653/**\r
654 Checks APs status and updates APs status if needed.\r
655\r
656**/\r
657VOID\r
658CheckAndUpdateApsStatus (\r
659 VOID\r
660 );\r
661\r
94f63c76
JF
662/**\r
663 Detect whether specified processor can find matching microcode patch and load it.\r
664\r
e1ed5573
HW
665 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
666 @param[in] ProcessorNumber The handle number of the processor. The range is\r
667 from 0 to the total number of logical processors\r
668 minus 1.\r
94f63c76
JF
669**/\r
670VOID\r
671MicrocodeDetect (\r
053e878b
MK
672 IN CPU_MP_DATA *CpuMpData,\r
673 IN UINTN ProcessorNumber\r
94f63c76
JF
674 );\r
675\r
d786a172 676/**\r
dd017041 677 Shadow the required microcode patches data into memory.\r
d786a172
HW
678\r
679 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
680**/\r
681VOID\r
dd017041 682ShadowMicrocodeUpdatePatch (\r
053e878b 683 IN OUT CPU_MP_DATA *CpuMpData\r
d786a172
HW
684 );\r
685\r
348a34d9
HW
686/**\r
687 Get the cached microcode patch base address and size from the microcode patch\r
688 information cache HOB.\r
689\r
690 @param[out] Address Base address of the microcode patches data.\r
691 It will be updated if the microcode patch\r
692 information cache HOB is found.\r
693 @param[out] RegionSize Size of the microcode patches data.\r
694 It will be updated if the microcode patch\r
695 information cache HOB is found.\r
696\r
697 @retval TRUE The microcode patch information cache HOB is found.\r
698 @retval FALSE The microcode patch information cache HOB is not found.\r
699\r
700**/\r
701BOOLEAN\r
702GetMicrocodePatchInfoFromHob (\r
053e878b
MK
703 UINT64 *Address,\r
704 UINT64 *RegionSize\r
348a34d9
HW
705 );\r
706\r
4d3314f6
JF
707/**\r
708 Detect whether Mwait-monitor feature is supported.\r
709\r
710 @retval TRUE Mwait-monitor feature is supported.\r
711 @retval FALSE Mwait-monitor feature is not supported.\r
712**/\r
713BOOLEAN\r
714IsMwaitSupport (\r
715 VOID\r
716 );\r
717\r
43c9fdcc
JF
718/**\r
719 Enable Debug Agent to support source debugging on AP function.\r
720\r
721**/\r
722VOID\r
723EnableDebugAgent (\r
724 VOID\r
725 );\r
726\r
e1ed5573
HW
727/**\r
728 Find the current Processor number by APIC ID.\r
729\r
730 @param[in] CpuMpData Pointer to PEI CPU MP Data\r
731 @param[out] ProcessorNumber Return the pocessor number found\r
732\r
733 @retval EFI_SUCCESS ProcessorNumber is found and returned.\r
734 @retval EFI_NOT_FOUND ProcessorNumber is not found.\r
735**/\r
736EFI_STATUS\r
737GetProcessorNumber (\r
053e878b
MK
738 IN CPU_MP_DATA *CpuMpData,\r
739 OUT UINTN *ProcessorNumber\r
e1ed5573
HW
740 );\r
741\r
c788c2b1
SF
742/**\r
743 This funtion will try to invoke platform specific microcode shadow logic to\r
744 relocate microcode update patches into memory.\r
745\r
4ac82ea1 746 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
c788c2b1
SF
747\r
748 @retval EFI_SUCCESS Shadow microcode success.\r
749 @retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.\r
750 @retval EFI_UNSUPPORTED Can't find platform specific microcode shadow\r
751 PPI/Protocol.\r
752**/\r
753EFI_STATUS\r
754PlatformShadowMicrocode (\r
053e878b 755 IN OUT CPU_MP_DATA *CpuMpData\r
c788c2b1
SF
756 );\r
757\r
e2289d19
BS
758/**\r
759 Allocate the SEV-ES AP jump table buffer.\r
760\r
761 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
762**/\r
763VOID\r
764AllocateSevEsAPMemory (\r
765 IN OUT CPU_MP_DATA *CpuMpData\r
766 );\r
767\r
768/**\r
769 Program the SEV-ES AP jump table buffer.\r
770\r
771 @param[in] SipiVector The SIPI vector used for the AP Reset\r
772**/\r
773VOID\r
774SetSevEsJumpTable (\r
775 IN UINTN SipiVector\r
776 );\r
777\r
778/**\r
779 The function puts the AP in halt loop.\r
780\r
781 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
782**/\r
783VOID\r
784SevEsPlaceApHlt (\r
785 CPU_MP_DATA *CpuMpData\r
786 );\r
787\r
b95908e0
BS
788/**\r
789 Check if the specified confidential computing attribute is active.\r
790\r
791 @retval TRUE The specified Attr is active.\r
792 @retval FALSE The specified Attr is not active.\r
793**/\r
794BOOLEAN\r
795EFIAPI\r
796ConfidentialComputingGuestHas (\r
797 CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr\r
798 );\r
799\r
d4d7c9ad
MR
800/**\r
801 The function fills the exchange data for the AP.\r
802\r
803 @param[in] ExchangeInfo The pointer to CPU Exchange Data structure\r
804**/\r
805VOID\r
806FillExchangeInfoDataSevEs (\r
807 IN volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo\r
808 );\r
809\r
06544455
TL
810/**\r
811 Issue RMPADJUST to adjust the VMSA attribute of an SEV-SNP page.\r
812\r
813 @param[in] PageAddress\r
814 @param[in] VmsaPage\r
815\r
816 @return RMPADJUST return value\r
817**/\r
818UINT32\r
819SevSnpRmpAdjust (\r
820 IN EFI_PHYSICAL_ADDRESS PageAddress,\r
821 IN BOOLEAN VmsaPage\r
822 );\r
823\r
824/**\r
825 Create an SEV-SNP AP save area (VMSA) for use in running the vCPU.\r
826\r
827 @param[in] CpuMpData Pointer to CPU MP Data\r
828 @param[in] CpuData Pointer to CPU AP Data\r
829 @param[in] ApicId APIC ID of the vCPU\r
830**/\r
831VOID\r
832SevSnpCreateSaveArea (\r
833 IN CPU_MP_DATA *CpuMpData,\r
834 IN CPU_AP_DATA *CpuData,\r
835 UINT32 ApicId\r
836 );\r
837\r
838/**\r
839 Create SEV-SNP APs.\r
840\r
841 @param[in] CpuMpData Pointer to CPU MP Data\r
842 @param[in] ProcessorNumber The handle number of specified processor\r
843 (-1 for all APs)\r
844**/\r
845VOID\r
846SevSnpCreateAP (\r
847 IN CPU_MP_DATA *CpuMpData,\r
848 IN INTN ProcessorNumber\r
849 );\r
850\r
3e8ad6bd 851#endif\r