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UefiCpuPkg/MpLib: add support to register GHCB GPA when SEV-SNP is enabled
[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / MpLib.h
CommitLineData
3e8ad6bd
JF		 1/** @file\r
2 Common header file for MP Initialize Library.\r
3\r
8c61f193 4 Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>\r
4c0f6e34
LD		 5 Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
6\r
0acd8697 7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
3e8ad6bd
JF		 8\r
9**/\r
10\r
11#ifndef _MP_LIB_H_\r
12#define _MP_LIB_H_\r
13\r
14#include <PiPei.h>\r
15\r
01acb06c 16#include <Register/Intel/Cpuid.h>\r
4c0f6e34 17#include <Register/Amd/Cpuid.h>\r
01acb06c
RN		 18#include <Register/Intel/Msr.h>\r
19#include <Register/Intel/LocalApic.h>\r
20#include <Register/Intel/Microcode.h>\r
3e8ad6bd
JF		 21\r
22#include <Library/MpInitLib.h>\r
23#include <Library/BaseLib.h>\r
24#include <Library/BaseMemoryLib.h>\r
25#include <Library/MemoryAllocationLib.h>\r
26#include <Library/DebugLib.h>\r
27#include <Library/LocalApicLib.h>\r
28#include <Library/CpuLib.h>\r
29#include <Library/UefiCpuLib.h>\r
30#include <Library/TimerLib.h>\r
31#include <Library/SynchronizationLib.h>\r
32#include <Library/MtrrLib.h>\r
33#include <Library/HobLib.h>\r
d5339c04 34#include <Library/PcdLib.h>\r
bce03284 35#include <Library/MicrocodeLib.h>\r
b95908e0 36#include <ConfidentialComputingGuestAttr.h>\r
3e8ad6bd 37\r
e2289d19
BS		 38#include <Register/Amd/Fam17Msr.h>\r
39#include <Register/Amd/Ghcb.h>\r
40\r
348a34d9
HW		 41#include <Guid/MicrocodePatchHob.h>\r
42\r
053e878b 43#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r
b8b04307 44\r
93ca4c0f
JF		 45#define CPU_INIT_MP_LIB_HOB_GUID \\r
46 { \\r
47 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r
48 }\r
49\r
41be0da5
JF		 50//\r
51// The MP data for switch BSP\r
52//\r
053e878b
MK		 53#define CPU_SWITCH_STATE_IDLE 0\r
54#define CPU_SWITCH_STATE_STORED 1\r
55#define CPU_SWITCH_STATE_LOADED 2\r
41be0da5 56\r
d786a172
HW		 57//\r
58// Default maximum number of entries to store the microcode patches information\r
59//\r
053e878b 60#define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r
d786a172
HW		 61\r
62//\r
63// Data structure for microcode patch information\r
64//\r
65typedef struct {\r
66 UINTN Address;\r
67 UINTN Size;\r
d786a172
HW		 68} MICROCODE_PATCH_INFO;\r
69\r
41be0da5
JF		 70//\r
71// CPU exchange information for switch BSP\r
72//\r
73typedef struct {\r
053e878b
MK		 74 UINT8 State; // offset 0\r
75 UINTN StackPointer; // offset 4 / 8\r
76 IA32_DESCRIPTOR Gdtr; // offset 8 / 16\r
77 IA32_DESCRIPTOR Idtr; // offset 14 / 26\r
41be0da5
JF		 78} CPU_EXCHANGE_ROLE_INFO;\r
79\r
9ebcf0f4
JF		 80//\r
81// AP loop state when APs are in idle state\r
82// It's value is the same with PcdCpuApLoopMode\r
83//\r
84typedef enum {\r
85 ApInHltLoop = 1,\r
86 ApInMwaitLoop = 2,\r
87 ApInRunLoop = 3\r
88} AP_LOOP_MODE;\r
89\r
e59f8f6b
JF		 90//\r
91// AP initialization state during APs wakeup\r
92//\r
93typedef enum {\r
94 ApInitConfig = 1,\r
95 ApInitReconfig = 2,\r
96 ApInitDone = 3\r
97} AP_INIT_STATE;\r
98\r
03a1a925
JF		 99//\r
100// AP state\r
101//\r
2a5997f8
ED		 102// The state transitions for an AP when it process a procedure are:\r
103// Idle ----> Ready ----> Busy ----> Idle\r
104// [BSP] [AP] [AP]\r
105//\r
03a1a925
JF		 106typedef enum {\r
107 CpuStateIdle,\r
108 CpuStateReady,\r
109 CpuStateBusy,\r
e048ce88 110 CpuStateFinished,\r
03a1a925
JF		 111 CpuStateDisabled\r
112} CPU_STATE;\r
113\r
68cb9330
JF		 114//\r
115// CPU volatile registers around INIT-SIPI-SIPI\r
116//\r
117typedef struct {\r
053e878b
MK		 118 UINTN Cr0;\r
119 UINTN Cr3;\r
120 UINTN Cr4;\r
121 UINTN Dr0;\r
122 UINTN Dr1;\r
123 UINTN Dr2;\r
124 UINTN Dr3;\r
125 UINTN Dr6;\r
126 UINTN Dr7;\r
127 IA32_DESCRIPTOR Gdtr;\r
128 IA32_DESCRIPTOR Idtr;\r
129 UINT16 Tr;\r
68cb9330
JF		 130} CPU_VOLATILE_REGISTERS;\r
131\r
e59f8f6b
JF		 132//\r
133// AP related data\r
134//\r
135typedef struct {\r
053e878b
MK		 136 SPIN_LOCK ApLock;\r
137 volatile UINT32 *StartupApSignal;\r
138 volatile UINTN ApFunction;\r
139 volatile UINTN ApFunctionArgument;\r
140 BOOLEAN CpuHealthy;\r
141 volatile CPU_STATE State;\r
142 CPU_VOLATILE_REGISTERS VolatileRegisters;\r
143 BOOLEAN Waiting;\r
144 BOOLEAN *Finished;\r
145 UINT64 ExpectedTime;\r
146 UINT64 CurrentTime;\r
147 UINT64 TotalTime;\r
148 EFI_EVENT WaitEvent;\r
149 UINT32 ProcessorSignature;\r
150 UINT8 PlatformId;\r
151 UINT64 MicrocodeEntryAddr;\r
152 UINT32 MicrocodeRevision;\r
e59f8f6b
JF		 153} CPU_AP_DATA;\r
154\r
155//\r
156// Basic CPU information saved in Guided HOB.\r
157// Because the contents will be shard between PEI and DXE,\r
158// we need to make sure the each fields offset same in different\r
159// architecture.\r
160//\r
dd3fa0cd 161#pragma pack (1)\r
e59f8f6b 162typedef struct {\r
053e878b
MK		 163 UINT32 InitialApicId;\r
164 UINT32 ApicId;\r
165 UINT32 Health;\r
166 UINT64 ApTopOfStack;\r
e59f8f6b 167} CPU_INFO_IN_HOB;\r
dd3fa0cd 168#pragma pack ()\r
e59f8f6b 169\r
f7f85d83
JF		 170//\r
171// AP reset code information including code address and size,\r
172// this structure will be shared be C code and assembly code.\r
173// It is natural aligned by design.\r
174//\r
175typedef struct {\r
053e878b
MK		 176 UINT8 *RendezvousFunnelAddress;\r
177 UINTN ModeEntryOffset;\r
178 UINTN RendezvousFunnelSize;\r
179 UINT8 *RelocateApLoopFuncAddress;\r
180 UINTN RelocateApLoopFuncSize;\r
181 UINTN ModeTransitionOffset;\r
182 UINTN SwitchToRealSize;\r
183 UINTN SwitchToRealOffset;\r
184 UINTN SwitchToRealNoNxOffset;\r
185 UINTN SwitchToRealPM16ModeOffset;\r
186 UINTN SwitchToRealPM16ModeSize;\r
f7f85d83 187} MP_ASSEMBLY_ADDRESS_MAP;\r
3e8ad6bd 188\r
053e878b 189typedef struct _CPU_MP_DATA CPU_MP_DATA;\r
e59f8f6b 190\r
d94e5f67
JF		 191#pragma pack(1)\r
192\r
193//\r
194// MP CPU exchange information for AP reset code\r
195// This structure is required to be packed because fixed field offsets\r
196// into this structure are used in assembly code in this module\r
197//\r
198typedef struct {\r
053e878b
MK		 199 UINTN StackStart;\r
200 UINTN StackSize;\r
201 UINTN CFunction;\r
202 IA32_DESCRIPTOR GdtrProfile;\r
203 IA32_DESCRIPTOR IdtrProfile;\r
204 UINTN BufferStart;\r
205 UINTN ModeOffset;\r
206 UINTN ApIndex;\r
207 UINTN CodeSegment;\r
208 UINTN DataSegment;\r
209 UINTN EnableExecuteDisable;\r
210 UINTN Cr3;\r
211 UINTN InitFlag;\r
212 CPU_INFO_IN_HOB *CpuInfo;\r
213 UINTN NumApsExecuting;\r
214 CPU_MP_DATA *CpuMpData;\r
215 UINTN InitializeFloatingPointUnitsAddress;\r
216 UINT32 ModeTransitionMemory;\r
217 UINT16 ModeTransitionSegment;\r
218 UINT32 ModeHighMemory;\r
219 UINT16 ModeHighSegment;\r
09f69a87
RN		 220 //\r
221 // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r
222 //\r
053e878b
MK		 223 BOOLEAN Enable5LevelPaging;\r
224 BOOLEAN SevEsIsEnabled;\r
9c703bc0 225 BOOLEAN SevSnpIsEnabled;\r
053e878b 226 UINTN GhcbBase;\r
d94e5f67
JF		 227} MP_CPU_EXCHANGE_INFO;\r
228\r
229#pragma pack()\r
e59f8f6b
JF		 230\r
231//\r
232// CPU MP Data save in memory\r
233//\r
234struct _CPU_MP_DATA {\r
053e878b
MK		 235 UINT64 CpuInfoInHob;\r
236 UINT32 CpuCount;\r
237 UINT32 BspNumber;\r
e59f8f6b
JF		 238 //\r
239 // The above fields data will be passed from PEI to DXE\r
240 // Please make sure the fields offset same in the different\r
241 // architecture.\r
242 //\r
053e878b
MK		 243 SPIN_LOCK MpLock;\r
244 UINTN Buffer;\r
245 UINTN CpuApStackSize;\r
246 MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
247 UINTN WakeupBuffer;\r
248 UINTN WakeupBufferHigh;\r
249 UINTN BackupBuffer;\r
250 UINTN BackupBufferSize;\r
251\r
252 volatile UINT32 FinishedCount;\r
253 UINT32 RunningCount;\r
254 BOOLEAN SingleThread;\r
255 EFI_AP_PROCEDURE Procedure;\r
256 VOID *ProcArguments;\r
257 BOOLEAN *Finished;\r
258 UINT64 ExpectedTime;\r
259 UINT64 CurrentTime;\r
260 UINT64 TotalTime;\r
261 EFI_EVENT WaitEvent;\r
262 UINTN **FailedCpuList;\r
263\r
264 AP_INIT_STATE InitFlag;\r
265 BOOLEAN SwitchBspFlag;\r
266 UINTN NewBspNumber;\r
267 CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
268 CPU_EXCHANGE_ROLE_INFO APInfo;\r
269 MTRR_SETTINGS MtrrTable;\r
270 UINT8 ApLoopMode;\r
271 UINT8 ApTargetCState;\r
272 UINT16 PmCodeSegment;\r
273 UINT16 Pm16CodeSegment;\r
274 CPU_AP_DATA *CpuData;\r
275 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
276\r
277 UINT32 CurrentTimerCount;\r
278 UINTN DivideValue;\r
279 UINT8 Vector;\r
280 BOOLEAN PeriodicMode;\r
281 BOOLEAN TimerInterruptState;\r
282 UINT64 MicrocodePatchAddress;\r
283 UINT64 MicrocodePatchRegionSize;\r
2a089134 284\r
58942277
ED		 285 //\r
286 // Whether need to use Init-Sipi-Sipi to wake up the APs.\r
287 // Two cases need to set this value to TRUE. One is in HLT\r
288 // loop mode, the other is resume from S3 which loop mode\r
e23d9c3e 289 // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r
58942277
ED		 290 // driver.\r
291 //\r
053e878b 292 BOOLEAN WakeUpByInitSipiSipi;\r
e88a5b98 293\r
053e878b 294 BOOLEAN SevEsIsEnabled;\r
9c703bc0 295 BOOLEAN SevSnpIsEnabled;\r
053e878b
MK		 296 UINTN SevEsAPBuffer;\r
297 UINTN SevEsAPResetStackStart;\r
298 CPU_MP_DATA *NewCpuMpData;\r
7b7508ad 299\r
053e878b 300 UINT64 GhcbBase;\r
e59f8f6b 301};\r
93ca4c0f 302\r
053e878b
MK		 303#define AP_SAFE_STACK_SIZE 128\r
304#define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE\r
7b7508ad
TL		 305\r
306#pragma pack(1)\r
307\r
308typedef struct {\r
053e878b
MK		 309 UINT8 InsnBuffer[8];\r
310 UINT16 Rip;\r
311 UINT16 Segment;\r
7b7508ad
TL		 312} SEV_ES_AP_JMP_FAR;\r
313\r
314#pragma pack()\r
315\r
316/**\r
317 Assembly code to move an AP from long mode to real mode.\r
318\r
319 Move an AP from long mode to real mode in preparation to invoking\r
320 the reset vector. This is used for SEV-ES guests where a hypervisor\r
321 is not allowed to set the CS and RIP to point to the reset vector.\r
322\r
323 @param[in] BufferStart The reset vector target.\r
324 @param[in] Code16 16-bit protected mode code segment value.\r
325 @param[in] Code32 32-bit protected mode code segment value.\r
326 @param[in] StackStart The start of a stack to be used for transitioning\r
327 from long mode to real mode.\r
328**/\r
329typedef\r
e2289d19 330 VOID\r
053e878b 331(EFIAPI AP_RESET)(\r
7b7508ad
TL		 332 IN UINTN BufferStart,\r
333 IN UINT16 Code16,\r
334 IN UINT16 Code32,\r
335 IN UINTN StackStart\r
336 );\r
337\r
053e878b 338extern EFI_GUID mCpuInitMpLibHobGuid;\r
93ca4c0f 339\r
76157021
JF		 340/**\r
341 Assembly code to place AP into safe loop mode.\r
342\r
343 Place AP into targeted C-State if MONITOR is supported, otherwise\r
344 place AP into hlt state.\r
345 Place AP in protected mode if the current is long mode. Due to AP maybe\r
346 wakeup by some hardware event. It could avoid accessing page table that\r
347 may not available during booting to OS.\r
348\r
349 @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r
350 FALSE indicates MONITOR is not supported.\r
351 @param[in] ApTargetCState Target C-State value.\r
352 @param[in] PmCodeSegment Protected mode code segment value.\r
353**/\r
354typedef\r
e2289d19 355 VOID\r
053e878b 356(EFIAPI *ASM_RELOCATE_AP_LOOP)(\r
76157021
JF		 357 IN BOOLEAN MwaitSupport,\r
358 IN UINTN ApTargetCState,\r
bf2786dc 359 IN UINTN PmCodeSegment,\r
9f91cb01 360 IN UINTN TopOfApStack,\r
20da7ca4
TL		 361 IN UINTN NumberToFinish,\r
362 IN UINTN Pm16CodeSegment,\r
363 IN UINTN SevEsAPJumpTable,\r
364 IN UINTN WakeupBuffer\r
76157021 365 );\r
f7f85d83
JF		 366\r
367/**\r
368 Assembly code to get starting address and size of the rendezvous entry for APs.\r
369 Information for fixing a jump instruction in the code is also returned.\r
370\r
371 @param[out] AddressMap Output buffer for address map information.\r
372**/\r
373VOID\r
374EFIAPI\r
375AsmGetAddressMap (\r
053e878b 376 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
f7f85d83
JF		 377 );\r
378\r
41be0da5
JF		 379/**\r
380 This function is called by both the BSP and the AP which is to become the BSP to\r
381 Exchange execution context including stack between them. After return from this\r
382 function, the BSP becomes AP and the AP becomes the BSP.\r
383\r
384 @param[in] MyInfo Pointer to buffer holding the exchanging information for the executing processor.\r
385 @param[in] OthersInfo Pointer to buffer holding the exchanging information for the peer.\r
386\r
387**/\r
388VOID\r
389EFIAPI\r
390AsmExchangeRole (\r
053e878b
MK		 391 IN CPU_EXCHANGE_ROLE_INFO *MyInfo,\r
392 IN CPU_EXCHANGE_ROLE_INFO *OthersInfo\r
41be0da5
JF		 393 );\r
394\r
93ca4c0f
JF		 395/**\r
396 Get the pointer to CPU MP Data structure.\r
397\r
398 @return The pointer to CPU MP Data structure.\r
399**/\r
400CPU_MP_DATA *\r
401GetCpuMpData (\r
402 VOID\r
403 );\r
404\r
405/**\r
406 Save the pointer to CPU MP Data structure.\r
407\r
408 @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r
409**/\r
410VOID\r
411SaveCpuMpData (\r
053e878b 412 IN CPU_MP_DATA *CpuMpData\r
93ca4c0f
JF		 413 );\r
414\r
ed66e0e3 415/**\r
a6b3d753 416 Get available system memory below 1MB by specified size.\r
ed66e0e3 417\r
a6b3d753
SZ		 418 @param[in] WakeupBufferSize Wakeup buffer size required\r
419\r
420 @retval other Return wakeup buffer address below 1MB.\r
421 @retval -1 Cannot find free memory below 1MB.\r
ed66e0e3 422**/\r
a6b3d753
SZ		 423UINTN\r
424GetWakeupBuffer (\r
053e878b 425 IN UINTN WakeupBufferSize\r
ed66e0e3
JF		 426 );\r
427\r
f32bfe6d
JW		 428/**\r
429 Get available EfiBootServicesCode memory below 4GB by specified size.\r
430\r
431 This buffer is required to safely transfer AP from real address mode to\r
432 protected mode or long mode, due to the fact that the buffer returned by\r
433 GetWakeupBuffer() may be marked as non-executable.\r
434\r
435 @param[in] BufferSize Wakeup transition buffer size.\r
436\r
437 @retval other Return wakeup transition buffer address below 4GB.\r
438 @retval 0 Cannot find free memory below 4GB.\r
439**/\r
440UINTN\r
441GetModeTransitionBuffer (\r
053e878b 442 IN UINTN BufferSize\r
f32bfe6d
JW		 443 );\r
444\r
7b7508ad
TL		 445/**\r
446 Return the address of the SEV-ES AP jump table.\r
447\r
448 This buffer is required in order for an SEV-ES guest to transition from\r
449 UEFI into an OS.\r
450\r
451 @return Return SEV-ES AP jump table buffer\r
452**/\r
453UINTN\r
454GetSevEsAPMemory (\r
455 VOID\r
456 );\r
457\r
96f5920d
JF		 458/**\r
459 This function will be called by BSP to wakeup AP.\r
460\r
461 @param[in] CpuMpData Pointer to CPU MP Data\r
462 @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r
463 FALSE: Send IPI to AP by ApicId\r
464 @param[in] ProcessorNumber The handle number of specified processor\r
465 @param[in] Procedure The function to be invoked by AP\r
466 @param[in] ProcedureArgument The argument to be passed into AP function\r
cf4e79e4 467 @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r
96f5920d
JF		 468**/\r
469VOID\r
470WakeUpAP (\r
053e878b
MK		 471 IN CPU_MP_DATA *CpuMpData,\r
472 IN BOOLEAN Broadcast,\r
473 IN UINTN ProcessorNumber,\r
474 IN EFI_AP_PROCEDURE Procedure OPTIONAL,\r
475 IN VOID *ProcedureArgument OPTIONAL,\r
476 IN BOOLEAN WakeUpDisabledAps OPTIONAL\r
96f5920d
JF		 477 );\r
478\r
93ca4c0f
JF		 479/**\r
480 Initialize global data for MP support.\r
481\r
482 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
483**/\r
484VOID\r
485InitMpGlobalData (\r
053e878b 486 IN CPU_MP_DATA *CpuMpData\r
93ca4c0f
JF		 487 );\r
488\r
86efe976
JF		 489/**\r
490 Worker function to execute a caller provided function on all enabled APs.\r
491\r
492 @param[in] Procedure A pointer to the function to be run on\r
493 enabled APs of the system.\r
494 @param[in] SingleThread If TRUE, then all the enabled APs execute\r
495 the function specified by Procedure one by\r
496 one, in ascending order of processor handle\r
497 number. If FALSE, then all the enabled APs\r
498 execute the function specified by Procedure\r
499 simultaneously.\r
ee0c39fa 500 @param[in] ExcludeBsp Whether let BSP also trig this task.\r
86efe976
JF		 501 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
502 service.\r
367284e7 503 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
86efe976
JF		 504 APs to return from Procedure, either for\r
505 blocking or non-blocking mode.\r
506 @param[in] ProcedureArgument The parameter passed into Procedure for\r
507 all APs.\r
508 @param[out] FailedCpuList If all APs finish successfully, then its\r
509 content is set to NULL. If not all APs\r
510 finish before timeout expires, then its\r
511 content is set to address of the buffer\r
512 holding handle numbers of the failed APs.\r
513\r
514 @retval EFI_SUCCESS In blocking mode, all APs have finished before\r
515 the timeout expired.\r
516 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r
517 to all enabled APs.\r
518 @retval others Failed to Startup all APs.\r
519\r
520**/\r
521EFI_STATUS\r
ee0c39fa 522StartupAllCPUsWorker (\r
053e878b
MK		 523 IN EFI_AP_PROCEDURE Procedure,\r
524 IN BOOLEAN SingleThread,\r
525 IN BOOLEAN ExcludeBsp,\r
526 IN EFI_EVENT WaitEvent OPTIONAL,\r
527 IN UINTN TimeoutInMicroseconds,\r
528 IN VOID *ProcedureArgument OPTIONAL,\r
529 OUT UINTN **FailedCpuList OPTIONAL\r
86efe976
JF		 530 );\r
531\r
20ae5774
JF		 532/**\r
533 Worker function to let the caller get one enabled AP to execute a caller-provided\r
534 function.\r
535\r
536 @param[in] Procedure A pointer to the function to be run on\r
537 enabled APs of the system.\r
538 @param[in] ProcessorNumber The handle number of the AP.\r
539 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
540 service.\r
367284e7 541 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
20ae5774
JF		 542 APs to return from Procedure, either for\r
543 blocking or non-blocking mode.\r
544 @param[in] ProcedureArgument The parameter passed into Procedure for\r
545 all APs.\r
546 @param[out] Finished If AP returns from Procedure before the\r
547 timeout expires, its content is set to TRUE.\r
548 Otherwise, the value is set to FALSE.\r
549\r
550 @retval EFI_SUCCESS In blocking mode, specified AP finished before\r
551 the timeout expires.\r
552 @retval others Failed to Startup AP.\r
553\r
554**/\r
555EFI_STATUS\r
556StartupThisAPWorker (\r
053e878b
MK		 557 IN EFI_AP_PROCEDURE Procedure,\r
558 IN UINTN ProcessorNumber,\r
559 IN EFI_EVENT WaitEvent OPTIONAL,\r
560 IN UINTN TimeoutInMicroseconds,\r
561 IN VOID *ProcedureArgument OPTIONAL,\r
562 OUT BOOLEAN *Finished OPTIONAL\r
20ae5774
JF		 563 );\r
564\r
41be0da5
JF		 565/**\r
566 Worker function to switch the requested AP to be the BSP from that point onward.\r
567\r
568 @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r
569 @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an\r
570 enabled AP. Otherwise, it will be disabled.\r
571\r
572 @retval EFI_SUCCESS BSP successfully switched.\r
7367cc6c 573 @retval others Failed to switch BSP.\r
41be0da5
JF		 574\r
575**/\r
576EFI_STATUS\r
577SwitchBSPWorker (\r
053e878b
MK		 578 IN UINTN ProcessorNumber,\r
579 IN BOOLEAN EnableOldBSP\r
41be0da5
JF		 580 );\r
581\r
e37109bc
JF		 582/**\r
583 Worker function to let the caller enable or disable an AP from this point onward.\r
584 This service may only be called from the BSP.\r
585\r
586 @param[in] ProcessorNumber The handle number of AP.\r
587 @param[in] EnableAP Specifies the new state for the processor for\r
588 enabled, FALSE for disabled.\r
589 @param[in] HealthFlag If not NULL, a pointer to a value that specifies\r
590 the new health status of the AP.\r
591\r
592 @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.\r
593 @retval others Failed to Enable/Disable AP.\r
594\r
595**/\r
596EFI_STATUS\r
597EnableDisableApWorker (\r
053e878b
MK		 598 IN UINTN ProcessorNumber,\r
599 IN BOOLEAN EnableAP,\r
600 IN UINT32 *HealthFlag OPTIONAL\r
e37109bc
JF		 601 );\r
602\r
93ca4c0f
JF		 603/**\r
604 Get pointer to CPU MP Data structure from GUIDed HOB.\r
605\r
606 @return The pointer to CPU MP Data structure.\r
607**/\r
608CPU_MP_DATA *\r
609GetCpuMpDataFromGuidedHob (\r
610 VOID\r
611 );\r
08085f08
JF		 612\r
613/** Checks status of specified AP.\r
614\r
615 This function checks whether the specified AP has finished the task assigned\r
616 by StartupThisAP(), and whether timeout expires.\r
617\r
618 @param[in] ProcessorNumber The handle number of processor.\r
619\r
620 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r
621 @retval EFI_TIMEOUT The timeout expires.\r
622 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r
623**/\r
624EFI_STATUS\r
625CheckThisAP (\r
053e878b 626 IN UINTN ProcessorNumber\r
08085f08
JF		 627 );\r
628\r
629/**\r
630 Checks status of all APs.\r
631\r
632 This function checks whether all APs have finished task assigned by StartupAllAPs(),\r
633 and whether timeout expires.\r
634\r
635 @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r
636 @retval EFI_TIMEOUT The timeout expires.\r
637 @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r
638**/\r
639EFI_STATUS\r
640CheckAllAPs (\r
641 VOID\r
642 );\r
643\r
644/**\r
645 Checks APs status and updates APs status if needed.\r
646\r
647**/\r
648VOID\r
649CheckAndUpdateApsStatus (\r
650 VOID\r
651 );\r
652\r
94f63c76
JF		 653/**\r
654 Detect whether specified processor can find matching microcode patch and load it.\r
655\r
e1ed5573
HW		 656 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
657 @param[in] ProcessorNumber The handle number of the processor. The range is\r
658 from 0 to the total number of logical processors\r
659 minus 1.\r
94f63c76
JF		 660**/\r
661VOID\r
662MicrocodeDetect (\r
053e878b
MK		 663 IN CPU_MP_DATA *CpuMpData,\r
664 IN UINTN ProcessorNumber\r
94f63c76
JF		 665 );\r
666\r
d786a172 667/**\r
dd017041 668 Shadow the required microcode patches data into memory.\r
d786a172
HW		 669\r
670 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
671**/\r
672VOID\r
dd017041 673ShadowMicrocodeUpdatePatch (\r
053e878b 674 IN OUT CPU_MP_DATA *CpuMpData\r
d786a172
HW		 675 );\r
676\r
348a34d9
HW		 677/**\r
678 Get the cached microcode patch base address and size from the microcode patch\r
679 information cache HOB.\r
680\r
681 @param[out] Address Base address of the microcode patches data.\r
682 It will be updated if the microcode patch\r
683 information cache HOB is found.\r
684 @param[out] RegionSize Size of the microcode patches data.\r
685 It will be updated if the microcode patch\r
686 information cache HOB is found.\r
687\r
688 @retval TRUE The microcode patch information cache HOB is found.\r
689 @retval FALSE The microcode patch information cache HOB is not found.\r
690\r
691**/\r
692BOOLEAN\r
693GetMicrocodePatchInfoFromHob (\r
053e878b
MK		 694 UINT64 *Address,\r
695 UINT64 *RegionSize\r
348a34d9
HW		 696 );\r
697\r
4d3314f6
JF		 698/**\r
699 Detect whether Mwait-monitor feature is supported.\r
700\r
701 @retval TRUE Mwait-monitor feature is supported.\r
702 @retval FALSE Mwait-monitor feature is not supported.\r
703**/\r
704BOOLEAN\r
705IsMwaitSupport (\r
706 VOID\r
707 );\r
708\r
43c9fdcc
JF		 709/**\r
710 Enable Debug Agent to support source debugging on AP function.\r
711\r
712**/\r
713VOID\r
714EnableDebugAgent (\r
715 VOID\r
716 );\r
717\r
e1ed5573
HW		 718/**\r
719 Find the current Processor number by APIC ID.\r
720\r
721 @param[in] CpuMpData Pointer to PEI CPU MP Data\r
722 @param[out] ProcessorNumber Return the pocessor number found\r
723\r
724 @retval EFI_SUCCESS ProcessorNumber is found and returned.\r
725 @retval EFI_NOT_FOUND ProcessorNumber is not found.\r
726**/\r
727EFI_STATUS\r
728GetProcessorNumber (\r
053e878b
MK		 729 IN CPU_MP_DATA *CpuMpData,\r
730 OUT UINTN *ProcessorNumber\r
e1ed5573
HW		 731 );\r
732\r
c788c2b1
SF		 733/**\r
734 This funtion will try to invoke platform specific microcode shadow logic to\r
735 relocate microcode update patches into memory.\r
736\r
4ac82ea1 737 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
c788c2b1
SF		 738\r
739 @retval EFI_SUCCESS Shadow microcode success.\r
740 @retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.\r
741 @retval EFI_UNSUPPORTED Can't find platform specific microcode shadow\r
742 PPI/Protocol.\r
743**/\r
744EFI_STATUS\r
745PlatformShadowMicrocode (\r
053e878b 746 IN OUT CPU_MP_DATA *CpuMpData\r
c788c2b1
SF		 747 );\r
748\r
e2289d19
BS		 749/**\r
750 Allocate the SEV-ES AP jump table buffer.\r
751\r
752 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
753**/\r
754VOID\r
755AllocateSevEsAPMemory (\r
756 IN OUT CPU_MP_DATA *CpuMpData\r
757 );\r
758\r
759/**\r
760 Program the SEV-ES AP jump table buffer.\r
761\r
762 @param[in] SipiVector The SIPI vector used for the AP Reset\r
763**/\r
764VOID\r
765SetSevEsJumpTable (\r
766 IN UINTN SipiVector\r
767 );\r
768\r
769/**\r
770 The function puts the AP in halt loop.\r
771\r
772 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
773**/\r
774VOID\r
775SevEsPlaceApHlt (\r
776 CPU_MP_DATA *CpuMpData\r
777 );\r
778\r
b95908e0
BS		 779/**\r
780 Check if the specified confidential computing attribute is active.\r
781\r
782 @retval TRUE The specified Attr is active.\r
783 @retval FALSE The specified Attr is not active.\r
784**/\r
785BOOLEAN\r
786EFIAPI\r
787ConfidentialComputingGuestHas (\r
788 CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr\r
789 );\r
790\r
3e8ad6bd 791#endif\r
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