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UefiCpuPkg: Add PCD to control SMRR enable & SmmFeatureControl support
[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / MpLib.h
CommitLineData
3e8ad6bd
JF		 1/** @file\r
2 Common header file for MP Initialize Library.\r
3\r
b4d7b9d2 4 Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>\r
4c0f6e34
LD		 5 Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
6\r
0acd8697 7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
3e8ad6bd
JF		 8\r
9**/\r
10\r
11#ifndef _MP_LIB_H_\r
12#define _MP_LIB_H_\r
13\r
14#include <PiPei.h>\r
15\r
01acb06c 16#include <Register/Intel/Cpuid.h>\r
4c0f6e34 17#include <Register/Amd/Cpuid.h>\r
06544455 18#include <Register/Amd/Ghcb.h>\r
01acb06c
RN		 19#include <Register/Intel/Msr.h>\r
20#include <Register/Intel/LocalApic.h>\r
21#include <Register/Intel/Microcode.h>\r
3e8ad6bd
JF		 22\r
23#include <Library/MpInitLib.h>\r
24#include <Library/BaseLib.h>\r
25#include <Library/BaseMemoryLib.h>\r
26#include <Library/MemoryAllocationLib.h>\r
27#include <Library/DebugLib.h>\r
28#include <Library/LocalApicLib.h>\r
29#include <Library/CpuLib.h>\r
30#include <Library/UefiCpuLib.h>\r
31#include <Library/TimerLib.h>\r
32#include <Library/SynchronizationLib.h>\r
33#include <Library/MtrrLib.h>\r
34#include <Library/HobLib.h>\r
d5339c04 35#include <Library/PcdLib.h>\r
bce03284 36#include <Library/MicrocodeLib.h>\r
b95908e0 37#include <ConfidentialComputingGuestAttr.h>\r
3e8ad6bd 38\r
e2289d19
BS		 39#include <Register/Amd/Fam17Msr.h>\r
40#include <Register/Amd/Ghcb.h>\r
41\r
348a34d9
HW		 42#include <Guid/MicrocodePatchHob.h>\r
43\r
053e878b 44#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r
b8b04307 45\r
93ca4c0f
JF		 46#define CPU_INIT_MP_LIB_HOB_GUID \\r
47 { \\r
48 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r
49 }\r
50\r
41be0da5
JF		 51//\r
52// The MP data for switch BSP\r
53//\r
053e878b
MK		 54#define CPU_SWITCH_STATE_IDLE 0\r
55#define CPU_SWITCH_STATE_STORED 1\r
56#define CPU_SWITCH_STATE_LOADED 2\r
41be0da5 57\r
d786a172
HW		 58//\r
59// Default maximum number of entries to store the microcode patches information\r
60//\r
053e878b 61#define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r
d786a172
HW		 62\r
63//\r
64// Data structure for microcode patch information\r
65//\r
66typedef struct {\r
67 UINTN Address;\r
68 UINTN Size;\r
d786a172
HW		 69} MICROCODE_PATCH_INFO;\r
70\r
41be0da5
JF		 71//\r
72// CPU exchange information for switch BSP\r
73//\r
74typedef struct {\r
053e878b
MK		 75 UINT8 State; // offset 0\r
76 UINTN StackPointer; // offset 4 / 8\r
77 IA32_DESCRIPTOR Gdtr; // offset 8 / 16\r
78 IA32_DESCRIPTOR Idtr; // offset 14 / 26\r
41be0da5
JF		 79} CPU_EXCHANGE_ROLE_INFO;\r
80\r
9ebcf0f4
JF		 81//\r
82// AP loop state when APs are in idle state\r
83// It's value is the same with PcdCpuApLoopMode\r
84//\r
85typedef enum {\r
86 ApInHltLoop = 1,\r
87 ApInMwaitLoop = 2,\r
88 ApInRunLoop = 3\r
89} AP_LOOP_MODE;\r
90\r
e59f8f6b
JF		 91//\r
92// AP initialization state during APs wakeup\r
93//\r
94typedef enum {\r
95 ApInitConfig = 1,\r
96 ApInitReconfig = 2,\r
97 ApInitDone = 3\r
98} AP_INIT_STATE;\r
99\r
03a1a925
JF		 100//\r
101// AP state\r
102//\r
2a5997f8
ED		 103// The state transitions for an AP when it process a procedure are:\r
104// Idle ----> Ready ----> Busy ----> Idle\r
105// [BSP] [AP] [AP]\r
106//\r
03a1a925
JF		 107typedef enum {\r
108 CpuStateIdle,\r
109 CpuStateReady,\r
110 CpuStateBusy,\r
e048ce88 111 CpuStateFinished,\r
03a1a925
JF		 112 CpuStateDisabled\r
113} CPU_STATE;\r
114\r
68cb9330
JF		 115//\r
116// CPU volatile registers around INIT-SIPI-SIPI\r
117//\r
118typedef struct {\r
053e878b
MK		 119 UINTN Cr0;\r
120 UINTN Cr3;\r
121 UINTN Cr4;\r
122 UINTN Dr0;\r
123 UINTN Dr1;\r
124 UINTN Dr2;\r
125 UINTN Dr3;\r
126 UINTN Dr6;\r
127 UINTN Dr7;\r
128 IA32_DESCRIPTOR Gdtr;\r
129 IA32_DESCRIPTOR Idtr;\r
130 UINT16 Tr;\r
68cb9330
JF		 131} CPU_VOLATILE_REGISTERS;\r
132\r
e59f8f6b
JF		 133//\r
134// AP related data\r
135//\r
136typedef struct {\r
053e878b
MK		 137 SPIN_LOCK ApLock;\r
138 volatile UINT32 *StartupApSignal;\r
139 volatile UINTN ApFunction;\r
140 volatile UINTN ApFunctionArgument;\r
141 BOOLEAN CpuHealthy;\r
142 volatile CPU_STATE State;\r
143 CPU_VOLATILE_REGISTERS VolatileRegisters;\r
144 BOOLEAN Waiting;\r
145 BOOLEAN *Finished;\r
146 UINT64 ExpectedTime;\r
147 UINT64 CurrentTime;\r
148 UINT64 TotalTime;\r
149 EFI_EVENT WaitEvent;\r
150 UINT32 ProcessorSignature;\r
151 UINT8 PlatformId;\r
152 UINT64 MicrocodeEntryAddr;\r
153 UINT32 MicrocodeRevision;\r
06544455 154 SEV_ES_SAVE_AREA *SevEsSaveArea;\r
e59f8f6b
JF		 155} CPU_AP_DATA;\r
156\r
157//\r
158// Basic CPU information saved in Guided HOB.\r
159// Because the contents will be shard between PEI and DXE,\r
160// we need to make sure the each fields offset same in different\r
161// architecture.\r
162//\r
dd3fa0cd 163#pragma pack (1)\r
e59f8f6b 164typedef struct {\r
053e878b
MK		 165 UINT32 InitialApicId;\r
166 UINT32 ApicId;\r
167 UINT32 Health;\r
168 UINT64 ApTopOfStack;\r
e59f8f6b 169} CPU_INFO_IN_HOB;\r
dd3fa0cd 170#pragma pack ()\r
e59f8f6b 171\r
f7f85d83
JF		 172//\r
173// AP reset code information including code address and size,\r
174// this structure will be shared be C code and assembly code.\r
175// It is natural aligned by design.\r
176//\r
177typedef struct {\r
053e878b
MK		 178 UINT8 *RendezvousFunnelAddress;\r
179 UINTN ModeEntryOffset;\r
180 UINTN RendezvousFunnelSize;\r
181 UINT8 *RelocateApLoopFuncAddress;\r
182 UINTN RelocateApLoopFuncSize;\r
183 UINTN ModeTransitionOffset;\r
053e878b
MK		 184 UINTN SwitchToRealNoNxOffset;\r
185 UINTN SwitchToRealPM16ModeOffset;\r
186 UINTN SwitchToRealPM16ModeSize;\r
f7f85d83 187} MP_ASSEMBLY_ADDRESS_MAP;\r
3e8ad6bd 188\r
053e878b 189typedef struct _CPU_MP_DATA CPU_MP_DATA;\r
e59f8f6b 190\r
d94e5f67
JF		 191#pragma pack(1)\r
192\r
193//\r
194// MP CPU exchange information for AP reset code\r
195// This structure is required to be packed because fixed field offsets\r
196// into this structure are used in assembly code in this module\r
197//\r
198typedef struct {\r
053e878b
MK		 199 UINTN StackStart;\r
200 UINTN StackSize;\r
201 UINTN CFunction;\r
202 IA32_DESCRIPTOR GdtrProfile;\r
203 IA32_DESCRIPTOR IdtrProfile;\r
204 UINTN BufferStart;\r
205 UINTN ModeOffset;\r
206 UINTN ApIndex;\r
207 UINTN CodeSegment;\r
208 UINTN DataSegment;\r
209 UINTN EnableExecuteDisable;\r
210 UINTN Cr3;\r
211 UINTN InitFlag;\r
212 CPU_INFO_IN_HOB *CpuInfo;\r
213 UINTN NumApsExecuting;\r
214 CPU_MP_DATA *CpuMpData;\r
215 UINTN InitializeFloatingPointUnitsAddress;\r
216 UINT32 ModeTransitionMemory;\r
217 UINT16 ModeTransitionSegment;\r
218 UINT32 ModeHighMemory;\r
219 UINT16 ModeHighSegment;\r
09f69a87
RN		 220 //\r
221 // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r
222 //\r
053e878b
MK		 223 BOOLEAN Enable5LevelPaging;\r
224 BOOLEAN SevEsIsEnabled;\r
9c703bc0 225 BOOLEAN SevSnpIsEnabled;\r
053e878b 226 UINTN GhcbBase;\r
d4d7c9ad 227 BOOLEAN ExtTopoAvail;\r
d94e5f67
JF		 228} MP_CPU_EXCHANGE_INFO;\r
229\r
230#pragma pack()\r
e59f8f6b
JF		 231\r
232//\r
233// CPU MP Data save in memory\r
234//\r
235struct _CPU_MP_DATA {\r
053e878b
MK		 236 UINT64 CpuInfoInHob;\r
237 UINT32 CpuCount;\r
238 UINT32 BspNumber;\r
e59f8f6b
JF		 239 //\r
240 // The above fields data will be passed from PEI to DXE\r
241 // Please make sure the fields offset same in the different\r
242 // architecture.\r
243 //\r
053e878b
MK		 244 SPIN_LOCK MpLock;\r
245 UINTN Buffer;\r
246 UINTN CpuApStackSize;\r
247 MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
248 UINTN WakeupBuffer;\r
249 UINTN WakeupBufferHigh;\r
250 UINTN BackupBuffer;\r
251 UINTN BackupBufferSize;\r
252\r
253 volatile UINT32 FinishedCount;\r
254 UINT32 RunningCount;\r
255 BOOLEAN SingleThread;\r
256 EFI_AP_PROCEDURE Procedure;\r
257 VOID *ProcArguments;\r
258 BOOLEAN *Finished;\r
259 UINT64 ExpectedTime;\r
260 UINT64 CurrentTime;\r
261 UINT64 TotalTime;\r
262 EFI_EVENT WaitEvent;\r
263 UINTN **FailedCpuList;\r
264\r
265 AP_INIT_STATE InitFlag;\r
266 BOOLEAN SwitchBspFlag;\r
267 UINTN NewBspNumber;\r
268 CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
269 CPU_EXCHANGE_ROLE_INFO APInfo;\r
270 MTRR_SETTINGS MtrrTable;\r
271 UINT8 ApLoopMode;\r
272 UINT8 ApTargetCState;\r
273 UINT16 PmCodeSegment;\r
274 UINT16 Pm16CodeSegment;\r
275 CPU_AP_DATA *CpuData;\r
276 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
277\r
278 UINT32 CurrentTimerCount;\r
279 UINTN DivideValue;\r
280 UINT8 Vector;\r
281 BOOLEAN PeriodicMode;\r
282 BOOLEAN TimerInterruptState;\r
283 UINT64 MicrocodePatchAddress;\r
284 UINT64 MicrocodePatchRegionSize;\r
2a089134 285\r
58942277
ED		 286 //\r
287 // Whether need to use Init-Sipi-Sipi to wake up the APs.\r
288 // Two cases need to set this value to TRUE. One is in HLT\r
289 // loop mode, the other is resume from S3 which loop mode\r
e23d9c3e 290 // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r
58942277
ED		 291 // driver.\r
292 //\r
053e878b 293 BOOLEAN WakeUpByInitSipiSipi;\r
e88a5b98 294\r
053e878b 295 BOOLEAN SevEsIsEnabled;\r
9c703bc0 296 BOOLEAN SevSnpIsEnabled;\r
06544455 297 BOOLEAN UseSevEsAPMethod;\r
053e878b
MK		 298 UINTN SevEsAPBuffer;\r
299 UINTN SevEsAPResetStackStart;\r
300 CPU_MP_DATA *NewCpuMpData;\r
7b7508ad 301\r
053e878b 302 UINT64 GhcbBase;\r
e59f8f6b 303};\r
93ca4c0f 304\r
053e878b
MK		 305#define AP_SAFE_STACK_SIZE 128\r
306#define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE\r
7b7508ad
TL		 307\r
308#pragma pack(1)\r
309\r
310typedef struct {\r
053e878b
MK		 311 UINT8 InsnBuffer[8];\r
312 UINT16 Rip;\r
313 UINT16 Segment;\r
7b7508ad
TL		 314} SEV_ES_AP_JMP_FAR;\r
315\r
316#pragma pack()\r
317\r
318/**\r
319 Assembly code to move an AP from long mode to real mode.\r
320\r
321 Move an AP from long mode to real mode in preparation to invoking\r
322 the reset vector. This is used for SEV-ES guests where a hypervisor\r
323 is not allowed to set the CS and RIP to point to the reset vector.\r
324\r
325 @param[in] BufferStart The reset vector target.\r
326 @param[in] Code16 16-bit protected mode code segment value.\r
327 @param[in] Code32 32-bit protected mode code segment value.\r
328 @param[in] StackStart The start of a stack to be used for transitioning\r
329 from long mode to real mode.\r
330**/\r
331typedef\r
e2289d19 332 VOID\r
053e878b 333(EFIAPI AP_RESET)(\r
7b7508ad
TL		 334 IN UINTN BufferStart,\r
335 IN UINT16 Code16,\r
336 IN UINT16 Code32,\r
337 IN UINTN StackStart\r
338 );\r
339\r
053e878b 340extern EFI_GUID mCpuInitMpLibHobGuid;\r
93ca4c0f 341\r
76157021
JF		 342/**\r
343 Assembly code to place AP into safe loop mode.\r
344\r
345 Place AP into targeted C-State if MONITOR is supported, otherwise\r
346 place AP into hlt state.\r
347 Place AP in protected mode if the current is long mode. Due to AP maybe\r
348 wakeup by some hardware event. It could avoid accessing page table that\r
349 may not available during booting to OS.\r
350\r
351 @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r
352 FALSE indicates MONITOR is not supported.\r
353 @param[in] ApTargetCState Target C-State value.\r
354 @param[in] PmCodeSegment Protected mode code segment value.\r
355**/\r
356typedef\r
e2289d19 357 VOID\r
053e878b 358(EFIAPI *ASM_RELOCATE_AP_LOOP)(\r
76157021
JF		 359 IN BOOLEAN MwaitSupport,\r
360 IN UINTN ApTargetCState,\r
bf2786dc 361 IN UINTN PmCodeSegment,\r
9f91cb01 362 IN UINTN TopOfApStack,\r
20da7ca4
TL		 363 IN UINTN NumberToFinish,\r
364 IN UINTN Pm16CodeSegment,\r
365 IN UINTN SevEsAPJumpTable,\r
366 IN UINTN WakeupBuffer\r
76157021 367 );\r
f7f85d83
JF		 368\r
369/**\r
370 Assembly code to get starting address and size of the rendezvous entry for APs.\r
371 Information for fixing a jump instruction in the code is also returned.\r
372\r
373 @param[out] AddressMap Output buffer for address map information.\r
374**/\r
375VOID\r
376EFIAPI\r
377AsmGetAddressMap (\r
053e878b 378 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
f7f85d83
JF		 379 );\r
380\r
41be0da5
JF		 381/**\r
382 This function is called by both the BSP and the AP which is to become the BSP to\r
383 Exchange execution context including stack between them. After return from this\r
384 function, the BSP becomes AP and the AP becomes the BSP.\r
385\r
386 @param[in] MyInfo Pointer to buffer holding the exchanging information for the executing processor.\r
387 @param[in] OthersInfo Pointer to buffer holding the exchanging information for the peer.\r
388\r
389**/\r
390VOID\r
391EFIAPI\r
392AsmExchangeRole (\r
053e878b
MK		 393 IN CPU_EXCHANGE_ROLE_INFO *MyInfo,\r
394 IN CPU_EXCHANGE_ROLE_INFO *OthersInfo\r
41be0da5
JF		 395 );\r
396\r
93ca4c0f
JF		 397/**\r
398 Get the pointer to CPU MP Data structure.\r
399\r
400 @return The pointer to CPU MP Data structure.\r
401**/\r
402CPU_MP_DATA *\r
403GetCpuMpData (\r
404 VOID\r
405 );\r
406\r
407/**\r
408 Save the pointer to CPU MP Data structure.\r
409\r
410 @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r
411**/\r
412VOID\r
413SaveCpuMpData (\r
053e878b 414 IN CPU_MP_DATA *CpuMpData\r
93ca4c0f
JF		 415 );\r
416\r
ed66e0e3 417/**\r
a6b3d753 418 Get available system memory below 1MB by specified size.\r
ed66e0e3 419\r
a6b3d753
SZ		 420 @param[in] WakeupBufferSize Wakeup buffer size required\r
421\r
422 @retval other Return wakeup buffer address below 1MB.\r
423 @retval -1 Cannot find free memory below 1MB.\r
ed66e0e3 424**/\r
a6b3d753
SZ		 425UINTN\r
426GetWakeupBuffer (\r
053e878b 427 IN UINTN WakeupBufferSize\r
ed66e0e3
JF		 428 );\r
429\r
f32bfe6d
JW		 430/**\r
431 Get available EfiBootServicesCode memory below 4GB by specified size.\r
432\r
433 This buffer is required to safely transfer AP from real address mode to\r
434 protected mode or long mode, due to the fact that the buffer returned by\r
435 GetWakeupBuffer() may be marked as non-executable.\r
436\r
437 @param[in] BufferSize Wakeup transition buffer size.\r
438\r
439 @retval other Return wakeup transition buffer address below 4GB.\r
440 @retval 0 Cannot find free memory below 4GB.\r
441**/\r
442UINTN\r
54aeed7e 443AllocateCodeBuffer (\r
053e878b 444 IN UINTN BufferSize\r
f32bfe6d
JW		 445 );\r
446\r
7b7508ad
TL		 447/**\r
448 Return the address of the SEV-ES AP jump table.\r
449\r
450 This buffer is required in order for an SEV-ES guest to transition from\r
451 UEFI into an OS.\r
452\r
453 @return Return SEV-ES AP jump table buffer\r
454**/\r
455UINTN\r
456GetSevEsAPMemory (\r
457 VOID\r
458 );\r
459\r
96f5920d
JF		 460/**\r
461 This function will be called by BSP to wakeup AP.\r
462\r
463 @param[in] CpuMpData Pointer to CPU MP Data\r
464 @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r
465 FALSE: Send IPI to AP by ApicId\r
466 @param[in] ProcessorNumber The handle number of specified processor\r
467 @param[in] Procedure The function to be invoked by AP\r
468 @param[in] ProcedureArgument The argument to be passed into AP function\r
cf4e79e4 469 @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r
96f5920d
JF		 470**/\r
471VOID\r
472WakeUpAP (\r
053e878b
MK		 473 IN CPU_MP_DATA *CpuMpData,\r
474 IN BOOLEAN Broadcast,\r
475 IN UINTN ProcessorNumber,\r
476 IN EFI_AP_PROCEDURE Procedure OPTIONAL,\r
477 IN VOID *ProcedureArgument OPTIONAL,\r
0fdd466c 478 IN BOOLEAN WakeUpDisabledAps\r
96f5920d
JF		 479 );\r
480\r
93ca4c0f
JF		 481/**\r
482 Initialize global data for MP support.\r
483\r
484 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
485**/\r
486VOID\r
487InitMpGlobalData (\r
053e878b 488 IN CPU_MP_DATA *CpuMpData\r
93ca4c0f
JF		 489 );\r
490\r
86efe976
JF		 491/**\r
492 Worker function to execute a caller provided function on all enabled APs.\r
493\r
494 @param[in] Procedure A pointer to the function to be run on\r
495 enabled APs of the system.\r
496 @param[in] SingleThread If TRUE, then all the enabled APs execute\r
497 the function specified by Procedure one by\r
498 one, in ascending order of processor handle\r
499 number. If FALSE, then all the enabled APs\r
500 execute the function specified by Procedure\r
501 simultaneously.\r
ee0c39fa 502 @param[in] ExcludeBsp Whether let BSP also trig this task.\r
86efe976
JF		 503 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
504 service.\r
367284e7 505 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
86efe976
JF		 506 APs to return from Procedure, either for\r
507 blocking or non-blocking mode.\r
508 @param[in] ProcedureArgument The parameter passed into Procedure for\r
509 all APs.\r
510 @param[out] FailedCpuList If all APs finish successfully, then its\r
511 content is set to NULL. If not all APs\r
512 finish before timeout expires, then its\r
513 content is set to address of the buffer\r
514 holding handle numbers of the failed APs.\r
515\r
516 @retval EFI_SUCCESS In blocking mode, all APs have finished before\r
517 the timeout expired.\r
518 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r
519 to all enabled APs.\r
520 @retval others Failed to Startup all APs.\r
521\r
522**/\r
523EFI_STATUS\r
ee0c39fa 524StartupAllCPUsWorker (\r
053e878b
MK		 525 IN EFI_AP_PROCEDURE Procedure,\r
526 IN BOOLEAN SingleThread,\r
527 IN BOOLEAN ExcludeBsp,\r
528 IN EFI_EVENT WaitEvent OPTIONAL,\r
529 IN UINTN TimeoutInMicroseconds,\r
530 IN VOID *ProcedureArgument OPTIONAL,\r
531 OUT UINTN **FailedCpuList OPTIONAL\r
86efe976
JF		 532 );\r
533\r
20ae5774
JF		 534/**\r
535 Worker function to let the caller get one enabled AP to execute a caller-provided\r
536 function.\r
537\r
538 @param[in] Procedure A pointer to the function to be run on\r
539 enabled APs of the system.\r
540 @param[in] ProcessorNumber The handle number of the AP.\r
541 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
542 service.\r
367284e7 543 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
20ae5774
JF		 544 APs to return from Procedure, either for\r
545 blocking or non-blocking mode.\r
546 @param[in] ProcedureArgument The parameter passed into Procedure for\r
547 all APs.\r
548 @param[out] Finished If AP returns from Procedure before the\r
549 timeout expires, its content is set to TRUE.\r
550 Otherwise, the value is set to FALSE.\r
551\r
552 @retval EFI_SUCCESS In blocking mode, specified AP finished before\r
553 the timeout expires.\r
554 @retval others Failed to Startup AP.\r
555\r
556**/\r
557EFI_STATUS\r
558StartupThisAPWorker (\r
053e878b
MK		 559 IN EFI_AP_PROCEDURE Procedure,\r
560 IN UINTN ProcessorNumber,\r
561 IN EFI_EVENT WaitEvent OPTIONAL,\r
562 IN UINTN TimeoutInMicroseconds,\r
563 IN VOID *ProcedureArgument OPTIONAL,\r
564 OUT BOOLEAN *Finished OPTIONAL\r
20ae5774
JF		 565 );\r
566\r
41be0da5
JF		 567/**\r
568 Worker function to switch the requested AP to be the BSP from that point onward.\r
569\r
570 @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r
571 @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an\r
572 enabled AP. Otherwise, it will be disabled.\r
573\r
574 @retval EFI_SUCCESS BSP successfully switched.\r
7367cc6c 575 @retval others Failed to switch BSP.\r
41be0da5
JF		 576\r
577**/\r
578EFI_STATUS\r
579SwitchBSPWorker (\r
053e878b
MK		 580 IN UINTN ProcessorNumber,\r
581 IN BOOLEAN EnableOldBSP\r
41be0da5
JF		 582 );\r
583\r
e37109bc
JF		 584/**\r
585 Worker function to let the caller enable or disable an AP from this point onward.\r
586 This service may only be called from the BSP.\r
587\r
588 @param[in] ProcessorNumber The handle number of AP.\r
589 @param[in] EnableAP Specifies the new state for the processor for\r
590 enabled, FALSE for disabled.\r
591 @param[in] HealthFlag If not NULL, a pointer to a value that specifies\r
592 the new health status of the AP.\r
593\r
594 @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.\r
595 @retval others Failed to Enable/Disable AP.\r
596\r
597**/\r
598EFI_STATUS\r
599EnableDisableApWorker (\r
053e878b
MK		 600 IN UINTN ProcessorNumber,\r
601 IN BOOLEAN EnableAP,\r
602 IN UINT32 *HealthFlag OPTIONAL\r
e37109bc
JF		 603 );\r
604\r
93ca4c0f
JF		 605/**\r
606 Get pointer to CPU MP Data structure from GUIDed HOB.\r
607\r
608 @return The pointer to CPU MP Data structure.\r
609**/\r
610CPU_MP_DATA *\r
611GetCpuMpDataFromGuidedHob (\r
612 VOID\r
613 );\r
08085f08
JF		 614\r
615/** Checks status of specified AP.\r
616\r
617 This function checks whether the specified AP has finished the task assigned\r
618 by StartupThisAP(), and whether timeout expires.\r
619\r
620 @param[in] ProcessorNumber The handle number of processor.\r
621\r
622 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r
623 @retval EFI_TIMEOUT The timeout expires.\r
624 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r
625**/\r
626EFI_STATUS\r
627CheckThisAP (\r
053e878b 628 IN UINTN ProcessorNumber\r
08085f08
JF		 629 );\r
630\r
631/**\r
632 Checks status of all APs.\r
633\r
634 This function checks whether all APs have finished task assigned by StartupAllAPs(),\r
635 and whether timeout expires.\r
636\r
637 @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r
638 @retval EFI_TIMEOUT The timeout expires.\r
639 @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r
640**/\r
641EFI_STATUS\r
642CheckAllAPs (\r
643 VOID\r
644 );\r
645\r
646/**\r
647 Checks APs status and updates APs status if needed.\r
648\r
649**/\r
650VOID\r
651CheckAndUpdateApsStatus (\r
652 VOID\r
653 );\r
654\r
94f63c76
JF		 655/**\r
656 Detect whether specified processor can find matching microcode patch and load it.\r
657\r
e1ed5573
HW		 658 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
659 @param[in] ProcessorNumber The handle number of the processor. The range is\r
660 from 0 to the total number of logical processors\r
661 minus 1.\r
94f63c76
JF		 662**/\r
663VOID\r
664MicrocodeDetect (\r
053e878b
MK		 665 IN CPU_MP_DATA *CpuMpData,\r
666 IN UINTN ProcessorNumber\r
94f63c76
JF		 667 );\r
668\r
d786a172 669/**\r
dd017041 670 Shadow the required microcode patches data into memory.\r
d786a172
HW		 671\r
672 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
673**/\r
674VOID\r
dd017041 675ShadowMicrocodeUpdatePatch (\r
053e878b 676 IN OUT CPU_MP_DATA *CpuMpData\r
d786a172
HW		 677 );\r
678\r
348a34d9
HW		 679/**\r
680 Get the cached microcode patch base address and size from the microcode patch\r
681 information cache HOB.\r
682\r
683 @param[out] Address Base address of the microcode patches data.\r
684 It will be updated if the microcode patch\r
685 information cache HOB is found.\r
686 @param[out] RegionSize Size of the microcode patches data.\r
687 It will be updated if the microcode patch\r
688 information cache HOB is found.\r
689\r
690 @retval TRUE The microcode patch information cache HOB is found.\r
691 @retval FALSE The microcode patch information cache HOB is not found.\r
692\r
693**/\r
694BOOLEAN\r
695GetMicrocodePatchInfoFromHob (\r
053e878b
MK		 696 UINT64 *Address,\r
697 UINT64 *RegionSize\r
348a34d9
HW		 698 );\r
699\r
4d3314f6
JF		 700/**\r
701 Detect whether Mwait-monitor feature is supported.\r
702\r
703 @retval TRUE Mwait-monitor feature is supported.\r
704 @retval FALSE Mwait-monitor feature is not supported.\r
705**/\r
706BOOLEAN\r
707IsMwaitSupport (\r
708 VOID\r
709 );\r
710\r
43c9fdcc
JF		 711/**\r
712 Enable Debug Agent to support source debugging on AP function.\r
713\r
714**/\r
715VOID\r
716EnableDebugAgent (\r
717 VOID\r
718 );\r
719\r
e1ed5573
HW		 720/**\r
721 Find the current Processor number by APIC ID.\r
722\r
723 @param[in] CpuMpData Pointer to PEI CPU MP Data\r
724 @param[out] ProcessorNumber Return the pocessor number found\r
725\r
726 @retval EFI_SUCCESS ProcessorNumber is found and returned.\r
727 @retval EFI_NOT_FOUND ProcessorNumber is not found.\r
728**/\r
729EFI_STATUS\r
730GetProcessorNumber (\r
053e878b
MK		 731 IN CPU_MP_DATA *CpuMpData,\r
732 OUT UINTN *ProcessorNumber\r
e1ed5573
HW		 733 );\r
734\r
c788c2b1
SF		 735/**\r
736 This funtion will try to invoke platform specific microcode shadow logic to\r
737 relocate microcode update patches into memory.\r
738\r
4ac82ea1 739 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
c788c2b1
SF		 740\r
741 @retval EFI_SUCCESS Shadow microcode success.\r
742 @retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.\r
743 @retval EFI_UNSUPPORTED Can't find platform specific microcode shadow\r
744 PPI/Protocol.\r
745**/\r
746EFI_STATUS\r
747PlatformShadowMicrocode (\r
053e878b 748 IN OUT CPU_MP_DATA *CpuMpData\r
c788c2b1
SF		 749 );\r
750\r
e2289d19
BS		 751/**\r
752 Allocate the SEV-ES AP jump table buffer.\r
753\r
754 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
755**/\r
756VOID\r
757AllocateSevEsAPMemory (\r
758 IN OUT CPU_MP_DATA *CpuMpData\r
759 );\r
760\r
761/**\r
762 Program the SEV-ES AP jump table buffer.\r
763\r
764 @param[in] SipiVector The SIPI vector used for the AP Reset\r
765**/\r
766VOID\r
767SetSevEsJumpTable (\r
768 IN UINTN SipiVector\r
769 );\r
770\r
771/**\r
772 The function puts the AP in halt loop.\r
773\r
774 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
775**/\r
776VOID\r
777SevEsPlaceApHlt (\r
778 CPU_MP_DATA *CpuMpData\r
779 );\r
780\r
b95908e0
BS		 781/**\r
782 Check if the specified confidential computing attribute is active.\r
783\r
784 @retval TRUE The specified Attr is active.\r
785 @retval FALSE The specified Attr is not active.\r
786**/\r
787BOOLEAN\r
788EFIAPI\r
789ConfidentialComputingGuestHas (\r
790 CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr\r
791 );\r
792\r
d4d7c9ad
MR		 793/**\r
794 The function fills the exchange data for the AP.\r
795\r
796 @param[in] ExchangeInfo The pointer to CPU Exchange Data structure\r
797**/\r
798VOID\r
799FillExchangeInfoDataSevEs (\r
800 IN volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo\r
801 );\r
802\r
06544455
TL		 803/**\r
804 Issue RMPADJUST to adjust the VMSA attribute of an SEV-SNP page.\r
805\r
806 @param[in] PageAddress\r
807 @param[in] VmsaPage\r
808\r
809 @return RMPADJUST return value\r
810**/\r
811UINT32\r
812SevSnpRmpAdjust (\r
813 IN EFI_PHYSICAL_ADDRESS PageAddress,\r
814 IN BOOLEAN VmsaPage\r
815 );\r
816\r
817/**\r
818 Create an SEV-SNP AP save area (VMSA) for use in running the vCPU.\r
819\r
820 @param[in] CpuMpData Pointer to CPU MP Data\r
821 @param[in] CpuData Pointer to CPU AP Data\r
822 @param[in] ApicId APIC ID of the vCPU\r
823**/\r
824VOID\r
825SevSnpCreateSaveArea (\r
826 IN CPU_MP_DATA *CpuMpData,\r
827 IN CPU_AP_DATA *CpuData,\r
828 UINT32 ApicId\r
829 );\r
830\r
831/**\r
832 Create SEV-SNP APs.\r
833\r
834 @param[in] CpuMpData Pointer to CPU MP Data\r
835 @param[in] ProcessorNumber The handle number of specified processor\r
836 (-1 for all APs)\r
837**/\r
838VOID\r
839SevSnpCreateAP (\r
840 IN CPU_MP_DATA *CpuMpData,\r
841 IN INTN ProcessorNumber\r
842 );\r
843\r
3e8ad6bd 844#endif\r
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