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UefiCpuPkg: Simplify the implementation when separate exception stacks
[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / MpLib.h
CommitLineData
3e8ad6bd
JF		 1/** @file\r
2 Common header file for MP Initialize Library.\r
3\r
b4d7b9d2 4 Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>\r
4c0f6e34
LD		 5 Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
6\r
0acd8697 7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
3e8ad6bd
JF		 8\r
9**/\r
10\r
11#ifndef _MP_LIB_H_\r
12#define _MP_LIB_H_\r
13\r
14#include <PiPei.h>\r
15\r
01acb06c 16#include <Register/Intel/Cpuid.h>\r
4c0f6e34 17#include <Register/Amd/Cpuid.h>\r
06544455 18#include <Register/Amd/Ghcb.h>\r
01acb06c
RN		 19#include <Register/Intel/Msr.h>\r
20#include <Register/Intel/LocalApic.h>\r
21#include <Register/Intel/Microcode.h>\r
3e8ad6bd
JF		 22\r
23#include <Library/MpInitLib.h>\r
24#include <Library/BaseLib.h>\r
25#include <Library/BaseMemoryLib.h>\r
26#include <Library/MemoryAllocationLib.h>\r
27#include <Library/DebugLib.h>\r
28#include <Library/LocalApicLib.h>\r
29#include <Library/CpuLib.h>\r
30#include <Library/UefiCpuLib.h>\r
31#include <Library/TimerLib.h>\r
32#include <Library/SynchronizationLib.h>\r
33#include <Library/MtrrLib.h>\r
34#include <Library/HobLib.h>\r
d5339c04 35#include <Library/PcdLib.h>\r
bce03284 36#include <Library/MicrocodeLib.h>\r
b95908e0 37#include <ConfidentialComputingGuestAttr.h>\r
3e8ad6bd 38\r
e2289d19
BS		 39#include <Register/Amd/Fam17Msr.h>\r
40#include <Register/Amd/Ghcb.h>\r
41\r
348a34d9
HW		 42#include <Guid/MicrocodePatchHob.h>\r
43\r
053e878b 44#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r
b8b04307 45\r
93ca4c0f
JF		 46#define CPU_INIT_MP_LIB_HOB_GUID \\r
47 { \\r
48 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r
49 }\r
50\r
41be0da5
JF		 51//\r
52// The MP data for switch BSP\r
53//\r
053e878b
MK		 54#define CPU_SWITCH_STATE_IDLE 0\r
55#define CPU_SWITCH_STATE_STORED 1\r
56#define CPU_SWITCH_STATE_LOADED 2\r
41be0da5 57\r
d786a172
HW		 58//\r
59// Default maximum number of entries to store the microcode patches information\r
60//\r
053e878b 61#define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r
d786a172
HW		 62\r
63//\r
64// Data structure for microcode patch information\r
65//\r
66typedef struct {\r
67 UINTN Address;\r
68 UINTN Size;\r
d786a172
HW		 69} MICROCODE_PATCH_INFO;\r
70\r
d1abb876
ZL		 71//\r
72// CPU volatile registers around INIT-SIPI-SIPI\r
73//\r
74typedef struct {\r
75 UINTN Cr0;\r
76 UINTN Cr3;\r
77 UINTN Cr4;\r
78 UINTN Dr0;\r
79 UINTN Dr1;\r
80 UINTN Dr2;\r
81 UINTN Dr3;\r
82 UINTN Dr6;\r
83 UINTN Dr7;\r
84 IA32_DESCRIPTOR Gdtr;\r
85 IA32_DESCRIPTOR Idtr;\r
86 UINT16 Tr;\r
87} CPU_VOLATILE_REGISTERS;\r
88\r
41be0da5
JF		 89//\r
90// CPU exchange information for switch BSP\r
91//\r
92typedef struct {\r
d1abb876
ZL		 93 UINT8 State; // offset 0\r
94 UINTN StackPointer; // offset 4 / 8\r
95 CPU_VOLATILE_REGISTERS VolatileRegisters; // offset 8 / 16\r
41be0da5
JF		 96} CPU_EXCHANGE_ROLE_INFO;\r
97\r
9ebcf0f4
JF		 98//\r
99// AP loop state when APs are in idle state\r
100// It's value is the same with PcdCpuApLoopMode\r
101//\r
102typedef enum {\r
103 ApInHltLoop = 1,\r
104 ApInMwaitLoop = 2,\r
105 ApInRunLoop = 3\r
106} AP_LOOP_MODE;\r
107\r
e59f8f6b
JF		 108//\r
109// AP initialization state during APs wakeup\r
110//\r
111typedef enum {\r
112 ApInitConfig = 1,\r
113 ApInitReconfig = 2,\r
114 ApInitDone = 3\r
115} AP_INIT_STATE;\r
116\r
03a1a925
JF		 117//\r
118// AP state\r
119//\r
2a5997f8
ED		 120// The state transitions for an AP when it process a procedure are:\r
121// Idle ----> Ready ----> Busy ----> Idle\r
122// [BSP] [AP] [AP]\r
123//\r
03a1a925
JF		 124typedef enum {\r
125 CpuStateIdle,\r
126 CpuStateReady,\r
127 CpuStateBusy,\r
e048ce88 128 CpuStateFinished,\r
03a1a925
JF		 129 CpuStateDisabled\r
130} CPU_STATE;\r
131\r
e59f8f6b
JF		 132//\r
133// AP related data\r
134//\r
135typedef struct {\r
053e878b
MK		 136 SPIN_LOCK ApLock;\r
137 volatile UINT32 *StartupApSignal;\r
138 volatile UINTN ApFunction;\r
139 volatile UINTN ApFunctionArgument;\r
140 BOOLEAN CpuHealthy;\r
141 volatile CPU_STATE State;\r
142 CPU_VOLATILE_REGISTERS VolatileRegisters;\r
143 BOOLEAN Waiting;\r
144 BOOLEAN *Finished;\r
145 UINT64 ExpectedTime;\r
146 UINT64 CurrentTime;\r
147 UINT64 TotalTime;\r
148 EFI_EVENT WaitEvent;\r
149 UINT32 ProcessorSignature;\r
150 UINT8 PlatformId;\r
151 UINT64 MicrocodeEntryAddr;\r
152 UINT32 MicrocodeRevision;\r
06544455 153 SEV_ES_SAVE_AREA *SevEsSaveArea;\r
e59f8f6b
JF		 154} CPU_AP_DATA;\r
155\r
156//\r
157// Basic CPU information saved in Guided HOB.\r
158// Because the contents will be shard between PEI and DXE,\r
159// we need to make sure the each fields offset same in different\r
160// architecture.\r
161//\r
dd3fa0cd 162#pragma pack (1)\r
e59f8f6b 163typedef struct {\r
053e878b
MK		 164 UINT32 InitialApicId;\r
165 UINT32 ApicId;\r
166 UINT32 Health;\r
167 UINT64 ApTopOfStack;\r
e59f8f6b 168} CPU_INFO_IN_HOB;\r
dd3fa0cd 169#pragma pack ()\r
e59f8f6b 170\r
f7f85d83
JF		 171//\r
172// AP reset code information including code address and size,\r
173// this structure will be shared be C code and assembly code.\r
174// It is natural aligned by design.\r
175//\r
176typedef struct {\r
053e878b
MK		 177 UINT8 *RendezvousFunnelAddress;\r
178 UINTN ModeEntryOffset;\r
179 UINTN RendezvousFunnelSize;\r
180 UINT8 *RelocateApLoopFuncAddress;\r
181 UINTN RelocateApLoopFuncSize;\r
182 UINTN ModeTransitionOffset;\r
053e878b
MK		 183 UINTN SwitchToRealNoNxOffset;\r
184 UINTN SwitchToRealPM16ModeOffset;\r
185 UINTN SwitchToRealPM16ModeSize;\r
f7f85d83 186} MP_ASSEMBLY_ADDRESS_MAP;\r
3e8ad6bd 187\r
053e878b 188typedef struct _CPU_MP_DATA CPU_MP_DATA;\r
e59f8f6b 189\r
d94e5f67
JF		 190#pragma pack(1)\r
191\r
192//\r
193// MP CPU exchange information for AP reset code\r
194// This structure is required to be packed because fixed field offsets\r
195// into this structure are used in assembly code in this module\r
196//\r
197typedef struct {\r
053e878b
MK		 198 UINTN StackStart;\r
199 UINTN StackSize;\r
200 UINTN CFunction;\r
201 IA32_DESCRIPTOR GdtrProfile;\r
202 IA32_DESCRIPTOR IdtrProfile;\r
203 UINTN BufferStart;\r
204 UINTN ModeOffset;\r
205 UINTN ApIndex;\r
206 UINTN CodeSegment;\r
207 UINTN DataSegment;\r
208 UINTN EnableExecuteDisable;\r
209 UINTN Cr3;\r
210 UINTN InitFlag;\r
211 CPU_INFO_IN_HOB *CpuInfo;\r
212 UINTN NumApsExecuting;\r
213 CPU_MP_DATA *CpuMpData;\r
214 UINTN InitializeFloatingPointUnitsAddress;\r
215 UINT32 ModeTransitionMemory;\r
216 UINT16 ModeTransitionSegment;\r
217 UINT32 ModeHighMemory;\r
218 UINT16 ModeHighSegment;\r
09f69a87
RN		 219 //\r
220 // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r
221 //\r
053e878b
MK		 222 BOOLEAN Enable5LevelPaging;\r
223 BOOLEAN SevEsIsEnabled;\r
9c703bc0 224 BOOLEAN SevSnpIsEnabled;\r
053e878b 225 UINTN GhcbBase;\r
d4d7c9ad 226 BOOLEAN ExtTopoAvail;\r
d94e5f67
JF		 227} MP_CPU_EXCHANGE_INFO;\r
228\r
229#pragma pack()\r
e59f8f6b
JF		 230\r
231//\r
232// CPU MP Data save in memory\r
233//\r
234struct _CPU_MP_DATA {\r
053e878b
MK		 235 UINT64 CpuInfoInHob;\r
236 UINT32 CpuCount;\r
237 UINT32 BspNumber;\r
e59f8f6b
JF		 238 //\r
239 // The above fields data will be passed from PEI to DXE\r
240 // Please make sure the fields offset same in the different\r
241 // architecture.\r
242 //\r
053e878b
MK		 243 SPIN_LOCK MpLock;\r
244 UINTN Buffer;\r
245 UINTN CpuApStackSize;\r
246 MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
247 UINTN WakeupBuffer;\r
248 UINTN WakeupBufferHigh;\r
249 UINTN BackupBuffer;\r
250 UINTN BackupBufferSize;\r
251\r
252 volatile UINT32 FinishedCount;\r
253 UINT32 RunningCount;\r
254 BOOLEAN SingleThread;\r
255 EFI_AP_PROCEDURE Procedure;\r
256 VOID *ProcArguments;\r
257 BOOLEAN *Finished;\r
258 UINT64 ExpectedTime;\r
259 UINT64 CurrentTime;\r
260 UINT64 TotalTime;\r
261 EFI_EVENT WaitEvent;\r
262 UINTN **FailedCpuList;\r
263\r
264 AP_INIT_STATE InitFlag;\r
265 BOOLEAN SwitchBspFlag;\r
266 UINTN NewBspNumber;\r
267 CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
268 CPU_EXCHANGE_ROLE_INFO APInfo;\r
269 MTRR_SETTINGS MtrrTable;\r
270 UINT8 ApLoopMode;\r
271 UINT8 ApTargetCState;\r
272 UINT16 PmCodeSegment;\r
273 UINT16 Pm16CodeSegment;\r
274 CPU_AP_DATA *CpuData;\r
275 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
276\r
277 UINT32 CurrentTimerCount;\r
278 UINTN DivideValue;\r
279 UINT8 Vector;\r
280 BOOLEAN PeriodicMode;\r
281 BOOLEAN TimerInterruptState;\r
282 UINT64 MicrocodePatchAddress;\r
283 UINT64 MicrocodePatchRegionSize;\r
2a089134 284\r
58942277
ED		 285 //\r
286 // Whether need to use Init-Sipi-Sipi to wake up the APs.\r
287 // Two cases need to set this value to TRUE. One is in HLT\r
288 // loop mode, the other is resume from S3 which loop mode\r
e23d9c3e 289 // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r
58942277
ED		 290 // driver.\r
291 //\r
053e878b 292 BOOLEAN WakeUpByInitSipiSipi;\r
e88a5b98 293\r
053e878b 294 BOOLEAN SevEsIsEnabled;\r
9c703bc0 295 BOOLEAN SevSnpIsEnabled;\r
06544455 296 BOOLEAN UseSevEsAPMethod;\r
053e878b
MK		 297 UINTN SevEsAPBuffer;\r
298 UINTN SevEsAPResetStackStart;\r
299 CPU_MP_DATA *NewCpuMpData;\r
7b7508ad 300\r
053e878b 301 UINT64 GhcbBase;\r
e59f8f6b 302};\r
93ca4c0f 303\r
053e878b
MK		 304#define AP_SAFE_STACK_SIZE 128\r
305#define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE\r
7b7508ad
TL		 306\r
307#pragma pack(1)\r
308\r
309typedef struct {\r
053e878b
MK		 310 UINT8 InsnBuffer[8];\r
311 UINT16 Rip;\r
312 UINT16 Segment;\r
7b7508ad
TL		 313} SEV_ES_AP_JMP_FAR;\r
314\r
315#pragma pack()\r
316\r
317/**\r
318 Assembly code to move an AP from long mode to real mode.\r
319\r
320 Move an AP from long mode to real mode in preparation to invoking\r
321 the reset vector. This is used for SEV-ES guests where a hypervisor\r
322 is not allowed to set the CS and RIP to point to the reset vector.\r
323\r
324 @param[in] BufferStart The reset vector target.\r
325 @param[in] Code16 16-bit protected mode code segment value.\r
326 @param[in] Code32 32-bit protected mode code segment value.\r
327 @param[in] StackStart The start of a stack to be used for transitioning\r
328 from long mode to real mode.\r
329**/\r
330typedef\r
e2289d19 331 VOID\r
053e878b 332(EFIAPI AP_RESET)(\r
7b7508ad
TL		 333 IN UINTN BufferStart,\r
334 IN UINT16 Code16,\r
335 IN UINT16 Code32,\r
336 IN UINTN StackStart\r
337 );\r
338\r
053e878b 339extern EFI_GUID mCpuInitMpLibHobGuid;\r
93ca4c0f 340\r
76157021
JF		 341/**\r
342 Assembly code to place AP into safe loop mode.\r
343\r
344 Place AP into targeted C-State if MONITOR is supported, otherwise\r
345 place AP into hlt state.\r
346 Place AP in protected mode if the current is long mode. Due to AP maybe\r
347 wakeup by some hardware event. It could avoid accessing page table that\r
348 may not available during booting to OS.\r
349\r
350 @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r
351 FALSE indicates MONITOR is not supported.\r
352 @param[in] ApTargetCState Target C-State value.\r
353 @param[in] PmCodeSegment Protected mode code segment value.\r
354**/\r
355typedef\r
e2289d19 356 VOID\r
053e878b 357(EFIAPI *ASM_RELOCATE_AP_LOOP)(\r
76157021
JF		 358 IN BOOLEAN MwaitSupport,\r
359 IN UINTN ApTargetCState,\r
bf2786dc 360 IN UINTN PmCodeSegment,\r
9f91cb01 361 IN UINTN TopOfApStack,\r
20da7ca4
TL		 362 IN UINTN NumberToFinish,\r
363 IN UINTN Pm16CodeSegment,\r
364 IN UINTN SevEsAPJumpTable,\r
365 IN UINTN WakeupBuffer\r
76157021 366 );\r
f7f85d83
JF		 367\r
368/**\r
369 Assembly code to get starting address and size of the rendezvous entry for APs.\r
370 Information for fixing a jump instruction in the code is also returned.\r
371\r
372 @param[out] AddressMap Output buffer for address map information.\r
373**/\r
374VOID\r
375EFIAPI\r
376AsmGetAddressMap (\r
053e878b 377 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
f7f85d83
JF		 378 );\r
379\r
41be0da5
JF		 380/**\r
381 This function is called by both the BSP and the AP which is to become the BSP to\r
382 Exchange execution context including stack between them. After return from this\r
383 function, the BSP becomes AP and the AP becomes the BSP.\r
384\r
385 @param[in] MyInfo Pointer to buffer holding the exchanging information for the executing processor.\r
386 @param[in] OthersInfo Pointer to buffer holding the exchanging information for the peer.\r
387\r
388**/\r
389VOID\r
390EFIAPI\r
391AsmExchangeRole (\r
053e878b
MK		 392 IN CPU_EXCHANGE_ROLE_INFO *MyInfo,\r
393 IN CPU_EXCHANGE_ROLE_INFO *OthersInfo\r
41be0da5
JF		 394 );\r
395\r
93ca4c0f
JF		 396/**\r
397 Get the pointer to CPU MP Data structure.\r
398\r
399 @return The pointer to CPU MP Data structure.\r
400**/\r
401CPU_MP_DATA *\r
402GetCpuMpData (\r
403 VOID\r
404 );\r
405\r
406/**\r
407 Save the pointer to CPU MP Data structure.\r
408\r
409 @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r
410**/\r
411VOID\r
412SaveCpuMpData (\r
053e878b 413 IN CPU_MP_DATA *CpuMpData\r
93ca4c0f
JF		 414 );\r
415\r
ed66e0e3 416/**\r
a6b3d753 417 Get available system memory below 1MB by specified size.\r
ed66e0e3 418\r
a6b3d753
SZ		 419 @param[in] WakeupBufferSize Wakeup buffer size required\r
420\r
421 @retval other Return wakeup buffer address below 1MB.\r
422 @retval -1 Cannot find free memory below 1MB.\r
ed66e0e3 423**/\r
a6b3d753
SZ		 424UINTN\r
425GetWakeupBuffer (\r
053e878b 426 IN UINTN WakeupBufferSize\r
ed66e0e3
JF		 427 );\r
428\r
f32bfe6d
JW		 429/**\r
430 Get available EfiBootServicesCode memory below 4GB by specified size.\r
431\r
432 This buffer is required to safely transfer AP from real address mode to\r
433 protected mode or long mode, due to the fact that the buffer returned by\r
434 GetWakeupBuffer() may be marked as non-executable.\r
435\r
436 @param[in] BufferSize Wakeup transition buffer size.\r
437\r
438 @retval other Return wakeup transition buffer address below 4GB.\r
439 @retval 0 Cannot find free memory below 4GB.\r
440**/\r
441UINTN\r
54aeed7e 442AllocateCodeBuffer (\r
053e878b 443 IN UINTN BufferSize\r
f32bfe6d
JW		 444 );\r
445\r
7b7508ad
TL		 446/**\r
447 Return the address of the SEV-ES AP jump table.\r
448\r
449 This buffer is required in order for an SEV-ES guest to transition from\r
450 UEFI into an OS.\r
451\r
452 @return Return SEV-ES AP jump table buffer\r
453**/\r
454UINTN\r
455GetSevEsAPMemory (\r
456 VOID\r
457 );\r
458\r
96f5920d
JF		 459/**\r
460 This function will be called by BSP to wakeup AP.\r
461\r
462 @param[in] CpuMpData Pointer to CPU MP Data\r
463 @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r
464 FALSE: Send IPI to AP by ApicId\r
465 @param[in] ProcessorNumber The handle number of specified processor\r
466 @param[in] Procedure The function to be invoked by AP\r
467 @param[in] ProcedureArgument The argument to be passed into AP function\r
cf4e79e4 468 @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r
96f5920d
JF		 469**/\r
470VOID\r
471WakeUpAP (\r
053e878b
MK		 472 IN CPU_MP_DATA *CpuMpData,\r
473 IN BOOLEAN Broadcast,\r
474 IN UINTN ProcessorNumber,\r
475 IN EFI_AP_PROCEDURE Procedure OPTIONAL,\r
476 IN VOID *ProcedureArgument OPTIONAL,\r
0fdd466c 477 IN BOOLEAN WakeUpDisabledAps\r
96f5920d
JF		 478 );\r
479\r
93ca4c0f
JF		 480/**\r
481 Initialize global data for MP support.\r
482\r
483 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
484**/\r
485VOID\r
486InitMpGlobalData (\r
053e878b 487 IN CPU_MP_DATA *CpuMpData\r
93ca4c0f
JF		 488 );\r
489\r
86efe976
JF		 490/**\r
491 Worker function to execute a caller provided function on all enabled APs.\r
492\r
493 @param[in] Procedure A pointer to the function to be run on\r
494 enabled APs of the system.\r
495 @param[in] SingleThread If TRUE, then all the enabled APs execute\r
496 the function specified by Procedure one by\r
497 one, in ascending order of processor handle\r
498 number. If FALSE, then all the enabled APs\r
499 execute the function specified by Procedure\r
500 simultaneously.\r
ee0c39fa 501 @param[in] ExcludeBsp Whether let BSP also trig this task.\r
86efe976
JF		 502 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
503 service.\r
367284e7 504 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
86efe976
JF		 505 APs to return from Procedure, either for\r
506 blocking or non-blocking mode.\r
507 @param[in] ProcedureArgument The parameter passed into Procedure for\r
508 all APs.\r
509 @param[out] FailedCpuList If all APs finish successfully, then its\r
510 content is set to NULL. If not all APs\r
511 finish before timeout expires, then its\r
512 content is set to address of the buffer\r
513 holding handle numbers of the failed APs.\r
514\r
515 @retval EFI_SUCCESS In blocking mode, all APs have finished before\r
516 the timeout expired.\r
517 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r
518 to all enabled APs.\r
519 @retval others Failed to Startup all APs.\r
520\r
521**/\r
522EFI_STATUS\r
ee0c39fa 523StartupAllCPUsWorker (\r
053e878b
MK		 524 IN EFI_AP_PROCEDURE Procedure,\r
525 IN BOOLEAN SingleThread,\r
526 IN BOOLEAN ExcludeBsp,\r
527 IN EFI_EVENT WaitEvent OPTIONAL,\r
528 IN UINTN TimeoutInMicroseconds,\r
529 IN VOID *ProcedureArgument OPTIONAL,\r
530 OUT UINTN **FailedCpuList OPTIONAL\r
86efe976
JF		 531 );\r
532\r
20ae5774
JF		 533/**\r
534 Worker function to let the caller get one enabled AP to execute a caller-provided\r
535 function.\r
536\r
537 @param[in] Procedure A pointer to the function to be run on\r
538 enabled APs of the system.\r
539 @param[in] ProcessorNumber The handle number of the AP.\r
540 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
541 service.\r
367284e7 542 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
20ae5774
JF		 543 APs to return from Procedure, either for\r
544 blocking or non-blocking mode.\r
545 @param[in] ProcedureArgument The parameter passed into Procedure for\r
546 all APs.\r
547 @param[out] Finished If AP returns from Procedure before the\r
548 timeout expires, its content is set to TRUE.\r
549 Otherwise, the value is set to FALSE.\r
550\r
551 @retval EFI_SUCCESS In blocking mode, specified AP finished before\r
552 the timeout expires.\r
553 @retval others Failed to Startup AP.\r
554\r
555**/\r
556EFI_STATUS\r
557StartupThisAPWorker (\r
053e878b
MK		 558 IN EFI_AP_PROCEDURE Procedure,\r
559 IN UINTN ProcessorNumber,\r
560 IN EFI_EVENT WaitEvent OPTIONAL,\r
561 IN UINTN TimeoutInMicroseconds,\r
562 IN VOID *ProcedureArgument OPTIONAL,\r
563 OUT BOOLEAN *Finished OPTIONAL\r
20ae5774
JF		 564 );\r
565\r
41be0da5
JF		 566/**\r
567 Worker function to switch the requested AP to be the BSP from that point onward.\r
568\r
569 @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r
570 @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an\r
571 enabled AP. Otherwise, it will be disabled.\r
572\r
573 @retval EFI_SUCCESS BSP successfully switched.\r
7367cc6c 574 @retval others Failed to switch BSP.\r
41be0da5
JF		 575\r
576**/\r
577EFI_STATUS\r
578SwitchBSPWorker (\r
053e878b
MK		 579 IN UINTN ProcessorNumber,\r
580 IN BOOLEAN EnableOldBSP\r
41be0da5
JF		 581 );\r
582\r
e37109bc
JF		 583/**\r
584 Worker function to let the caller enable or disable an AP from this point onward.\r
585 This service may only be called from the BSP.\r
586\r
587 @param[in] ProcessorNumber The handle number of AP.\r
588 @param[in] EnableAP Specifies the new state for the processor for\r
589 enabled, FALSE for disabled.\r
590 @param[in] HealthFlag If not NULL, a pointer to a value that specifies\r
591 the new health status of the AP.\r
592\r
593 @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.\r
594 @retval others Failed to Enable/Disable AP.\r
595\r
596**/\r
597EFI_STATUS\r
598EnableDisableApWorker (\r
053e878b
MK		 599 IN UINTN ProcessorNumber,\r
600 IN BOOLEAN EnableAP,\r
601 IN UINT32 *HealthFlag OPTIONAL\r
e37109bc
JF		 602 );\r
603\r
93ca4c0f
JF		 604/**\r
605 Get pointer to CPU MP Data structure from GUIDed HOB.\r
606\r
607 @return The pointer to CPU MP Data structure.\r
608**/\r
609CPU_MP_DATA *\r
610GetCpuMpDataFromGuidedHob (\r
611 VOID\r
612 );\r
08085f08
JF		 613\r
614/** Checks status of specified AP.\r
615\r
616 This function checks whether the specified AP has finished the task assigned\r
617 by StartupThisAP(), and whether timeout expires.\r
618\r
619 @param[in] ProcessorNumber The handle number of processor.\r
620\r
621 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r
622 @retval EFI_TIMEOUT The timeout expires.\r
623 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r
624**/\r
625EFI_STATUS\r
626CheckThisAP (\r
053e878b 627 IN UINTN ProcessorNumber\r
08085f08
JF		 628 );\r
629\r
630/**\r
631 Checks status of all APs.\r
632\r
633 This function checks whether all APs have finished task assigned by StartupAllAPs(),\r
634 and whether timeout expires.\r
635\r
636 @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r
637 @retval EFI_TIMEOUT The timeout expires.\r
638 @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r
639**/\r
640EFI_STATUS\r
641CheckAllAPs (\r
642 VOID\r
643 );\r
644\r
645/**\r
646 Checks APs status and updates APs status if needed.\r
647\r
648**/\r
649VOID\r
650CheckAndUpdateApsStatus (\r
651 VOID\r
652 );\r
653\r
94f63c76
JF		 654/**\r
655 Detect whether specified processor can find matching microcode patch and load it.\r
656\r
e1ed5573
HW		 657 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
658 @param[in] ProcessorNumber The handle number of the processor. The range is\r
659 from 0 to the total number of logical processors\r
660 minus 1.\r
94f63c76
JF		 661**/\r
662VOID\r
663MicrocodeDetect (\r
053e878b
MK		 664 IN CPU_MP_DATA *CpuMpData,\r
665 IN UINTN ProcessorNumber\r
94f63c76
JF		 666 );\r
667\r
d786a172 668/**\r
dd017041 669 Shadow the required microcode patches data into memory.\r
d786a172
HW		 670\r
671 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
672**/\r
673VOID\r
dd017041 674ShadowMicrocodeUpdatePatch (\r
053e878b 675 IN OUT CPU_MP_DATA *CpuMpData\r
d786a172
HW		 676 );\r
677\r
348a34d9
HW		 678/**\r
679 Get the cached microcode patch base address and size from the microcode patch\r
680 information cache HOB.\r
681\r
682 @param[out] Address Base address of the microcode patches data.\r
683 It will be updated if the microcode patch\r
684 information cache HOB is found.\r
685 @param[out] RegionSize Size of the microcode patches data.\r
686 It will be updated if the microcode patch\r
687 information cache HOB is found.\r
688\r
689 @retval TRUE The microcode patch information cache HOB is found.\r
690 @retval FALSE The microcode patch information cache HOB is not found.\r
691\r
692**/\r
693BOOLEAN\r
694GetMicrocodePatchInfoFromHob (\r
053e878b
MK		 695 UINT64 *Address,\r
696 UINT64 *RegionSize\r
348a34d9
HW		 697 );\r
698\r
4d3314f6
JF		 699/**\r
700 Detect whether Mwait-monitor feature is supported.\r
701\r
702 @retval TRUE Mwait-monitor feature is supported.\r
703 @retval FALSE Mwait-monitor feature is not supported.\r
704**/\r
705BOOLEAN\r
706IsMwaitSupport (\r
707 VOID\r
708 );\r
709\r
43c9fdcc
JF		 710/**\r
711 Enable Debug Agent to support source debugging on AP function.\r
712\r
713**/\r
714VOID\r
715EnableDebugAgent (\r
716 VOID\r
717 );\r
718\r
e1ed5573
HW		 719/**\r
720 Find the current Processor number by APIC ID.\r
721\r
722 @param[in] CpuMpData Pointer to PEI CPU MP Data\r
723 @param[out] ProcessorNumber Return the pocessor number found\r
724\r
725 @retval EFI_SUCCESS ProcessorNumber is found and returned.\r
726 @retval EFI_NOT_FOUND ProcessorNumber is not found.\r
727**/\r
728EFI_STATUS\r
729GetProcessorNumber (\r
053e878b
MK		 730 IN CPU_MP_DATA *CpuMpData,\r
731 OUT UINTN *ProcessorNumber\r
e1ed5573
HW		 732 );\r
733\r
c788c2b1
SF		 734/**\r
735 This funtion will try to invoke platform specific microcode shadow logic to\r
736 relocate microcode update patches into memory.\r
737\r
4ac82ea1 738 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
c788c2b1
SF		 739\r
740 @retval EFI_SUCCESS Shadow microcode success.\r
741 @retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.\r
742 @retval EFI_UNSUPPORTED Can't find platform specific microcode shadow\r
743 PPI/Protocol.\r
744**/\r
745EFI_STATUS\r
746PlatformShadowMicrocode (\r
053e878b 747 IN OUT CPU_MP_DATA *CpuMpData\r
c788c2b1
SF		 748 );\r
749\r
e2289d19
BS		 750/**\r
751 Allocate the SEV-ES AP jump table buffer.\r
752\r
753 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
754**/\r
755VOID\r
756AllocateSevEsAPMemory (\r
757 IN OUT CPU_MP_DATA *CpuMpData\r
758 );\r
759\r
760/**\r
761 Program the SEV-ES AP jump table buffer.\r
762\r
763 @param[in] SipiVector The SIPI vector used for the AP Reset\r
764**/\r
765VOID\r
766SetSevEsJumpTable (\r
767 IN UINTN SipiVector\r
768 );\r
769\r
770/**\r
771 The function puts the AP in halt loop.\r
772\r
773 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
774**/\r
775VOID\r
776SevEsPlaceApHlt (\r
777 CPU_MP_DATA *CpuMpData\r
778 );\r
779\r
b95908e0
BS		 780/**\r
781 Check if the specified confidential computing attribute is active.\r
782\r
783 @retval TRUE The specified Attr is active.\r
784 @retval FALSE The specified Attr is not active.\r
785**/\r
786BOOLEAN\r
787EFIAPI\r
788ConfidentialComputingGuestHas (\r
789 CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr\r
790 );\r
791\r
d4d7c9ad
MR		 792/**\r
793 The function fills the exchange data for the AP.\r
794\r
795 @param[in] ExchangeInfo The pointer to CPU Exchange Data structure\r
796**/\r
797VOID\r
798FillExchangeInfoDataSevEs (\r
799 IN volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo\r
800 );\r
801\r
06544455
TL		 802/**\r
803 Issue RMPADJUST to adjust the VMSA attribute of an SEV-SNP page.\r
804\r
805 @param[in] PageAddress\r
806 @param[in] VmsaPage\r
807\r
808 @return RMPADJUST return value\r
809**/\r
810UINT32\r
811SevSnpRmpAdjust (\r
812 IN EFI_PHYSICAL_ADDRESS PageAddress,\r
813 IN BOOLEAN VmsaPage\r
814 );\r
815\r
816/**\r
817 Create an SEV-SNP AP save area (VMSA) for use in running the vCPU.\r
818\r
819 @param[in] CpuMpData Pointer to CPU MP Data\r
820 @param[in] CpuData Pointer to CPU AP Data\r
821 @param[in] ApicId APIC ID of the vCPU\r
822**/\r
823VOID\r
824SevSnpCreateSaveArea (\r
825 IN CPU_MP_DATA *CpuMpData,\r
826 IN CPU_AP_DATA *CpuData,\r
827 UINT32 ApicId\r
828 );\r
829\r
830/**\r
831 Create SEV-SNP APs.\r
832\r
833 @param[in] CpuMpData Pointer to CPU MP Data\r
834 @param[in] ProcessorNumber The handle number of specified processor\r
835 (-1 for all APs)\r
836**/\r
837VOID\r
838SevSnpCreateAP (\r
839 IN CPU_MP_DATA *CpuMpData,\r
840 IN INTN ProcessorNumber\r
841 );\r
842\r
3e8ad6bd 843#endif\r
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