UefiCpuPkg: Add PiSmmCpuDxeSmm module IA32 files
[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / PageTbl.c
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1/** @file\r
2Page table manipulation functions for IA-32 processors\r
3\r
4Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>\r
5This program and the accompanying materials\r
6are licensed and made available under the terms and conditions of the BSD License\r
7which accompanies this distribution. The full text of the license may be found at\r
8http://opensource.org/licenses/bsd-license.php\r
9\r
10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "PiSmmCpuDxeSmm.h"\r
16\r
17SPIN_LOCK mPFLock;\r
18\r
19/**\r
20 Create PageTable for SMM use.\r
21\r
22 @return PageTable Address\r
23\r
24**/\r
25UINT32\r
26SmmInitPageTable (\r
27 VOID\r
28 )\r
29{\r
30 UINTN PageFaultHandlerHookAddress;\r
31 IA32_IDT_GATE_DESCRIPTOR *IdtEntry;\r
32\r
33 //\r
34 // Initialize spin lock\r
35 //\r
36 InitializeSpinLock (&mPFLock);\r
37\r
38 if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
39 //\r
40 // Set own Page Fault entry instead of the default one, because SMM Profile\r
41 // feature depends on IRET instruction to do Single Step\r
42 //\r
43 PageFaultHandlerHookAddress = (UINTN)PageFaultIdtHandlerSmmProfile;\r
44 IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) gcSmiIdtr.Base;\r
45 IdtEntry += EXCEPT_IA32_PAGE_FAULT;\r
46 IdtEntry->Bits.OffsetLow = (UINT16)PageFaultHandlerHookAddress;\r
47 IdtEntry->Bits.Reserved_0 = 0;\r
48 IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;\r
49 IdtEntry->Bits.OffsetHigh = (UINT16)(PageFaultHandlerHookAddress >> 16);\r
50 } else {\r
51 //\r
52 // Register SMM Page Fault Handler\r
53 //\r
54 SmmRegisterExceptionHandler (&mSmmCpuService, EXCEPT_IA32_PAGE_FAULT, SmiPFHandler);\r
55 }\r
56\r
57 //\r
58 // Additional SMM IDT initialization for SMM stack guard\r
59 //\r
60 if (FeaturePcdGet (PcdCpuSmmStackGuard)) {\r
61 InitializeIDTSmmStackGuard ();\r
62 }\r
63 return Gen4GPageTable (0);\r
64}\r
65\r
66/**\r
67 Page Fault handler for SMM use.\r
68\r
69**/\r
70VOID\r
71SmiDefaultPFHandler (\r
72 VOID\r
73 )\r
74{\r
75 CpuDeadLoop ();\r
76}\r
77\r
78/**\r
79 ThePage Fault handler wrapper for SMM use.\r
80\r
81 @param InterruptType Defines the type of interrupt or exception that\r
82 occurred on the processor.This parameter is processor architecture specific.\r
83 @param SystemContext A pointer to the processor context when\r
84 the interrupt occurred on the processor.\r
85**/\r
86VOID\r
87EFIAPI\r
88SmiPFHandler (\r
89 IN EFI_EXCEPTION_TYPE InterruptType,\r
90 IN EFI_SYSTEM_CONTEXT SystemContext\r
91 )\r
92{\r
93 UINTN PFAddress;\r
94\r
95 ASSERT (InterruptType == EXCEPT_IA32_PAGE_FAULT);\r
96\r
97 AcquireSpinLock (&mPFLock);\r
98\r
99 PFAddress = AsmReadCr2 ();\r
100\r
101 if ((FeaturePcdGet (PcdCpuSmmStackGuard)) &&\r
102 (PFAddress >= mCpuHotPlugData.SmrrBase) &&\r
103 (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) {\r
104 DEBUG ((EFI_D_ERROR, "SMM stack overflow!\n"));\r
105 CpuDeadLoop ();\r
106 }\r
107\r
108 //\r
109 // If a page fault occurs in SMM range\r
110 //\r
111 if ((PFAddress < mCpuHotPlugData.SmrrBase) ||\r
112 (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {\r
113 if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) {\r
114 DEBUG ((EFI_D_ERROR, "Code executed on IP(0x%x) out of SMM range after SMM is locked!\n", PFAddress));\r
115 DEBUG_CODE (\r
116 DumpModuleInfoByIp (*(UINTN *)(UINTN)SystemContext.SystemContextIa32->Esp);\r
117 );\r
118 CpuDeadLoop ();\r
119 }\r
120 }\r
121\r
122 if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
123 SmmProfilePFHandler (\r
124 SystemContext.SystemContextIa32->Eip,\r
125 SystemContext.SystemContextIa32->ExceptionData\r
126 );\r
127 } else {\r
128 SmiDefaultPFHandler ();\r
129 }\r
130\r
131 ReleaseSpinLock (&mPFLock);\r
132}\r