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Commit | Line | Data |
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eee1d2ca JJ |
1 | ;------------------------------------------------------------------------------\r |
2 | ; @file\r | |
3 | ; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x100000000 (4GB)\r | |
4 | ;\r | |
5 | ; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>\r | |
0acd8697 | 6 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r |
eee1d2ca JJ |
7 | ;\r |
8 | ;------------------------------------------------------------------------------\r | |
9 | \r | |
10 | BITS 64\r | |
11 | \r | |
12 | %define ALIGN_TOP_TO_4K_FOR_PAGING\r | |
13 | \r | |
60d8bb9f | 14 | %define PAGE_2M_PDE_ATTR (PAGE_SIZE + \\r |
eee1d2ca JJ |
15 | PAGE_ACCESSED + \\r |
16 | PAGE_DIRTY + \\r | |
17 | PAGE_READ_WRITE + \\r | |
18 | PAGE_PRESENT)\r | |
19 | \r | |
20 | %define PAGE_PDP_ATTR (PAGE_ACCESSED + \\r | |
21 | PAGE_READ_WRITE + \\r | |
22 | PAGE_PRESENT)\r | |
23 | \r | |
24 | %define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory)\r | |
25 | %define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x))\r | |
26 | \r | |
27 | %define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \\r | |
28 | PAGE_PDP_ATTR)\r | |
29 | %define PTE_2MB(x) ((x << 21) + PAGE_2M_PDE_ATTR)\r | |
30 | \r | |
31 | TopLevelPageDirectory:\r | |
32 | \r | |
33 | ;\r | |
34 | ; Top level Page Directory Pointers (1 * 512GB entry)\r | |
35 | ;\r | |
36 | DQ PDP(0x1000)\r | |
37 | \r | |
38 | \r | |
39 | ;\r | |
40 | ; Next level Page Directory Pointers (4 * 1GB entries => 4GB)\r | |
41 | ;\r | |
42 | TIMES 0x1000-PGTBLS_OFFSET($) DB 0\r | |
43 | \r | |
44 | DQ PDP(0x2000)\r | |
45 | DQ PDP(0x3000)\r | |
46 | DQ PDP(0x4000)\r | |
47 | DQ PDP(0x5000)\r | |
48 | \r | |
49 | ;\r | |
50 | ; Page Table Entries (2048 * 2MB entries => 4GB)\r | |
51 | ;\r | |
52 | TIMES 0x2000-PGTBLS_OFFSET($) DB 0\r | |
53 | \r | |
54 | %assign i 0\r | |
55 | %rep 0x800\r | |
56 | DQ PTE_2MB(i)\r | |
57 | %assign i i+1\r | |
58 | %endrep\r | |
59 | \r | |
60 | EndOfPageTables:\r |