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UefiCpuPkg/SecMigrationPei: Add initial PEIM (CVE-2019-11098)
[mirror_edk2.git] / UefiCpuPkg / SecCore / SecMain.c
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1/** @file\r
2 C functions in SEC\r
3\r
373c2c5b 4 Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>\r
0acd8697 5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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6\r
7**/\r
8\r
9#include "SecMain.h"\r
10\r
11EFI_PEI_TEMPORARY_RAM_DONE_PPI gSecTemporaryRamDonePpi = {\r
12 SecTemporaryRamDone\r
13};\r
14\r
15EFI_SEC_PLATFORM_INFORMATION_PPI mSecPlatformInformationPpi = { SecPlatformInformation };\r
16\r
17EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformationPpi[] = {\r
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SZ
18 {\r
19 //\r
20 // SecPerformance PPI notify descriptor.\r
21 //\r
22 EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK,\r
23 &gPeiSecPerformancePpiGuid,\r
24 (VOID *) (UINTN) SecPerformancePpiCallBack\r
25 },\r
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26 {\r
27 EFI_PEI_PPI_DESCRIPTOR_PPI,\r
28 &gEfiTemporaryRamDonePpiGuid,\r
29 &gSecTemporaryRamDonePpi\r
30 },\r
31 {\r
32 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
33 &gEfiSecPlatformInformationPpiGuid,\r
34 &mSecPlatformInformationPpi\r
35 }\r
36};\r
37\r
38//\r
39// These are IDT entries pointing to 10:FFFFFFE4h.\r
40//\r
41UINT64 mIdtEntryTemplate = 0xffff8e000010ffe4ULL;\r
42\r
43/**\r
44 Caller provided function to be invoked at the end of InitializeDebugAgent().\r
45\r
46 Entry point to the C language phase of SEC. After the SEC assembly\r
47 code has initialized some temporary memory and set up the stack,\r
48 the control is transferred to this function.\r
49\r
50 @param[in] Context The first input parameter of InitializeDebugAgent().\r
51\r
52**/\r
53VOID\r
61257251 54NORETURN\r
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55EFIAPI\r
56SecStartupPhase2(\r
57 IN VOID *Context\r
58 );\r
59\r
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60/**\r
61 Entry point of the notification callback function itself within the PEIM.\r
62 It is to get SEC performance data and build HOB to convey the SEC performance\r
63 data to DXE phase.\r
64\r
65 @param PeiServices Indirect reference to the PEI Services Table.\r
66 @param NotifyDescriptor Address of the notification descriptor data structure.\r
67 @param Ppi Address of the PPI that was installed.\r
68\r
69 @return Status of the notification.\r
70 The status code returned from this function is ignored.\r
71**/\r
72EFI_STATUS\r
73EFIAPI\r
74SecPerformancePpiCallBack (\r
75 IN EFI_PEI_SERVICES **PeiServices,\r
76 IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r
77 IN VOID *Ppi\r
78 )\r
79{\r
80 EFI_STATUS Status;\r
81 PEI_SEC_PERFORMANCE_PPI *SecPerf;\r
82 FIRMWARE_SEC_PERFORMANCE Performance;\r
83\r
84 SecPerf = (PEI_SEC_PERFORMANCE_PPI *) Ppi;\r
85 Status = SecPerf->GetPerformance ((CONST EFI_PEI_SERVICES **) PeiServices, SecPerf, &Performance);\r
86 if (!EFI_ERROR (Status)) {\r
87 BuildGuidDataHob (\r
88 &gEfiFirmwarePerformanceGuid,\r
89 &Performance,\r
90 sizeof (FIRMWARE_SEC_PERFORMANCE)\r
91 );\r
92 DEBUG ((DEBUG_INFO, "FPDT: SEC Performance Hob ResetEnd = %ld\n", Performance.ResetEnd));\r
93 }\r
94\r
95 return Status;\r
96}\r
97\r
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98/**\r
99\r
100 Entry point to the C language phase of SEC. After the SEC assembly\r
101 code has initialized some temporary memory and set up the stack,\r
102 the control is transferred to this function.\r
103\r
104\r
105 @param SizeOfRam Size of the temporary memory available for use.\r
106 @param TempRamBase Base address of temporary ram\r
107 @param BootFirmwareVolume Base address of the Boot Firmware Volume.\r
108**/\r
109VOID\r
7cd8a575 110NORETURN\r
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111EFIAPI\r
112SecStartup (\r
113 IN UINT32 SizeOfRam,\r
114 IN UINT32 TempRamBase,\r
115 IN VOID *BootFirmwareVolume\r
116 )\r
117{\r
118 EFI_SEC_PEI_HAND_OFF SecCoreData;\r
119 IA32_DESCRIPTOR IdtDescriptor;\r
120 SEC_IDT_TABLE IdtTableInStack;\r
121 UINT32 Index;\r
122 UINT32 PeiStackSize;\r
123 EFI_STATUS Status;\r
124\r
125 //\r
126 // Report Status Code to indicate entering SEC core\r
127 //\r
128 REPORT_STATUS_CODE (\r
129 EFI_PROGRESS_CODE,\r
130 EFI_SOFTWARE_SEC | EFI_SW_SEC_PC_ENTRY_POINT\r
131 );\r
132\r
133 PeiStackSize = PcdGet32 (PcdPeiTemporaryRamStackSize);\r
134 if (PeiStackSize == 0) {\r
135 PeiStackSize = (SizeOfRam >> 1);\r
136 }\r
137\r
138 ASSERT (PeiStackSize < SizeOfRam);\r
139\r
140 //\r
141 // Process all libraries constructor function linked to SecCore.\r
142 //\r
143 ProcessLibraryConstructorList ();\r
144\r
145 //\r
146 // Initialize floating point operating environment\r
147 // to be compliant with UEFI spec.\r
148 //\r
149 InitializeFloatingPointUnits ();\r
150\r
151 // |-------------------|---->\r
152 // |IDT Table |\r
153 // |-------------------|\r
154 // |PeiService Pointer | PeiStackSize\r
155 // |-------------------|\r
156 // | |\r
157 // | Stack |\r
158 // |-------------------|---->\r
159 // | |\r
160 // | |\r
161 // | Heap | PeiTemporayRamSize\r
162 // | |\r
163 // | |\r
164 // |-------------------|----> TempRamBase\r
165\r
166 IdtTableInStack.PeiService = 0;\r
167 for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {\r
168 CopyMem ((VOID*)&IdtTableInStack.IdtTable[Index], (VOID*)&mIdtEntryTemplate, sizeof (UINT64));\r
169 }\r
170\r
171 IdtDescriptor.Base = (UINTN) &IdtTableInStack.IdtTable;\r
172 IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);\r
173\r
174 AsmWriteIdtr (&IdtDescriptor);\r
175\r
176 //\r
177 // Setup the default exception handlers\r
178 //\r
179 Status = InitializeCpuExceptionHandlers (NULL);\r
180 ASSERT_EFI_ERROR (Status);\r
181\r
182 //\r
183 // Update the base address and length of Pei temporary memory\r
184 //\r
185 SecCoreData.DataSize = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);\r
186 SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;\r
f0162959 187 SecCoreData.BootFirmwareVolumeSize = (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *) BootFirmwareVolume)->FvLength;\r
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188 SecCoreData.TemporaryRamBase = (VOID*)(UINTN) TempRamBase;\r
189 SecCoreData.TemporaryRamSize = SizeOfRam;\r
190 SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;\r
191 SecCoreData.PeiTemporaryRamSize = SizeOfRam - PeiStackSize;\r
192 SecCoreData.StackBase = (VOID*)(UINTN)(TempRamBase + SecCoreData.PeiTemporaryRamSize);\r
193 SecCoreData.StackSize = PeiStackSize;\r
194\r
195 //\r
196 // Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.\r
197 //\r
198 InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);\r
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MH
199\r
200 //\r
201 // Should not come here.\r
202 //\r
203 UNREACHABLE ();\r
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204}\r
205\r
206/**\r
207 Caller provided function to be invoked at the end of InitializeDebugAgent().\r
208\r
209 Entry point to the C language phase of SEC. After the SEC assembly\r
210 code has initialized some temporary memory and set up the stack,\r
211 the control is transferred to this function.\r
212\r
213 @param[in] Context The first input parameter of InitializeDebugAgent().\r
214\r
215**/\r
216VOID\r
61257251 217NORETURN\r
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218EFIAPI\r
219SecStartupPhase2(\r
220 IN VOID *Context\r
221 )\r
222{\r
223 EFI_SEC_PEI_HAND_OFF *SecCoreData;\r
224 EFI_PEI_PPI_DESCRIPTOR *PpiList;\r
225 UINT32 Index;\r
226 EFI_PEI_PPI_DESCRIPTOR *AllSecPpiList;\r
227 EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint;\r
228\r
373c2c5b 229 PeiCoreEntryPoint = NULL;\r
1921695e 230 SecCoreData = (EFI_SEC_PEI_HAND_OFF *) Context;\r
373c2c5b 231\r
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CC
232 //\r
233 // Perform platform specific initialization before entering PeiCore.\r
234 //\r
235 PpiList = SecPlatformMain (SecCoreData);\r
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236 //\r
237 // Find Pei Core entry point. It will report SEC and Pei Core debug information if remote debug\r
238 // is enabled.\r
239 //\r
373c2c5b 240 if (PpiList != NULL) {\r
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241 Index = 0;\r
242 do {\r
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CC
243 if (CompareGuid (PpiList[Index].Guid, &gEfiPeiCoreFvLocationPpiGuid) &&\r
244 (((EFI_PEI_CORE_FV_LOCATION_PPI *) PpiList[Index].Ppi)->PeiCoreFvLocation != 0)\r
245 ) {\r
246 //\r
247 // In this case, SecCore is in BFV but PeiCore is in another FV reported by PPI.\r
248 //\r
249 FindAndReportEntryPoints (\r
250 (EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase,\r
251 (EFI_FIRMWARE_VOLUME_HEADER *) ((EFI_PEI_CORE_FV_LOCATION_PPI *) PpiList[Index].Ppi)->PeiCoreFvLocation,\r
252 &PeiCoreEntryPoint\r
253 );\r
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254 if (PeiCoreEntryPoint != NULL) {\r
255 break;\r
256 } else {\r
257 //\r
8a1305a1 258 // Invalid PeiCore FV provided by platform\r
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259 //\r
260 CpuDeadLoop ();\r
261 }\r
262 }\r
8a1305a1 263 } while ((PpiList[Index++].Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);\r
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264 }\r
265 //\r
266 // If EFI_PEI_CORE_FV_LOCATION_PPI not found, try to locate PeiCore from BFV.\r
267 //\r
268 if (PeiCoreEntryPoint == NULL) {\r
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269 //\r
270 // Both SecCore and PeiCore are in BFV.\r
271 //\r
272 FindAndReportEntryPoints (\r
273 (EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase,\r
274 (EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase,\r
275 &PeiCoreEntryPoint\r
276 );\r
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CC
277 if (PeiCoreEntryPoint == NULL) {\r
278 CpuDeadLoop ();\r
279 }\r
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280 }\r
281\r
1921695e 282 if (PpiList != NULL) {\r
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283 AllSecPpiList = (EFI_PEI_PPI_DESCRIPTOR *) SecCoreData->PeiTemporaryRamBase;\r
284\r
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285 //\r
286 // Remove the terminal flag from the terminal PPI\r
287 //\r
288 CopyMem (AllSecPpiList, mPeiSecPlatformInformationPpi, sizeof (mPeiSecPlatformInformationPpi));\r
289 Index = sizeof (mPeiSecPlatformInformationPpi) / sizeof (EFI_PEI_PPI_DESCRIPTOR) - 1;\r
290 AllSecPpiList[Index].Flags = AllSecPpiList[Index].Flags & (~EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);\r
291\r
292 //\r
293 // Append the platform additional PPI list\r
294 //\r
295 Index += 1;\r
296 while (((PpiList->Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST)) {\r
297 CopyMem (&AllSecPpiList[Index], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
298 Index++;\r
299 PpiList++;\r
300 }\r
301\r
302 //\r
303 // Add the terminal PPI\r
304 //\r
305 CopyMem (&AllSecPpiList[Index ++], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
306\r
307 //\r
308 // Set PpiList to the total PPI\r
309 //\r
310 PpiList = AllSecPpiList;\r
311\r
312 //\r
313 // Adjust PEI TEMP RAM Range.\r
314 //\r
315 ASSERT (SecCoreData->PeiTemporaryRamSize > Index * sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
316 SecCoreData->PeiTemporaryRamBase = (VOID *)((UINTN) SecCoreData->PeiTemporaryRamBase + Index * sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
317 SecCoreData->PeiTemporaryRamSize = SecCoreData->PeiTemporaryRamSize - Index * sizeof (EFI_PEI_PPI_DESCRIPTOR);\r
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318 //\r
319 // Adjust the Base and Size to be 8-byte aligned as HOB which has 8byte aligned requirement\r
320 // will be built based on them in PEI phase.\r
321 //\r
322 SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData->PeiTemporaryRamBase + 7) & ~0x07);\r
59d3fad3 323 SecCoreData->PeiTemporaryRamSize &= ~(UINTN)0x07;\r
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324 } else {\r
325 //\r
326 // No addition PPI, PpiList directly point to the common PPI list.\r
327 //\r
328 PpiList = &mPeiSecPlatformInformationPpi[0];\r
329 }\r
330\r
af34c106
JF
331 DEBUG ((\r
332 DEBUG_INFO,\r
ec16deea 333 "%a() Stack Base: 0x%p, Stack Size: 0x%x\n",\r
af34c106
JF
334 __FUNCTION__,\r
335 SecCoreData->StackBase,\r
ec16deea 336 (UINT32) SecCoreData->StackSize\r
af34c106
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337 ));\r
338\r
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339 //\r
340 // Report Status Code to indicate transferring to PEI core\r
341 //\r
342 REPORT_STATUS_CODE (\r
343 EFI_PROGRESS_CODE,\r
344 EFI_SOFTWARE_SEC | EFI_SW_SEC_PC_HANDOFF_TO_NEXT\r
345 );\r
346\r
347 //\r
348 // Transfer the control to the PEI core\r
349 //\r
350 ASSERT (PeiCoreEntryPoint != NULL);\r
351 (*PeiCoreEntryPoint) (SecCoreData, PpiList);\r
352\r
353 //\r
354 // Should not come here.\r
355 //\r
61257251 356 UNREACHABLE ();\r
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357}\r
358\r
359/**\r
360 TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked\r
361 by the PEI Foundation after the EFI_PEI_PERMANANT_MEMORY_INSTALLED_PPI is installed.\r
362\r
363 @retval EFI_SUCCESS Use of Temporary RAM was disabled.\r
364 @retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.\r
365\r
366**/\r
367EFI_STATUS\r
368EFIAPI\r
369SecTemporaryRamDone (\r
370 VOID\r
371 )\r
372{\r
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373 EFI_STATUS Status;\r
374 EFI_STATUS Status2;\r
375 UINTN Index;\r
376 BOOLEAN State;\r
377 EFI_PEI_PPI_DESCRIPTOR *PeiPpiDescriptor;\r
378 REPUBLISH_SEC_PPI_PPI *RepublishSecPpiPpi;\r
1921695e 379\r
8a5b8cef
JF
380 //\r
381 // Republish Sec Platform Information(2) PPI\r
382 //\r
383 RepublishSecPlatformInformationPpi ();\r
384\r
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385 //\r
386 // Re-install SEC PPIs using a PEIM produced service if published\r
387 //\r
388 for (Index = 0, Status = EFI_SUCCESS; Status == EFI_SUCCESS; Index++) {\r
389 Status = PeiServicesLocatePpi (\r
390 &gRepublishSecPpiPpiGuid,\r
391 Index,\r
392 &PeiPpiDescriptor,\r
393 (VOID **) &RepublishSecPpiPpi\r
394 );\r
395 if (!EFI_ERROR (Status)) {\r
396 DEBUG ((DEBUG_INFO, "Calling RepublishSecPpi instance %d.\n", Index));\r
397 Status2 = RepublishSecPpiPpi->RepublishSecPpis ();\r
398 ASSERT_EFI_ERROR (Status2);\r
399 }\r
400 }\r
401\r
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402 //\r
403 // Migrate DebugAgentContext.\r
404 //\r
405 InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
406\r
407 //\r
408 // Disable interrupts and save current interrupt state\r
409 //\r
479613bd 410 State = SaveAndDisableInterrupts ();\r
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411\r
412 //\r
413 // Disable Temporary RAM after Stack and Heap have been migrated at this point.\r
414 //\r
415 SecPlatformDisableTemporaryMemory ();\r
416\r
417 //\r
418 // Restore original interrupt state\r
419 //\r
420 SetInterruptState (State);\r
421\r
422 return EFI_SUCCESS;\r
423}\r