]> git.proxmox.com Git - mirror_edk2.git/blame - Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.h
Vlv2TbltDevicePkg/PlatformBdsLib: Add DebugAgent Console
[mirror_edk2.git] / Vlv2TbltDevicePkg / Library / PlatformBdsLib / BdsPlatform.h
CommitLineData
3cbfba02
DW
1/*++\r
2\r
ed5b9110 3 Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>\r
3cbfba02
DW
4 \r\r
5 This program and the accompanying materials are licensed and made available under\r\r
6 the terms and conditions of the BSD License that accompanies this distribution. \r\r
7 The full text of the license may be found at \r\r
8 http://opensource.org/licenses/bsd-license.php. \r\r
9 \r\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r
12 \r\r
13\r
14\r
15Module Name:\r
16\r
17 BdsPlatform.h\r
18\r
19Abstract:\r
20\r
21 Head file for BDS Platform specific code\r
22\r
23--*/\r
24\r
25#ifndef _BDS_PLATFORM_H\r
26#define _BDS_PLATFORM_H\r
27\r
28#include <FrameworkDxe.h>\r
29\r
30#include <Protocol/FirmwareVolume2.h>\r
31#include <Protocol/DevicePath.h>\r
32#include <Protocol/SimpleNetwork.h>\r
33#include <Protocol/PciRootBridgeIo.h>\r
34#include <Protocol/LoadFile.h>\r
35#include <Protocol/LegacyBios.h>\r
36#include <Protocol/PciIo.h>\r
37#include <Protocol/SmmAccess2.h>\r
38#include <Protocol/DxeSmmReadyToLock.h>\r
39#include <Protocol/UserManager.h>\r
40#include <Protocol/DeferredImageLoad.h>\r
41#include <Protocol/AcpiS3Save.h>\r
42#include <Protocol/ExitPmAuth.h>\r
43#include <Protocol/MmioDevice.h>\r
44#include <Protocol/I2cBusMcg.h>\r
45#include <Protocol/I2cHostMcg.h>\r
46#include <Guid/CapsuleVendor.h>\r
47#include <Guid/MemoryTypeInformation.h>\r
48#include <Guid/GlobalVariable.h>\r
ed5b9110 49#include <Guid/DebugAgentGuid.h>\r
3cbfba02
DW
50\r
51\r
52#include <Library/DebugLib.h>\r
53#include <Library/BaseMemoryLib.h>\r
54#include <Library/UefiBootServicesTableLib.h>\r
55#include <Library/UefiRuntimeServicesTableLib.h>\r
56#include <Library/MemoryAllocationLib.h>\r
57#include <Library/BaseLib.h>\r
58#include <Library/PcdLib.h>\r
59#include <Library/IoLib.h>\r
60#include <Library/GenericBdsLib.h>\r
61#include <Library/PlatformBdsLib.h>\r
62#include <Library/DevicePathLib.h>\r
63#include <Library/UefiLib.h>\r
64#include <Library/HobLib.h>\r
65#include <Library/PrintLib.h>\r
66#include <Library/PerformanceLib.h>\r
67#include <Library/ReportStatusCodeLib.h>\r
68\r
69#include <IndustryStandard/Pci.h>\r
70\r
71extern EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges [];\r
72extern BDS_CONSOLE_CONNECT_ENTRY gPlatformConsole [];\r
73extern EFI_DEVICE_PATH_PROTOCOL *gPlatformAllPossiblePciVgaConsole [];\r
74extern EFI_DEVICE_PATH_PROTOCOL *gPlatformConnectSequence [];\r
75extern EFI_DEVICE_PATH_PROTOCOL *gPlatformDriverOption [];\r
76extern EFI_DEVICE_PATH_PROTOCOL *gPlatformBootOption [];\r
77extern EFI_DEVICE_PATH_PROTOCOL *gUserAuthenticationDevice[];\r
78extern BDS_CONSOLE_CONNECT_ENTRY gPlatformSimpleConsole [];\r
79extern EFI_DEVICE_PATH_PROTOCOL *gPlatformSimpleBootOption [];\r
80\r
69a99d0b
MG
81extern BOOLEAN mEnumBootDevice;\r
82\r
83\r
3cbfba02
DW
84//\r
85// the short form device path for Usb keyboard\r
86//\r
87#define CLASS_HID 3\r
88#define SUBCLASS_BOOT 1\r
89#define PROTOCOL_KEYBOARD 1\r
90\r
91#define PCI_DEVICE_PATH_NODE(Func, Dev) \\r
92 { \\r
93 HARDWARE_DEVICE_PATH, \\r
94 HW_PCI_DP, \\r
95 { \\r
96 (UINT8) (sizeof (PCI_DEVICE_PATH)), \\r
97 (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \\r
98 }, \\r
99 (Func), \\r
100 (Dev) \\r
101 }\r
102\r
103#define PNPID_DEVICE_PATH_NODE(PnpId) \\r
104 { \\r
105 { \\r
106 ACPI_DEVICE_PATH, \\r
107 ACPI_DP, \\r
108 { \\r
109 (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), \\r
110 (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) \\r
111 } \\r
112 }, \\r
113 EISA_PNP_ID((PnpId)), \\r
114 0 \\r
115 }\r
116\r
117#define gUart(BaudRate, DataBits, Parity, StopBits) \\r
118 { \\r
119 { \\r
120 MESSAGING_DEVICE_PATH, \\r
121 MSG_UART_DP, \\r
122 { \\r
123 (UINT8) (sizeof (UART_DEVICE_PATH)), \\r
124 (UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8) \\r
125 } \\r
126 }, \\r
127 0, \\r
128 (BaudRate), \\r
129 (DataBits), \\r
130 (Parity), \\r
131 (StopBits) \\r
132 }\r
133\r
134#define gPcAnsiTerminal \\r
135 { \\r
136 { \\r
137 MESSAGING_DEVICE_PATH, \\r
138 MSG_VENDOR_DP, \\r
139 { \\r
140 (UINT8) (sizeof (VENDOR_DEVICE_PATH)), \\r
141 (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \\r
142 } \\r
143 }, \\r
144 DEVICE_PATH_MESSAGING_PC_ANSI \\r
145 }\r
146\r
147#define gUsbKeyboardMouse \\r
148 { \\r
149 { \\r
150 MESSAGING_DEVICE_PATH, \\r
151 MSG_USB_CLASS_DP, \\r
152 (UINT8) (sizeof (USB_CLASS_DEVICE_PATH)), \\r
153 (UINT8) ((sizeof (USB_CLASS_DEVICE_PATH)) >> 8) \\r
154 }, \\r
155 0xffff, \\r
156 0xffff, \\r
157 CLASS_HID, \\r
158 SUBCLASS_BOOT, \\r
159 PROTOCOL_KEYBOARD \\r
160 }\r
161\r
162#define gEndEntire \\r
163 { \\r
164 END_DEVICE_PATH_TYPE, \\r
165 END_ENTIRE_DEVICE_PATH_SUBTYPE, \\r
166 { \\r
167 END_DEVICE_PATH_LENGTH, \\r
168 0 \\r
169 } \\r
170 }\r
171\r
172#define gPciRootBridge \\r
173 PNPID_DEVICE_PATH_NODE(0x0A03)\r
174\r
175#define gPnpPs2Keyboard \\r
176 PNPID_DEVICE_PATH_NODE(0x0303)\r
177\r
178#define gPnp16550ComPort \\r
179 PNPID_DEVICE_PATH_NODE(0x0501)\r
180\r
181#define gPciePort0Bridge \\r
182 PCI_DEVICE_PATH_NODE(0, 0x1C)\r
183\r
184#define gPciePort1Bridge \\r
185 PCI_DEVICE_PATH_NODE(1, 0x1C)\r
186\r
187#define gPciePort2Bridge \\r
188 PCI_DEVICE_PATH_NODE(2, 0x1C)\r
189\r
190#define gPciePort3Bridge \\r
191 PCI_DEVICE_PATH_NODE(3, 0x1C)\r
192\r
193#define gPciIsaBridge \\r
194 PCI_DEVICE_PATH_NODE(0, 0x1f)\r
195\r
196//\r
197// Platform Root Bridge\r
198//\r
199typedef struct {\r
200 ACPI_HID_DEVICE_PATH PciRootBridge;\r
201 EFI_DEVICE_PATH_PROTOCOL End;\r
202} PLATFORM_ROOT_BRIDGE_DEVICE_PATH;\r
203\r
204//\r
205// Below is the platform console device path\r
206//\r
207typedef struct {\r
208 ACPI_HID_DEVICE_PATH PciRootBridge;\r
209 PCI_DEVICE_PATH IsaBridge;\r
210 ACPI_HID_DEVICE_PATH Keyboard;\r
211 EFI_DEVICE_PATH_PROTOCOL End;\r
212} PLATFORM_ISA_KEYBOARD_DEVICE_PATH;\r
213\r
214typedef struct {\r
215 VENDOR_DEVICE_PATH VendorDevicePath;\r
216 EFI_DEVICE_PATH_PROTOCOL End;\r
217} HII_VENDOR_DEVICE_PATH;\r
218\r
219typedef struct {\r
220 USB_CLASS_DEVICE_PATH UsbClass;\r
221 EFI_DEVICE_PATH_PROTOCOL End;\r
222} USB_CLASS_FORMAT_DEVICE_PATH;\r
223\r
224typedef struct {\r
225 ACPI_HID_DEVICE_PATH PciRootBridge;\r
226 PCI_DEVICE_PATH OnboardVga;\r
227 EFI_DEVICE_PATH_PROTOCOL End;\r
228} PLATFORM_ONBOARD_VGA_DEVICE_PATH;\r
229\r
230typedef struct {\r
231 ACPI_HID_DEVICE_PATH PciRootBridge;\r
232 PCI_DEVICE_PATH AgpBridge;\r
233 PCI_DEVICE_PATH AgpDevice;\r
234 EFI_DEVICE_PATH_PROTOCOL End;\r
235} PLATFORM_OFFBOARD_VGA_DEVICE_PATH;\r
236\r
237typedef struct {\r
238 ACPI_HID_DEVICE_PATH PciRootBridge;\r
239 PCI_DEVICE_PATH IsaBridge;\r
240 ACPI_HID_DEVICE_PATH IsaSerial;\r
241 UART_DEVICE_PATH Uart;\r
242 VENDOR_DEVICE_PATH TerminalType;\r
243 EFI_DEVICE_PATH_PROTOCOL End;\r
244} PLATFORM_ISA_SERIAL_DEVICE_PATH;\r
245\r
246//\r
247// Below is the boot option device path\r
248//\r
249typedef struct {\r
250 BBS_BBS_DEVICE_PATH LegacyHD;\r
251 EFI_DEVICE_PATH_PROTOCOL End;\r
252} LEGACY_HD_DEVICE_PATH;\r
253\r
254//\r
255// Below is the platform IDE device path\r
256//\r
257typedef struct {\r
258 ACPI_HID_DEVICE_PATH PciRootBridge;\r
259 PCI_DEVICE_PATH IsaBridge;\r
260 ATAPI_DEVICE_PATH Ide;\r
261 EFI_DEVICE_PATH_PROTOCOL End;\r
262} PLATFORM_IDE_DEVICE_PATH;\r
263\r
264//\r
265// Floppy device path definition\r
266//\r
267typedef struct {\r
268 ACPI_HID_DEVICE_PATH PciRootBridge;\r
269 PCI_DEVICE_PATH IsaBridge;\r
270 ACPI_HID_DEVICE_PATH Floppy;\r
271 EFI_DEVICE_PATH_PROTOCOL End;\r
272} PLATFORM_FLOPPY_DEVICE_PATH;\r
273\r
274//\r
275// Below is the platform USB controller device path for\r
276// USB disk as user authentication device.\r
277//\r
278typedef struct {\r
279 ACPI_HID_DEVICE_PATH PciRootBridge;\r
280 PCI_DEVICE_PATH PciDevice;\r
281 EFI_DEVICE_PATH_PROTOCOL End;\r
282} PLATFORM_USB_DEVICE_PATH;\r
283\r
ed5b9110
MK
284//\r
285// Debug Agent UART Console device path definition\r
286//\r
287typedef struct {\r
288 VENDOR_DEVICE_PATH VendorHardware;\r
289 UART_DEVICE_PATH Uart;\r
290 VENDOR_DEVICE_PATH TerminalType;\r
291 EFI_DEVICE_PATH_PROTOCOL End;\r
292} VENDOR_UART_DEVICE_PATH;\r
293\r
3cbfba02
DW
294//\r
295// Below is the platform PCI device path\r
296//\r
297typedef struct {\r
298 ACPI_HID_DEVICE_PATH PciRootBridge;\r
299 PCI_DEVICE_PATH PciDevice;\r
300 EFI_DEVICE_PATH_PROTOCOL End;\r
301} PLATFORM_PCI_DEVICE_PATH;\r
302\r
303typedef enum {\r
304 PMIC_Equal = 0, // = 0\r
305 PMIC_Greater_Than, // > 1\r
306 PMIC_Smaller_Than, // < 2\r
307 PMIC_Greater_Equal, // >= 3\r
308 PMIC_Smaller_Equal, // <= 4\r
309 PMIC_Any // don't care 5\r
310} PMIC_Condition_list;\r
311\r
312typedef enum {\r
313 PMIC_White_List = 0, //White list\r
314 PMIC_Black_List = 1 //Black list\r
315} PMIC_Compliance_mode;\r
316\r
317typedef struct {\r
318 UINT8 Cond_Choice; // PMIC_Condition_list\r
319 UINT8 Cond_Number; // the number\r
320}PMIC_Condition_Item;\r
321\r
322typedef struct {\r
323 PMIC_Condition_Item PMIC_BoardID;\r
324 PMIC_Condition_Item PMIC_FabID;\r
325 PMIC_Condition_Item Soc_Stepping;//define PMIC type, 1:Dialog , 2:Rohm\r
326 PMIC_Condition_Item PMIC_VendID;\r
327 PMIC_Condition_Item PMIC_RevID;\r
328 PMIC_Compliance_mode mode; //if 1, blacklist; if 0, white list.\r
329} PMIC_Compliance_Item;\r
330\r
331//\r
332// Platform BDS Functions\r
333//\r
334VOID\r
335PlatformBdsGetDriverOption (\r
336 IN LIST_ENTRY *BdsDriverLists\r
337 );\r
338\r
339VOID\r
340PlatformBdsPredictBootOption (\r
341 IN LIST_ENTRY *BdsBootOptionList\r
342 );\r
343\r
344EFI_STATUS\r
345PlatformBdsShowProgress (\r
346 EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleForeground,\r
347 EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleBackground,\r
348 CHAR16 *Title,\r
349 EFI_GRAPHICS_OUTPUT_BLT_PIXEL ProgressColor,\r
350 UINTN Progress,\r
351 UINTN PreviousValue\r
352 );\r
353\r
354VOID\r
355PlatformBdsConnectSequence (\r
356 VOID\r
357 );\r
358\r
359EFI_STATUS\r
360PlatformBdsConnectConsole (\r
361 IN BDS_CONSOLE_CONNECT_ENTRY *PlatformConsole\r
362 );\r
363\r
364EFI_STATUS\r
365PlatformBdsNoConsoleAction (\r
366 VOID\r
367 );\r
368\r
369VOID\r
370PlatformBdsEnterFrontPage (\r
371 IN UINT16 TimeoutDefault,\r
372 IN BOOLEAN ConnectAllHappened\r
373 );\r
374\r
375VOID\r
376EFIAPI\r
377PlatformBdsUserIdentify (\r
378 OUT EFI_USER_PROFILE_HANDLE *User,\r
379 OUT BOOLEAN *DeferredImage\r
380 );\r
381\r
382VOID\r
383EFIAPI\r
384PlatformBdsConnectAuthDevice (\r
385 VOID\r
386 );\r
387\r
388VOID\r
389PlatformBdsEnterFrontPageWithHotKey (\r
390 IN UINT16 TimeoutDefault,\r
391 IN BOOLEAN ConnectAllHappened\r
392 );\r
393\r
394 EFI_STATUS\r
395 ShowProgress (\r
396 IN UINT16 TimeoutDefault\r
397 );\r
398\r
399 EFI_STATUS\r
400 InitializeFrontPage (\r
401 IN BOOLEAN InitializeHiiData\r
402 );\r
403\r
404 VOID\r
405 UpdateFrontPageStrings (\r
406 VOID\r
407 );\r
4139580d
SL
408 \r
409 \r
410 EFI_STATUS\r
411 InitBMPackage (\r
412 VOID\r
413 );\r
414 \r
415 \r
416 VOID\r
417 FreeBMPackage (\r
418 VOID\r
419 );\r
420 \r
421 \r
3cbfba02
DW
422 EFI_STATUS\r
423 CallFrontPage (\r
424 VOID\r
425 );\r
426\r
427\r
428 VOID\r
429 CallBootManager (\r
430 VOID\r
431 );\r
432\r
433VOID\r
434CallDeviceManager (\r
435 VOID\r
436 );\r
437\r
438VOID\r
439BdsStartBootMaint (\r
440 VOID\r
441 );\r
442\r
443CHAR16 *\r
444GetStringById (\r
445 IN EFI_STRING_ID Id\r
446 );\r
447\r
448EFI_STATUS\r
449WaitForSingleEvent (\r
450 IN EFI_EVENT Event,\r
451 IN UINT64 Timeout OPTIONAL\r
452 );\r
453\r
69a99d0b
MG
454EFI_STATUS\r
455BdsLibDeleteOptionFromHandle (\r
456 IN EFI_HANDLE Handle\r
457 );\r
458\r
459EFI_STATUS\r
460BdsDeleteAllInvalidEfiBootOption (\r
461 VOID\r
462 );\r
463\r
3cbfba02
DW
464\r
465#define ONE_SECOND 10000000\r
466#define FRONT_PAGE_KEY_CONTINUE 0x1000\r
467#define FRONT_PAGE_KEY_LANGUAGE 0x1234\r
468#define FRONT_PAGE_KEY_BOOT_MANAGER 0x1064\r
469#define FRONT_PAGE_KEY_DEVICE_MANAGER 0x8567\r
470#define FRONT_PAGE_KEY_BOOT_MAINTAIN 0x9876\r
471\r
472#define PORT_A_DVO 0 // ; DVO A\r
473#define PORT_B_DVO 1 // ; DVO B\r
474#define PORT_C_DVO 2 // ; DVO C\r
475#define PORT_D_DVO 3 // ; DVO D\r
476#define PORT_LVDS 4 // ; Integrated LVDS port\r
477#define PORT_ANALOG_TV 5 // ; Integrated TV port\r
478#define PORT_CRT 6 // ; integrated Analog port\r
479#define PORT_B_DP 7 // ; DisplayPort B\r
480#define PORT_C_DP 8 // ; DisplayPort C\r
481#define PORT_D_DP 9 // ; DisplayPort D\r
482#define PORT_A_DP 10 // ; DisplayPort A (for eDP on ILK)\r
483#define PORT_B_HDMI 11 // ; HDMI B\r
484#define PORT_C_HDMI 12 // ; HDMI C\r
485#define PORT_D_HDMI 13 // ; HDMI D\r
486#define PORT_B_DVI 14 // ; DVI B\r
487#define PORT_C_DVI 15 // ; DVI C\r
488#define PORT_D_DVI 16 // ; DVI D\r
489#define PORT_MIPI_A 21 // ; MIPI\r
490#define PORT_MIPI_B 22\r
491#define PORT_MIPI_C 23\r
492\r
493\r
494extern BOOLEAN gConnectAllHappened;\r
495extern UINTN gCallbackKey;\r
496\r
497VOID\r
498BdsBootDeviceSelect (\r
499 VOID\r
500);\r
501VOID FastBoot(VOID);\r
502\r
503extern BOOLEAN mModeInitialized;\r
504\r
505//\r
506// Boot video resolution and text mode.\r
507//\r
508extern UINT32 mBootHorizontalResolution ;\r
509extern UINT32 mBootVerticalResolution ;\r
510extern UINT32 mBootTextModeColumn ;\r
511extern UINT32 mBootTextModeRow ;\r
512\r
513//\r
514// BIOS setup video resolution and text mode.\r
515//\r
516extern UINT32 mSetupTextModeColumn ;\r
517extern UINT32 mSetupTextModeRow ;\r
518extern UINT32 mSetupHorizontalResolution ;\r
519extern UINT32 mSetupVerticalResolution ;\r
520extern EFI_STATUS BdsSetConsoleMode (BOOLEAN);\r
521#endif // _BDS_PLATFORM_H\r