projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 3cbfba02 DW |
1 | /*++\r |
| 2 | \r | |
| 3 | Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r | |
| 4 | \r\r | |
| 5 | This program and the accompanying materials are licensed and made available under\r\r | |
| 6 | the terms and conditions of the BSD License that accompanies this distribution. \r\r | |
| 7 | The full text of the license may be found at \r\r | |
| 8 | http://opensource.org/licenses/bsd-license.php. \r\r | |
| 9 | \r\r | |
| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r | |
| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r | |
| 12 | \r\r | |
| 13 | \r | |
| 14 | Module Name:\r | |
| 15 | \r | |
| 16 | PciPlatform.h\r | |
| 17 | \r | |
| 18 | Abstract:\r | |
| 19 | \r | |
| 20 | --*/\r | |
| 21 | #ifndef PCI_PLATFORM_H_\r | |
| 22 | #define PCI_PLATFORM_H_\r | |
| 23 | \r | |
| 24 | \r | |
| 25 | #include <PiDxe.h>\r | |
| 26 | #include "Platform.h"\r | |
| 27 | \r | |
| 28 | //\r | |
| 29 | // Produced Protocols\r | |
| 30 | //\r | |
| 31 | #include <Protocol/PciPlatform.h>\r | |
| 32 | \r | |
| 33 | #define IGD_DID_II 0x0BE1\r | |
| 34 | #define IGD_DID_0BE4 0x0BE4\r | |
| 35 | #define IGD_DID_VLV_A0 0x0F31\r | |
| 36 | #define OPROM_DID_OFFSET 0x46\r | |
| 37 | \r | |
| 38 | typedef struct {\r | |
| 39 | EFI_GUID FileName;\r | |
| 40 | UINTN Segment;\r | |
| 41 | UINTN Bus;\r | |
| 42 | UINTN Device;\r | |
| 43 | UINTN Function;\r | |
| 44 | UINT16 VendorId;\r | |
| 45 | UINT16 DeviceId;\r | |
| 46 | UINT8 Flag;\r | |
| 47 | } PCI_OPTION_ROM_TABLE;\r | |
| 48 | \r | |
| 49 | EFI_STATUS\r | |
| 50 | EFIAPI\r | |
| 51 | PhaseNotify (\r | |
| 52 | IN EFI_PCI_PLATFORM_PROTOCOL *This,\r | |
| 53 | IN EFI_HANDLE HostBridge,\r | |
| 54 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,\r | |
| 55 | IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r | |
| 56 | );\r | |
| 57 | \r | |
| 58 | \r | |
| 59 | EFI_STATUS\r | |
| 60 | EFIAPI\r | |
| 61 | PlatformPrepController (\r | |
| 62 | IN EFI_PCI_PLATFORM_PROTOCOL *This,\r | |
| 63 | IN EFI_HANDLE HostBridge,\r | |
| 64 | IN EFI_HANDLE RootBridge,\r | |
| 65 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r | |
| 66 | IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,\r | |
| 67 | IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r | |
| 68 | );\r | |
| 69 | \r | |
| 70 | EFI_STATUS\r | |
| 71 | EFIAPI \r | |
| 72 | GetPlatformPolicy (\r | |
| 73 | IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,\r | |
| 74 | OUT EFI_PCI_PLATFORM_POLICY *PciPolicy\r | |
| 75 | );\r | |
| 76 | \r | |
| 77 | EFI_STATUS\r | |
| 78 | EFIAPI\r | |
| 79 | GetPciRom (\r | |
| 80 | IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,\r | |
| 81 | IN EFI_HANDLE PciHandle,\r | |
| 82 | OUT VOID **RomImage,\r | |
| 83 | OUT UINTN *RomSize\r | |
| 84 | );\r | |
| 85 | \r | |
| 86 | #endif\r | |
| 87 | \r | |
| 88 | \r |