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[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformDxe / Platform.c
CommitLineData
3cbfba02
DW		 1/** @file\r
2\r
d71c25cf
DW		 3 Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>\r
4 \r
5\r
9dc8036d 6 SPDX-License-Identifier: BSD-2-Clause-Patent\r
d71c25cf
DW		 7\r
8 \r
9\r
3cbfba02
DW		 10\r
11Module Name:\r
12\r
13\r
14 Platform.c\r
15\r
16Abstract:\r
17\r
18 Platform Initialization Driver.\r
19\r
20\r
21--*/\r
22\r
23#include "PlatformDxe.h"\r
24#include "Platform.h"\r
25#include "PchCommonDefinitions.h"\r
26#include <Protocol/UsbPolicy.h>\r
27#include <Protocol/PchPlatformPolicy.h>\r
28#include <Protocol/TpmMp.h>\r
29#include <Protocol/CpuIo2.h>\r
30#include <Library/S3BootScriptLib.h>\r
31#include <Guid/PciLanInfo.h>\r
32#include <Guid/ItkData.h>\r
33#include <Library/PciLib.h>\r
34#include <PlatformBootMode.h>\r
35#include <Guid/EventGroup.h>\r
36#include <Guid/Vlv2Variable.h>\r
37#include <Protocol/GlobalNvsArea.h>\r
38#include <Protocol/IgdOpRegion.h>\r
39#include <Library/PcdLib.h>\r
620f2891
TH		 40#include <Protocol/VariableLock.h>\r
41\r
3cbfba02
DW		 42\r
43//\r
44// VLV2 GPIO GROUP OFFSET\r
45//\r
46#define GPIO_SCORE_OFFSET 0x0000\r
47#define GPIO_NCORE_OFFSET 0x1000\r
48#define GPIO_SSUS_OFFSET 0x2000\r
49\r
50typedef struct {\r
51 UINT32 offset;\r
52 UINT32 val;\r
53} CFIO_PNP_INIT;\r
54\r
55GPIO_CONF_PAD_INIT mTB_BL_GpioInitData_SC_TRI_Exit_boot_Service[] =\r
56{\r
57// Pad Name GPIO Number Used As GPO Default Function# INT Capable Interrupt Type PULL H/L MMIO Offset\r
58 GPIO_INIT_ITEM("LPC_CLKOUT0 GPIOC_47 " ,TRISTS ,NA ,F0 , , ,NONE ,0x47),\r
59 GPIO_INIT_ITEM("LPC_CLKOUT1 GPIOC_48 " ,TRISTS ,NA ,F0 , , ,NONE ,0x41),\r
60};\r
61\r
62\r
63EFI_GUID mSystemHiiExportDatabase = EFI_HII_EXPORT_DATABASE_GUID;\r
64EFI_GUID mPlatformDriverGuid = EFI_PLATFORM_DRIVER_GUID;\r
65SYSTEM_CONFIGURATION mSystemConfiguration;\r
66SYSTEM_PASSWORDS mSystemPassword;\r
67EFI_HANDLE mImageHandle;\r
68BOOLEAN mMfgMode = FALSE;\r
69VOID *mDxePlatformStringPack;\r
70UINT32 mPlatformBootMode = PLATFORM_NORMAL_MODE;\r
71extern CHAR16 gItkDataVarName[];\r
72\r
73\r
74EFI_PLATFORM_INFO_HOB mPlatformInfo;\r
75EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo;\r
76EFI_EVENT mReadyToBootEvent;\r
77\r
78UINT8 mSmbusRsvdAddresses[] = PLATFORM_SMBUS_RSVD_ADDRESSES;\r
79UINT8 mNumberSmbusAddress = sizeof( mSmbusRsvdAddresses ) / sizeof( mSmbusRsvdAddresses[0] );\r
80UINT32 mSubsystemVidDid;\r
81UINT32 mSubsystemAudioVidDid;\r
82\r
83UINTN mPciLanCount = 0;\r
84VOID *mPciLanInfo = NULL;\r
85UINTN SpiBase;\r
86\r
87static EFI_SPEAKER_IF_PROTOCOL mSpeakerInterface = {\r
88 ProgramToneFrequency,\r
89 GenerateBeepTone\r
90};\r
91\r
92EFI_USB_POLICY_PROTOCOL mUsbPolicyData = {0};\r
93\r
94\r
95CFIO_PNP_INIT mTB_BL_GpioInitData_SC_TRI_S0ix_Exit_boot_Service[] =\r
96{\r
97 {0x410 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pconf0\r
98 {0x470 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pconf0\r
99 {0x560 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pconf0\r
100 {0x450 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pconf0\r
101 {0x480 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pconf0\r
102 {0x420 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pconf0\r
103 {0x430 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pconf0\r
104 {0x440 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pconf0\r
105 {0x460 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pconf0\r
106 {0x418 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pad_val\r
107 {0x478 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pad_val\r
108 {0x568 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pad_val\r
109 {0x458 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pad_val\r
110 {0x488 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pad_val\r
111 {0x428 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pad_val\r
112 {0x438 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pad_val\r
113 {0x448 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pad_val\r
114 {0x468 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pad_val\r
115};\r
116\r
117VOID\r
118EfiOrMem (\r
119 IN VOID *Destination,\r
120 IN VOID *Source,\r
121 IN UINTN Length\r
122 );\r
123\r
124#if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)\r
125STATIC\r
126VOID\r
127InitFirmwareId();\r
128#endif\r
129\r
130\r
131VOID\r
132InitializeClockRouting(\r
133 );\r
134\r
135VOID\r
136InitializeSlotInfo (\r
137 );\r
138\r
139#if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0\r
140VOID\r
141InitializeSensorInfoVariable (\r
142 );\r
143#endif\r
144\r
145VOID\r
146InitTcoReset (\r
147 );\r
148\r
149VOID\r
150InitExI ();\r
151\r
152VOID\r
153InitItk();\r
154\r
155VOID\r
156InitPlatformBootMode();\r
157\r
158VOID\r
159InitMfgAndConfigModeStateVar();\r
160\r
161VOID\r
162InitPchPlatformPolicy (\r
163 IN EFI_PLATFORM_INFO_HOB *PlatformInfo\r
164 );\r
165\r
166VOID\r
167InitVlvPlatformPolicy (\r
168 );\r
169\r
170VOID\r
171InitSioPlatformPolicy(\r
172 );\r
173\r
174VOID\r
175PchInitBeforeBoot(\r
176 );\r
177\r
178VOID\r
179UpdateDVMTSetup(\r
180 );\r
181\r
182VOID\r
183InitPlatformUsbPolicy (\r
184 VOID\r
185 );\r
186\r
187VOID\r
188InitRC6Policy(\r
189 VOID\r
190 );\r
191\r
192\r
620f2891
TH		 193EFI_STATUS\r
194EFIAPI\r
195SaveSetupRecoveryVar(\r
196 VOID\r
197 )\r
198{\r
199 EFI_STATUS Status = EFI_SUCCESS;\r
200 UINTN SizeOfNvStore = 0;\r
201 UINTN SizeOfSetupVar = 0;\r
202 SYSTEM_CONFIGURATION *SetupData = NULL;\r
203 SYSTEM_CONFIGURATION *RecoveryNvData = NULL;\r
204 EDKII_VARIABLE_LOCK_PROTOCOL *VariableLock = NULL;\r
205\r
206\r
207 DEBUG ((EFI_D_INFO, "SaveSetupRecoveryVar() Entry \n"));\r
208 SizeOfNvStore = sizeof(SYSTEM_CONFIGURATION);\r
209 RecoveryNvData = AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION));\r
210 if (NULL == RecoveryNvData) {\r
211 Status = EFI_OUT_OF_RESOURCES;\r
212 goto Exit; \r
213 }\r
214 \r
215 Status = gRT->GetVariable(\r
216 L"SetupRecovery",\r
217 &gEfiNormalSetupGuid,\r
218 NULL,\r
219 &SizeOfNvStore,\r
220 RecoveryNvData\r
221 );\r
222 \r
223 if (EFI_ERROR (Status)) {\r
224 // Don't find the "SetupRecovery" variable.\r
225 // have to copy "Setup" variable to "SetupRecovery" variable.\r
226 SetupData = AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION));\r
227 if (NULL == SetupData) {\r
228 Status = EFI_OUT_OF_RESOURCES;\r
229 goto Exit; \r
230 }\r
231 SizeOfSetupVar = sizeof(SYSTEM_CONFIGURATION);\r
232 Status = gRT->GetVariable(\r
233 NORMAL_SETUP_NAME,\r
234 &gEfiNormalSetupGuid,\r
235 NULL,\r
236 &SizeOfSetupVar,\r
237 SetupData\r
238 );\r
239 ASSERT_EFI_ERROR (Status);\r
240 \r
241 Status = gRT->SetVariable (\r
242 L"SetupRecovery",\r
243 &gEfiNormalSetupGuid,\r
244 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
245 sizeof(SYSTEM_CONFIGURATION),\r
246 SetupData\r
247 );\r
248 ASSERT_EFI_ERROR (Status);\r
249\r
250 Status = gBS->LocateProtocol (&gEdkiiVariableLockProtocolGuid, NULL, (VOID **) &VariableLock);\r
251 if (!EFI_ERROR (Status)) {\r
252 Status = VariableLock->RequestToLock (VariableLock, L"SetupRecovery", &gEfiNormalSetupGuid);\r
253 ASSERT_EFI_ERROR (Status);\r
254 }\r
255 \r
256 }\r
257\r
258Exit:\r
259 if (RecoveryNvData)\r
260 FreePool (RecoveryNvData);\r
261 if (SetupData)\r
262 FreePool (SetupData);\r
263 \r
264 return Status;\r
265 \r
266}\r
267\r
268\r
3cbfba02
DW		 269VOID\r
270TristateLpcGpioConfig (\r
271 IN UINT32 Gpio_Mmio_Offset,\r
272 IN UINT32 Gpio_Pin_Num,\r
273 GPIO_CONF_PAD_INIT* Gpio_Conf_Data\r
274 )\r
275\r
276{\r
277 UINT32 index;\r
278 UINT32 mmio_conf0;\r
279 UINT32 mmio_padval;\r
280 PAD_CONF0 conf0_val;\r
281 PAD_VAL pad_val;\r
282\r
283 //\r
284 // GPIO WELL -- Memory base registers\r
285 //\r
286\r
287 //\r
288 // A0 BIOS Spec doesn't mention it although X0 does. comment out now.\r
289 // GPIO write 0x01001002 to IOBASE + Gpio_Mmio_Offset + 0x0900\r
290 //\r
291\r
292 for(index=0; index < Gpio_Pin_Num; index++)\r
293 {\r
294 //\r
295 // Calculate the MMIO Address for specific GPIO pin CONF0 register pointed by index.\r
296 //\r
297 mmio_conf0 = IO_BASE_ADDRESS + Gpio_Mmio_Offset + R_PCH_CFIO_PAD_CONF0 + Gpio_Conf_Data[index].offset * 16;\r
298 mmio_padval= IO_BASE_ADDRESS + Gpio_Mmio_Offset + R_PCH_CFIO_PAD_VAL + Gpio_Conf_Data[index].offset * 16;\r
299\r
300#ifdef EFI_DEBUG\r
301 DEBUG ((EFI_D_INFO, "%s, ", Gpio_Conf_Data[index].pad_name));\r
302\r
303#endif\r
304 DEBUG ((EFI_D_INFO, "Usage = %d, Func# = %d, IntType = %d, Pull Up/Down = %d, MMIO Base = 0x%08x, ",\r
305 Gpio_Conf_Data[index].usage,\r
306 Gpio_Conf_Data[index].func,\r
307 Gpio_Conf_Data[index].int_type,\r
308 Gpio_Conf_Data[index].pull,\r
309 mmio_conf0));\r
310\r
311 //\r
312 // Step 1: PadVal Programming\r
313 //\r
314 pad_val.dw = MmioRead32(mmio_padval);\r
315\r
316 //\r
317 // Config PAD_VAL only for GPIO (Non-Native) Pin\r
318 //\r
319 if(Native != Gpio_Conf_Data[index].usage)\r
320 {\r
321 pad_val.dw &= ~0x6; // Clear bits 1:2\r
322 pad_val.dw |= (Gpio_Conf_Data[index].usage & 0x6); // Set bits 1:2 according to PadVal\r
323\r
324 //\r
325 // set GPO default value\r
326 //\r
327 if(Gpio_Conf_Data[index].usage == GPO && Gpio_Conf_Data[index].gpod4 != NA)\r
328 {\r
329 pad_val.r.pad_val = Gpio_Conf_Data[index].gpod4;\r
330 }\r
331 }\r
332\r
333\r
334 DEBUG ((EFI_D_INFO, "Set PAD_VAL = 0x%08x, ", pad_val.dw));\r
335\r
336 MmioWrite32(mmio_padval, pad_val.dw);\r
337\r
338 //\r
339 // Step 2: CONF0 Programming\r
340 // Read GPIO default CONF0 value, which is assumed to be default value after reset.\r
341 //\r
342 conf0_val.dw = MmioRead32(mmio_conf0);\r
343\r
344 //\r
345 // Set Function #\r
346 //\r
347 conf0_val.r.Func_Pin_Mux = Gpio_Conf_Data[index].func;\r
348\r
349 if(GPO == Gpio_Conf_Data[index].usage)\r
350 {\r
351 //\r
352 // If used as GPO, then internal pull need to be disabled\r
353 //\r
354 conf0_val.r.Pull_assign = 0; // Non-pull\r
355 }\r
356 else\r
357 {\r
358 //\r
359 // Set PullUp / PullDown\r
360 //\r
361 if(P_20K_H == Gpio_Conf_Data[index].pull)\r
362 {\r
363 conf0_val.r.Pull_assign = 0x1; // PullUp\r
364 conf0_val.r.Pull_strength = 0x2;// 20K\r
365 }\r
366 else if(P_20K_L == Gpio_Conf_Data[index].pull)\r
367 {\r
368 conf0_val.r.Pull_assign = 0x2; // PullDown\r
369 conf0_val.r.Pull_strength = 0x2;// 20K\r
370 }\r
371 else if(P_NONE == Gpio_Conf_Data[index].pull)\r
372 {\r
373 conf0_val.r.Pull_assign = 0; // Non-pull\r
374 }\r
375 else\r
376 {\r
377 ASSERT(FALSE); // Invalid value\r
378 }\r
379 }\r
380\r
381 //\r
382 // Set INT Trigger Type\r
383 //\r
384 conf0_val.dw &= ~0x0f000000; // Clear bits 27:24\r
385\r
386 //\r
387 // Set INT Trigger Type\r
388 //\r
389 if(TRIG_ == Gpio_Conf_Data[index].int_type)\r
390 {\r
391 //\r
392 // Interrupt not capable, clear bits 27:24\r
393 //\r
394 }\r
395 else\r
396 {\r
397 conf0_val.dw |= (Gpio_Conf_Data[index].int_type & 0x0f)<<24;\r
398 }\r
399\r
400 DEBUG ((EFI_D_INFO, "Set CONF0 = 0x%08x\n", conf0_val.dw));\r
401\r
402 //\r
403 // Write back the targeted GPIO config value according to platform (board) GPIO setting\r
404 //\r
405 MmioWrite32 (mmio_conf0, conf0_val.dw);\r
406 }\r
407\r
408 // A0 BIOS Spec doesn't mention it although X0 does. comment out now.\r
409 // GPIO SCORE write 0x01001002 to IOBASE + 0x0900\r
410 //\r
411}\r
412\r
413VOID\r
414EFIAPI\r
415SpiBiosProtectionFunction(\r
416 EFI_EVENT Event,\r
417 VOID *Context\r
418 )\r
419{\r
420\r
421 UINTN mPciD31F0RegBase;\r
fb1a4e36
SL		 422 UINTN BiosFlaLower0;\r
423 UINTN BiosFlaLimit0;\r
424 UINTN BiosFlaLower1;\r
425 UINTN BiosFlaLimit1; \r
426 \r
3cbfba02 427\r
fb1a4e36
SL		 428 BiosFlaLower0 = PcdGet32(PcdFlashMicroCodeAddress)-PcdGet32(PcdFlashAreaBaseAddress);\r
429 BiosFlaLimit0 = PcdGet32(PcdFlashMicroCodeSize)-1; \r
430 #ifdef MINNOW2_FSP_BUILD\r
431 BiosFlaLower1 = PcdGet32(PcdFlashFvFspBase)-PcdGet32(PcdFlashAreaBaseAddress);\r
432 BiosFlaLimit1 = (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvFspBase)+PcdGet32(PcdFlashFvRecoverySize))-1;\r
433 #else\r
434 BiosFlaLower1 = PcdGet32(PcdFlashFvMainBase)-PcdGet32(PcdFlashAreaBaseAddress);\r
435 BiosFlaLimit1 = (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvMainBase)+PcdGet32(PcdFlashFvRecoverySize))-1;\r
436 #endif\r
3cbfba02 437\r
fb1a4e36 438 \r
3cbfba02
DW		 439 mPciD31F0RegBase = MmPciAddress (0,\r
440 DEFAULT_PCI_BUS_NUMBER_PCH,\r
441 PCI_DEVICE_NUMBER_PCH_LPC,\r
442 PCI_FUNCTION_NUMBER_PCH_LPC,\r
443 0\r
444 );\r
445 SpiBase = MmioRead32(mPciD31F0RegBase + R_PCH_LPC_SPI_BASE) & B_PCH_LPC_SPI_BASE_BAR;\r
446\r
447 //\r
448 //Set SMM_BWP, WPD and LE bit\r
449 //\r
450 MmioOr32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8) B_PCH_SPI_BCR_SMM_BWP);\r
451 MmioAnd32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8)(~B_PCH_SPI_BCR_BIOSWE));\r
452 MmioOr32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8) B_PCH_SPI_BCR_BLE);\r
453\r
454 //\r
455 //First check if FLOCKDN or PR0FLOCKDN is set. No action if either of them set already.\r
456 //\r
457 if( (MmioRead16(SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) != 0 ||\r
458 (MmioRead32(SpiBase + R_PCH_SPI_IND_LOCK)& B_PCH_SPI_IND_LOCK_PR0) != 0) {\r
459 //\r
460 //Already locked. we could take no action here\r
461 //\r
462 DEBUG((EFI_D_INFO, "PR0 already locked down. Stop configuring PR0.\n"));\r
463 return;\r
464 }\r
465\r
466 //\r
467 //Set PR0\r
468 //\r
469 MmioOr32((UINTN)(SpiBase + R_PCH_SPI_PR0),\r
470 B_PCH_SPI_PR0_RPE|B_PCH_SPI_PR0_WPE|\\r
fb1a4e36 471 (B_PCH_SPI_PR0_PRB_MASK&(BiosFlaLower0>>12))|(B_PCH_SPI_PR0_PRL_MASK&(BiosFlaLimit0>>12)<<16));\r
3cbfba02 472\r
fb1a4e36
SL		 473 //\r
474 //Set PR1\r
475 //\r
476\r
477 MmioOr32((UINTN)(SpiBase + R_PCH_SPI_PR1),\r
478 B_PCH_SPI_PR1_RPE|B_PCH_SPI_PR1_WPE|\\r
479 (B_PCH_SPI_PR1_PRB_MASK&(BiosFlaLower1>>12))|(B_PCH_SPI_PR1_PRL_MASK&(BiosFlaLimit1>>12)<<16));\r
480\r
481 //\r
6f2ef18e 482 //Lock down PRx\r
fb1a4e36
SL		 483 //\r
484 MmioOr16 ((UINTN) (SpiBase + R_PCH_SPI_HSFS), (UINT16) (B_PCH_SPI_HSFS_FLOCKDN));\r
485\r
486 //\r
487 // Verify if it's really locked.\r
488 //\r
489 if ((MmioRead16 (SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) == 0) {\r
6f2ef18e 490 DEBUG((EFI_D_ERROR, "Failed to lock down PRx.\n"));\r
fb1a4e36 491 }\r
3cbfba02
DW		 492 return;\r
493\r
494}\r
495\r
496VOID\r
497EFIAPI\r
498InitPciDevPME (\r
499 EFI_EVENT Event,\r
500 VOID *Context\r
501 )\r
502{\r
503 UINTN VarSize;\r
3cbfba02
DW		 504\r
505 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
076d0d64
GL		 506 gRT->GetVariable(\r
507 NORMAL_SETUP_NAME,\r
508 &gEfiNormalSetupGuid,\r
509 NULL,\r
510 &VarSize,\r
511 &mSystemConfiguration\r
512 );\r
3cbfba02
DW		 513\r
514 //\r
515 //Program HDA PME_EN\r
516 //\r
517 PchAzaliaPciCfg32Or (R_PCH_HDA_PCS, B_PCH_HDA_PCS_PMEE);\r
518\r
519 //\r
520 //Program SATA PME_EN\r
521 //\r
522 PchSataPciCfg32Or (R_PCH_SATA_PMCS, B_PCH_SATA_PMCS_PMEE);\r
523\r
524 DEBUG ((EFI_D_INFO, "InitPciDevPME mSystemConfiguration.EhciPllCfgEnable = 0x%x \n",mSystemConfiguration.EhciPllCfgEnable));\r
525 if (mSystemConfiguration.EhciPllCfgEnable != 1) {\r
526 //\r
527 //Program EHCI PME_EN\r
528 //\r
529 PchMmPci32Or (\r
530 0,\r
531 0,\r
532 PCI_DEVICE_NUMBER_PCH_USB,\r
533 PCI_FUNCTION_NUMBER_PCH_EHCI,\r
534 R_PCH_EHCI_PWR_CNTL_STS,\r
535 B_PCH_EHCI_PWR_CNTL_STS_PME_EN\r
536 );\r
537 }\r
538 {\r
539 UINTN EhciPciMmBase;\r
540 UINT32 Buffer32 = 0;\r
541\r
542 EhciPciMmBase = MmPciAddress (0,\r
543 0,\r
544 PCI_DEVICE_NUMBER_PCH_USB,\r
545 PCI_FUNCTION_NUMBER_PCH_EHCI,\r
546 0\r
547 );\r
548 DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() EhciPciMmBase = 0x%x \n",EhciPciMmBase));\r
549 Buffer32 = MmioRead32(EhciPciMmBase + R_PCH_EHCI_PWR_CNTL_STS);\r
550 DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() R_PCH_EHCI_PWR_CNTL_STS = 0x%x \n",Buffer32));\r
551 }\r
552}\r
553\r
6f2ef18e
TH		 554VOID\r
555EFIAPI\r
556InitThermalZone (\r
557 EFI_EVENT Event,\r
558 VOID *Context\r
559 )\r
560{\r
561 UINTN VarSize;\r
6f2ef18e
TH		 562 EFI_GLOBAL_NVS_AREA_PROTOCOL *GlobalNvsArea;\r
563 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
076d0d64
GL		 564 gRT->GetVariable(\r
565 NORMAL_SETUP_NAME,\r
566 &gEfiNormalSetupGuid,\r
567 NULL,\r
568 &VarSize,\r
569 &mSystemConfiguration\r
570 );\r
571 gBS->LocateProtocol (\r
572 &gEfiGlobalNvsAreaProtocolGuid,\r
573 NULL,\r
574 (void **)&GlobalNvsArea\r
575 );\r
6f2ef18e
TH		 576 GlobalNvsArea->Area->CriticalThermalTripPoint = mSystemConfiguration.CriticalThermalTripPoint;\r
577 GlobalNvsArea->Area->PassiveThermalTripPoint = mSystemConfiguration.PassiveThermalTripPoint;\r
578}\r
3cbfba02
DW		 579#if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY\r
580\r
581#endif\r
582\r
583\r
584EFI_STATUS\r
585EFIAPI\r
586TristateLpcGpioS0i3Config (\r
587 UINT32 Gpio_Mmio_Offset,\r
588 UINT32 Gpio_Pin_Num,\r
589 CFIO_PNP_INIT* Gpio_Conf_Data\r
590 )\r
591{\r
592\r
593 UINT32 index;\r
594 UINT32 mmio_reg;\r
595 UINT32 mmio_val;\r
596\r
597 DEBUG ((DEBUG_INFO, "TristateLpcGpioS0i3Config\n"));\r
598\r
599 for(index=0; index < Gpio_Pin_Num; index++)\r
600 {\r
601 mmio_reg = IO_BASE_ADDRESS + Gpio_Mmio_Offset + Gpio_Conf_Data[index].offset;\r
602\r
603 MmioWrite32(mmio_reg, Gpio_Conf_Data[index].val);\r
604 mmio_val = 0;\r
605 mmio_val = MmioRead32(mmio_reg);\r
606\r
607 DEBUG ((EFI_D_INFO, "Set MMIO=0x%08x PAD_VAL = 0x%08x,\n", mmio_reg, mmio_val));\r
608 }\r
609\r
610 return EFI_SUCCESS;\r
611}\r
612\r
613\r
614EFI_BOOT_SCRIPT_SAVE_PROTOCOL *mBootScriptSave;\r
615\r
616/**\r
617 Event Notification during exit boot service to enabel ACPI mode\r
618\r
619 Disable SW SMI Timer, SMI from USB & Intel Specific USB 2\r
620\r
621 Clear all ACPI event status and disable all ACPI events\r
622 Disable PM sources except power button\r
623 Clear status bits\r
624\r
625 Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")\r
626\r
627 Update EC to disable SMI and enable SCI\r
628\r
629 Enable SCI\r
630\r
631 Enable PME_B0_EN in GPE0a_EN\r
632\r
633 @param Event - EFI Event Handle\r
634 @param Context - Pointer to Notify Context\r
635\r
636 @retval Nothing\r
637\r
638**/\r
639VOID\r
640EFIAPI\r
641EnableAcpiCallback (\r
642 IN EFI_EVENT Event,\r
643 IN VOID *Context\r
644 )\r
645{\r
646 UINT32 RegData32;\r
647 UINT16 Pm1Cnt;\r
648 UINT16 AcpiBase;\r
649 UINT32 Gpe0aEn;\r
650\r
651 AcpiBase = MmioRead16 (\r
652 PchPciDeviceMmBase (DEFAULT_PCI_BUS_NUMBER_PCH,\r
653 PCI_DEVICE_NUMBER_PCH_LPC,\r
654 PCI_FUNCTION_NUMBER_PCH_LPC) + R_PCH_LPC_ACPI_BASE\r
655 ) & B_PCH_LPC_ACPI_BASE_BAR;\r
656\r
657 DEBUG ((EFI_D_INFO, "EnableAcpiCallback: AcpiBase = %x\n", AcpiBase));\r
658\r
659 //\r
660 // Disable SW SMI Timer, SMI from USB & Intel Specific USB 2\r
661 //\r
662 RegData32 = IoRead32(AcpiBase + R_PCH_SMI_EN);\r
663 RegData32 &= ~(B_PCH_SMI_EN_SWSMI_TMR | B_PCH_SMI_EN_LEGACY_USB2 | B_PCH_SMI_EN_INTEL_USB2);\r
664 IoWrite32(AcpiBase + R_PCH_SMI_EN, RegData32);\r
665\r
666 RegData32 = IoRead32(AcpiBase + R_PCH_SMI_STS);\r
667 RegData32 |= B_PCH_SMI_STS_SWSMI_TMR;\r
668 IoWrite32(AcpiBase + R_PCH_SMI_STS, RegData32);\r
669\r
670 //\r
671 // Disable PM sources except power button\r
672 // power button is enabled only for PCAT. Disabled it on Tablet platform\r
673 //\r
674\r
675 IoWrite16(AcpiBase + R_PCH_ACPI_PM1_EN, B_PCH_ACPI_PM1_EN_PWRBTN);\r
676 IoWrite16(AcpiBase + R_PCH_ACPI_PM1_STS, 0xffff);\r
677\r
678 //\r
679 // Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")\r
680 // Clear Status D reg VM bit, Date of month Alarm to make Data in CMOS RAM is no longer Valid\r
681 //\r
682 IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, RTC_ADDRESS_REGISTER_D);\r
683 IoWrite8 (PCAT_RTC_DATA_REGISTER, 0x0);\r
684\r
685 RegData32 = IoRead32(AcpiBase + R_PCH_ALT_GP_SMI_EN);\r
686 RegData32 &= ~(BIT7);\r
687 IoWrite32((AcpiBase + R_PCH_ALT_GP_SMI_EN), RegData32);\r
688\r
689 //\r
690 // Enable SCI\r
691 //\r
692 Pm1Cnt = IoRead16(AcpiBase + R_PCH_ACPI_PM1_CNT);\r
693 Pm1Cnt |= B_PCH_ACPI_PM1_CNT_SCI_EN;\r
694 IoWrite16(AcpiBase + R_PCH_ACPI_PM1_CNT, Pm1Cnt);\r
695\r
696 IoWrite8(0x80, 0xA0); //SW_SMI_ACPI_ENABLE\r
697\r
698 //\r
699 // Enable PME_B0_EN in GPE0a_EN\r
700 // Caution: Enable PME_B0_EN must be placed after enabling SCI.\r
701 // Otherwise, USB PME could not be handled as SMI event since no handler is there.\r
702 //\r
703 Gpe0aEn = IoRead32 (AcpiBase + R_PCH_ACPI_GPE0a_EN);\r
704 Gpe0aEn |= B_PCH_ACPI_GPE0a_EN_PME_B0;\r
705 IoWrite32(AcpiBase + R_PCH_ACPI_GPE0a_EN, Gpe0aEn);\r
706\r
707}\r
708\r
709/**\r
710\r
711 Routine Description:\r
712\r
713 This is the standard EFI driver point for the Driver. This\r
714 driver is responsible for setting up any platform specific policy or\r
715 initialization information.\r
716\r
717 @param ImageHandle Handle for the image of this driver.\r
718 @param SystemTable Pointer to the EFI System Table.\r
719\r
720 @retval EFI_SUCCESS Policy decisions set.\r
721\r
722**/\r
723EFI_STATUS\r
724EFIAPI\r
725InitializePlatform (\r
726 IN EFI_HANDLE ImageHandle,\r
727 IN EFI_SYSTEM_TABLE *SystemTable\r
728 )\r
729{\r
730 EFI_STATUS Status;\r
731 UINTN VarSize;\r
732 EFI_HANDLE Handle = NULL;\r
3cbfba02 733 EFI_EVENT mEfiExitBootServicesEvent;\r
d71c25cf
DW		 734 EFI_EVENT RtcEvent;\r
735 VOID *RtcCallbackReg = NULL;\r
736 \r
737 mImageHandle = ImageHandle;\r
3cbfba02
DW		 738\r
739 Status = gBS->InstallProtocolInterface (\r
740 &Handle,\r
741 &gEfiSpeakerInterfaceProtocolGuid,\r
742 EFI_NATIVE_INTERFACE,\r
743 &mSpeakerInterface\r
744 );\r
745\r
746 Status = gBS->LocateProtocol (\r
747 &gEfiPciRootBridgeIoProtocolGuid,\r
748 NULL,\r
749 (VOID **) &mPciRootBridgeIo\r
750 );\r
751 ASSERT_EFI_ERROR (Status);\r
752\r
753 VarSize = sizeof(EFI_PLATFORM_INFO_HOB);\r
754 Status = gRT->GetVariable(\r
755 L"PlatformInfo",\r
756 &gEfiVlv2VariableGuid,\r
757 NULL,\r
758 &VarSize,\r
759 &mPlatformInfo\r
760 );\r
761\r
762 //\r
763 // Initialize Product Board ID variable\r
764 //\r
765 InitMfgAndConfigModeStateVar();\r
766 InitPlatformBootMode();\r
767\r
768 //\r
769 // Install Observable protocol\r
770 //\r
771 InitializeObservableProtocol();\r
772\r
620f2891
TH		 773 Status = SaveSetupRecoveryVar();\r
774 if (EFI_ERROR (Status)) {\r
775 DEBUG ((EFI_D_ERROR, "InitializePlatform() Save SetupRecovery variable failed \n"));\r
776 }\r
3cbfba02
DW		 777\r
778 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
779 Status = gRT->GetVariable(\r
780 NORMAL_SETUP_NAME,\r
781 &gEfiNormalSetupGuid,\r
782 NULL,\r
783 &VarSize,\r
784 &mSystemConfiguration\r
785 );\r
620f2891
TH		 786 if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) {\r
787 //The setup variable is corrupted\r
788 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
789 Status = gRT->GetVariable(\r
790 L"SetupRecovery",\r
791 &gEfiNormalSetupGuid,\r
792 NULL,\r
793 &VarSize,\r
794 &mSystemConfiguration\r
795 );\r
796 ASSERT_EFI_ERROR (Status);\r
797 Status = gRT->SetVariable (\r
798 NORMAL_SETUP_NAME,\r
799 &gEfiNormalSetupGuid,\r
800 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
801 sizeof(SYSTEM_CONFIGURATION),\r
802 &mSystemConfiguration\r
803 ); \r
804 }\r
805 \r
3cbfba02
DW		 806 Status = EfiCreateEventReadyToBootEx (\r
807 TPL_CALLBACK,\r
808 ReadyToBootFunction,\r
809 NULL,\r
810 &mReadyToBootEvent\r
811 );\r
812\r
813 //\r
814 // Create a ReadyToBoot Event to run the PME init process\r
815 //\r
816 Status = EfiCreateEventReadyToBootEx (\r
817 TPL_CALLBACK,\r
818 InitPciDevPME,\r
819 NULL,\r
820 &mReadyToBootEvent\r
821 );\r
822 //\r
fb1a4e36 823 // Create a ReadyToBoot Event to run enable PR0/PR1 and lock down,unlock variable region\r
3cbfba02
DW		 824 //\r
825 if(mSystemConfiguration.SpiRwProtect==1) {\r
826 Status = EfiCreateEventReadyToBootEx (\r
827 TPL_CALLBACK,\r
828 SpiBiosProtectionFunction,\r
829 NULL,\r
830 &mReadyToBootEvent\r
831 );\r
832 }\r
6f2ef18e
TH		 833 //\r
834 // Create a ReadyToBoot Event to run the thermalzone init process\r
835 //\r
836 Status = EfiCreateEventReadyToBootEx (\r
837 TPL_CALLBACK,\r
838 InitThermalZone,\r
839 NULL,\r
840 &mReadyToBootEvent\r
841 ); \r
842 \r
3cbfba02
DW		 843 ReportStatusCodeEx (\r
844 EFI_PROGRESS_CODE,\r
845 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP1,\r
846 0,\r
847 &gEfiCallerIdGuid,\r
848 NULL,\r
849 NULL,\r
850 0\r
851 );\r
852\r
853#if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0\r
854 //\r
855 // Initialize Sensor Info variable\r
856 //\r
857 InitializeSensorInfoVariable();\r
858#endif\r
859 InitPchPlatformPolicy(&mPlatformInfo);\r
860 InitVlvPlatformPolicy();\r
861\r
862 //\r
863 // Add usb policy\r
864 //\r
865 InitPlatformUsbPolicy();\r
866 InitSioPlatformPolicy();\r
867 InitializeClockRouting();\r
868 InitializeSlotInfo();\r
869 InitTcoReset();\r
870\r
871 //\r
872 //Init ExI\r
873 //\r
874 InitExI();\r
875\r
876 ReportStatusCodeEx (\r
877 EFI_PROGRESS_CODE,\r
878 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP2,\r
879 0,\r
880 &gEfiCallerIdGuid,\r
881 NULL,\r
882 NULL,\r
883 0\r
884 );\r
885\r
886 //\r
887 // Install PCI Bus Driver Hook\r
888 //\r
889 PciBusDriverHook();\r
890\r
891 InitItk();\r
892\r
893 ReportStatusCodeEx (\r
894 EFI_PROGRESS_CODE,\r
895 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP3,\r
896 0,\r
897 &gEfiCallerIdGuid,\r
898 NULL,\r
899 NULL,\r
900 0\r
901 );\r
902\r
903\r
904 //\r
905 // Initialize Password States and Callbacks\r
906 //\r
907 PchInitBeforeBoot();\r
908\r
909#if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY\r
910\r
911#endif\r
912\r
913#if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)\r
914 //\r
915 // Re-write Firmware ID if it is changed\r
916 //\r
917 InitFirmwareId();\r
918#endif\r
919\r
920 ReportStatusCodeEx (\r
921 EFI_PROGRESS_CODE,\r
922 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP4,\r
923 0,\r
924 &gEfiCallerIdGuid,\r
925 NULL,\r
926 NULL,\r
927 0\r
928 );\r
929\r
930\r
931 Status = gBS->CreateEventEx (\r
932 EVT_NOTIFY_SIGNAL,\r
933 TPL_NOTIFY,\r
934 EnableAcpiCallback,\r
935 NULL,\r
936 &gEfiEventExitBootServicesGuid,\r
937 &mEfiExitBootServicesEvent\r
938 );\r
939\r
d71c25cf
DW		 940 //\r
941 // Adjust RTC deafult time to be BIOS-built time.\r
942 //\r
943 Status = gBS->CreateEvent (\r
944 EVT_NOTIFY_SIGNAL,\r
945 TPL_CALLBACK,\r
946 AdjustDefaultRtcTimeCallback,\r
947 NULL,\r
948 &RtcEvent\r
949 );\r
950 if (!EFI_ERROR (Status)) {\r
951 Status = gBS->RegisterProtocolNotify (\r
952 &gExitPmAuthProtocolGuid,\r
953 RtcEvent,\r
954 &RtcCallbackReg\r
955 );\r
3cbfba02 956\r
d71c25cf 957 }\r
3cbfba02
DW		 958\r
959 return EFI_SUCCESS;\r
960}\r
961\r
962/**\r
963 Source Or Destination with Length bytes.\r
964\r
965 @param[in] Destination Target memory\r
966 @param[in] Source Source memory\r
967 @param[in] Length Number of bytes\r
968\r
969 @retval None\r
970\r
971**/\r
972VOID\r
973EfiOrMem (\r
974 IN VOID *Destination,\r
975 IN VOID *Source,\r
976 IN UINTN Length\r
977 )\r
978{\r
979 CHAR8 *Destination8;\r
980 CHAR8 *Source8;\r
981\r
982 if (Source < Destination) {\r
983 Destination8 = (CHAR8 *) Destination + Length - 1;\r
984 Source8 = (CHAR8 *) Source + Length - 1;\r
985 while (Length--) {\r
986 *(Destination8--) |= *(Source8--);\r
987 }\r
988 } else {\r
989 Destination8 = (CHAR8 *) Destination;\r
990 Source8 = (CHAR8 *) Source;\r
991 while (Length--) {\r
992 *(Destination8++) |= *(Source8++);\r
993 }\r
994 }\r
995}\r
996\r
997VOID\r
998PchInitBeforeBoot()\r
999{\r
1000 //\r
1001 // Saved SPI Opcode menu to fix EFI variable unable to write after S3 resume.\r
1002 //\r
1003 S3BootScriptSaveMemWrite (\r
1004 EfiBootScriptWidthUint32,\r
1005 (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)),\r
1006 1,\r
1007 (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)));\r
1008\r
1009 S3BootScriptSaveMemWrite (\r
1010 EfiBootScriptWidthUint32,\r
1011 (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)),\r
1012 1,\r
1013 (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)));\r
1014\r
1015 S3BootScriptSaveMemWrite (\r
1016 EfiBootScriptWidthUint16,\r
1017 (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE),\r
1018 1,\r
1019 (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE));\r
1020\r
1021 S3BootScriptSaveMemWrite (\r
1022 EfiBootScriptWidthUint16,\r
1023 (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP),\r
1024 1,\r
1025 (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP));\r
1026\r
1027 //\r
1028 // Saved MTPMC_1 for S3 resume.\r
1029 //\r
1030 S3BootScriptSaveMemWrite (\r
1031 EfiBootScriptWidthUint32,\r
1032 (UINTN)(PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1),\r
1033 1,\r
1034 (VOID *)(UINTN)(PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1));\r
1035 return;\r
1036}\r
1037\r
1038VOID\r
1039EFIAPI\r
1040ReadyToBootFunction (\r
1041 EFI_EVENT Event,\r
1042 VOID *Context\r
1043 )\r
1044{\r
1045 EFI_STATUS Status;\r
1046 EFI_ISA_ACPI_PROTOCOL *IsaAcpi;\r
1047 EFI_ISA_ACPI_DEVICE_ID IsaDevice;\r
1048 UINTN Size;\r
1049 UINT16 State;\r
1050 EFI_TPM_MP_DRIVER_PROTOCOL *TpmMpDriver;\r
1051 EFI_CPU_IO_PROTOCOL *CpuIo;\r
1052 UINT8 Data;\r
1053 UINT8 ReceiveBuffer [64];\r
1054 UINT32 ReceiveBufferSize;\r
1055\r
1056 UINT8 TpmForceClearCommand [] = {0x00, 0xC1,\r
1057 0x00, 0x00, 0x00, 0x0A,\r
1058 0x00, 0x00, 0x00, 0x5D};\r
1059 UINT8 TpmPhysicalPresenceCommand [] = {0x00, 0xC1,\r
1060 0x00, 0x00, 0x00, 0x0C,\r
1061 0x40, 0x00, 0x00, 0x0A,\r
1062 0x00, 0x00};\r
1063 UINT8 TpmPhysicalDisableCommand [] = {0x00, 0xC1,\r
1064 0x00, 0x00, 0x00, 0x0A,\r
1065 0x00, 0x00, 0x00, 0x70};\r
1066 UINT8 TpmPhysicalEnableCommand [] = {0x00, 0xC1,\r
1067 0x00, 0x00, 0x00, 0x0A,\r
1068 0x00, 0x00, 0x00, 0x6F};\r
1069 UINT8 TpmPhysicalSetDeactivatedCommand [] = {0x00, 0xC1,\r
1070 0x00, 0x00, 0x00, 0x0B,\r
1071 0x00, 0x00, 0x00, 0x72,\r
1072 0x00};\r
1073 UINT8 TpmSetOwnerInstallCommand [] = {0x00, 0xC1,\r
1074 0x00, 0x00, 0x00, 0x0B,\r
1075 0x00, 0x00, 0x00, 0x71,\r
1076 0x00};\r
1077\r
1078 Size = sizeof(UINT16);\r
1079 Status = gRT->GetVariable (\r
1080 VAR_EQ_FLOPPY_MODE_DECIMAL_NAME,\r
1081 &gEfiNormalSetupGuid,\r
1082 NULL,\r
1083 &Size,\r
1084 &State\r
1085 );\r
1086\r
1087 //\r
1088 // Disable Floppy Controller if needed\r
1089 //\r
1090 Status = gBS->LocateProtocol (&gEfiIsaAcpiProtocolGuid, NULL, (VOID **) &IsaAcpi);\r
1091 if (!EFI_ERROR(Status) && (State == 0x00)) {\r
1092 IsaDevice.HID = EISA_PNP_ID(0x604);\r
1093 IsaDevice.UID = 0;\r
1094 Status = IsaAcpi->EnableDevice(IsaAcpi, &IsaDevice, FALSE);\r
1095 }\r
1096\r
1097 //\r
1098 // save LAN info to a variable\r
1099 //\r
1100 if (NULL != mPciLanInfo) {\r
1101 gRT->SetVariable (\r
1102 L"PciLanInfo",\r
1103 &gEfiPciLanInfoGuid,\r
1104 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,\r
1105 mPciLanCount * sizeof(PCI_LAN_INFO),\r
1106 mPciLanInfo\r
1107 );\r
1108 }\r
1109\r
1110 if (NULL != mPciLanInfo) {\r
1111 gBS->FreePool (mPciLanInfo);\r
1112 mPciLanInfo = NULL;\r
1113 }\r
1114 \r
1115\r
1116 //\r
1117 // Handle ACPI OS TPM requests here\r
1118 //\r
1119 Status = gBS->LocateProtocol (\r
1120 &gEfiCpuIoProtocolGuid,\r
1121 NULL,\r
1122 (VOID **)&CpuIo\r
1123 );\r
1124 Status = gBS->LocateProtocol (\r
1125 &gEfiTpmMpDriverProtocolGuid,\r
1126 NULL,\r
1127 (VOID **)&TpmMpDriver\r
1128 );\r
1129 if (!EFI_ERROR (Status))\r
1130 {\r
1131 Data = ReadCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST);\r
1132\r
1133 //\r
1134 // Clear pending ACPI TPM request indicator\r
1135 //\r
1136 WriteCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST, 0x00);\r
1137 if (Data != 0)\r
1138 {\r
1139 WriteCmosBank1Byte (CpuIo, ACPI_TPM_LAST_REQUEST, Data);\r
1140\r
1141 //\r
1142 // Assert Physical Presence for these commands\r
1143 //\r
1144 TpmPhysicalPresenceCommand [11] = 0x20;\r
1145 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1146 Status = TpmMpDriver->Transmit (\r
1147 TpmMpDriver, TpmPhysicalPresenceCommand,\r
1148 sizeof (TpmPhysicalPresenceCommand),\r
1149 ReceiveBuffer, &ReceiveBufferSize\r
1150 );\r
1151 //\r
1152 // PF PhysicalPresence = TRUE\r
1153 //\r
1154 TpmPhysicalPresenceCommand [11] = 0x08;\r
1155 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1156 Status = TpmMpDriver->Transmit (\r
1157 TpmMpDriver, TpmPhysicalPresenceCommand,\r
1158 sizeof (TpmPhysicalPresenceCommand),\r
1159 ReceiveBuffer,\r
1160 &ReceiveBufferSize\r
1161 );\r
1162 if (Data == 0x01)\r
1163 {\r
1164 //\r
1165 // TPM_PhysicalEnable\r
1166 //\r
1167 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1168 Status = TpmMpDriver->Transmit (\r
1169 TpmMpDriver, TpmPhysicalEnableCommand,\r
1170 sizeof (TpmPhysicalEnableCommand),\r
1171 ReceiveBuffer, &ReceiveBufferSize\r
1172 );\r
1173 }\r
1174 if (Data == 0x02)\r
1175 {\r
1176 //\r
1177 // TPM_PhysicalDisable\r
1178 //\r
1179 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1180 Status = TpmMpDriver->Transmit (\r
1181 TpmMpDriver, TpmPhysicalDisableCommand,\r
1182 sizeof (TpmPhysicalDisableCommand),\r
1183 ReceiveBuffer,\r
1184 &ReceiveBufferSize\r
1185 );\r
1186 }\r
1187 if (Data == 0x03)\r
1188 {\r
1189 //\r
1190 // TPM_PhysicalSetDeactivated=FALSE\r
1191 //\r
1192 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1193 TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r
1194 Status = TpmMpDriver->Transmit (\r
1195 TpmMpDriver,\r
1196 TpmPhysicalSetDeactivatedCommand,\r
1197 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1198 ReceiveBuffer, &ReceiveBufferSize\r
1199 );\r
1200 gRT->ResetSystem (EfiResetWarm, EFI_SUCCESS, 0, NULL);\r
1201 }\r
1202 if (Data == 0x04)\r
1203 {\r
1204 //\r
1205 // TPM_PhysicalSetDeactivated=TRUE\r
1206 //\r
1207 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1208 TpmPhysicalSetDeactivatedCommand [10] = 0x01;\r
1209 Status = TpmMpDriver->Transmit (\r
1210 TpmMpDriver,\r
1211 TpmPhysicalSetDeactivatedCommand,\r
1212 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1213 ReceiveBuffer,\r
1214 &ReceiveBufferSize\r
1215 );\r
1216 gRT->ResetSystem (\r
1217 EfiResetWarm,\r
1218 EFI_SUCCESS,\r
1219 0,\r
1220 NULL\r
1221 );\r
1222 }\r
1223 if (Data == 0x05)\r
1224 {\r
1225 //\r
1226 // TPM_ForceClear\r
1227 //\r
1228 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1229 Status = TpmMpDriver->Transmit (\r
1230 TpmMpDriver,\r
1231 TpmForceClearCommand,\r
1232 sizeof (TpmForceClearCommand),\r
1233 ReceiveBuffer,\r
1234 &ReceiveBufferSize\r
1235 );\r
1236 gRT->ResetSystem (\r
1237 EfiResetWarm,\r
1238 EFI_SUCCESS,\r
1239 0,\r
1240 NULL\r
1241 );\r
1242 }\r
1243 if (Data == 0x06)\r
1244 {\r
1245 //\r
1246 // TPM_PhysicalEnable\r
1247 //\r
1248 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1249 Status = TpmMpDriver->Transmit (\r
1250 TpmMpDriver,\r
1251 TpmPhysicalEnableCommand,\r
1252 sizeof (TpmPhysicalEnableCommand),\r
1253 ReceiveBuffer,\r
1254 &ReceiveBufferSize\r
1255 );\r
1256 //\r
1257 // TPM_PhysicalSetDeactivated=FALSE\r
1258 //\r
1259 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1260 TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r
1261 Status = TpmMpDriver->Transmit (\r
1262 TpmMpDriver,\r
1263 TpmPhysicalSetDeactivatedCommand,\r
1264 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1265 ReceiveBuffer,\r
1266 &ReceiveBufferSize\r
1267 );\r
1268 gRT->ResetSystem (\r
1269 EfiResetWarm,\r
1270 EFI_SUCCESS,\r
1271 0,\r
1272 NULL\r
1273 );\r
1274 }\r
1275 if (Data == 0x07)\r
1276 {\r
1277 //\r
1278 // TPM_PhysicalSetDeactivated=TRUE\r
1279 //\r
1280 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1281 TpmPhysicalSetDeactivatedCommand [10] = 0x01;\r
1282 Status = TpmMpDriver->Transmit (\r
1283 TpmMpDriver,\r
1284 TpmPhysicalSetDeactivatedCommand,\r
1285 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1286 ReceiveBuffer,\r
1287 &ReceiveBufferSize\r
1288 );\r
1289 //\r
1290 // TPM_PhysicalDisable\r
1291 //\r
1292 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1293 Status = TpmMpDriver->Transmit (\r
1294 TpmMpDriver,\r
1295 TpmPhysicalDisableCommand,\r
1296 sizeof (TpmPhysicalDisableCommand),\r
1297 ReceiveBuffer,\r
1298 &ReceiveBufferSize\r
1299 );\r
1300 gRT->ResetSystem (\r
1301 EfiResetWarm,\r
1302 EFI_SUCCESS,\r
1303 0,\r
1304 NULL\r
1305 );\r
1306 }\r
1307 if (Data == 0x08)\r
1308 {\r
1309 //\r
1310 // TPM_SetOwnerInstall=TRUE\r
1311 //\r
1312 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1313 TpmSetOwnerInstallCommand [10] = 0x01;\r
1314 Status = TpmMpDriver->Transmit (\r
1315 TpmMpDriver,\r
1316 TpmSetOwnerInstallCommand,\r
1317 sizeof (TpmSetOwnerInstallCommand),\r
1318 ReceiveBuffer,\r
1319 &ReceiveBufferSize\r
1320 );\r
1321 }\r
1322 if (Data == 0x09)\r
1323 {\r
1324 //\r
1325 // TPM_SetOwnerInstall=FALSE\r
1326 //\r
1327 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1328 TpmSetOwnerInstallCommand [10] = 0x00;\r
1329 Status = TpmMpDriver->Transmit (\r
1330 TpmMpDriver,\r
1331 TpmSetOwnerInstallCommand,\r
1332 sizeof (TpmSetOwnerInstallCommand),\r
1333 ReceiveBuffer,\r
1334 &ReceiveBufferSize\r
1335 );\r
1336 }\r
1337 if (Data == 0x0A)\r
1338 {\r
1339 //\r
1340 // TPM_PhysicalEnable\r
1341 //\r
1342 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1343 Status = TpmMpDriver->Transmit (\r
1344 TpmMpDriver,\r
1345 TpmPhysicalEnableCommand,\r
1346 sizeof (TpmPhysicalEnableCommand),\r
1347 ReceiveBuffer,\r
1348 &ReceiveBufferSize\r
1349 );\r
1350 //\r
1351 // TPM_PhysicalSetDeactivated=FALSE\r
1352 //\r
1353 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1354 TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r
1355 Status = TpmMpDriver->Transmit (\r
1356 TpmMpDriver,\r
1357 TpmPhysicalSetDeactivatedCommand,\r
1358 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1359 ReceiveBuffer,\r
1360 &ReceiveBufferSize\r
1361 );\r
1362 //\r
1363 // Do TPM_SetOwnerInstall=TRUE on next reboot\r
1364 //\r
1365\r
1366 WriteCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST, 0xF0);\r
1367\r
1368 gRT->ResetSystem (\r
1369 EfiResetWarm,\r
1370 EFI_SUCCESS,\r
1371 0,\r
1372 NULL\r
1373 );\r
1374 }\r
1375 if (Data == 0x0B)\r
1376 {\r
1377 //\r
1378 // TPM_SetOwnerInstall=FALSE\r
1379 //\r
1380 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1381 TpmSetOwnerInstallCommand [10] = 0x00;\r
1382 Status = TpmMpDriver->Transmit (\r
1383 TpmMpDriver,\r
1384 TpmSetOwnerInstallCommand,\r
1385 sizeof (TpmSetOwnerInstallCommand),\r
1386 ReceiveBuffer,\r
1387 &ReceiveBufferSize\r
1388 );\r
1389 //\r
1390 // TPM_PhysicalSetDeactivated=TRUE\r
1391 //\r
1392 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1393 TpmPhysicalSetDeactivatedCommand [10] = 0x01;\r
1394 Status = TpmMpDriver->Transmit (\r
1395 TpmMpDriver,\r
1396 TpmPhysicalSetDeactivatedCommand,\r
1397 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1398 ReceiveBuffer,\r
1399 &ReceiveBufferSize\r
1400 );\r
1401 //\r
1402 // TPM_PhysicalDisable\r
1403 //\r
1404 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1405 Status = TpmMpDriver->Transmit (\r
1406 TpmMpDriver,\r
1407 TpmPhysicalDisableCommand,\r
1408 sizeof (TpmPhysicalDisableCommand),\r
1409 ReceiveBuffer,\r
1410 &ReceiveBufferSize\r
1411 );\r
1412 gRT->ResetSystem (\r
1413 EfiResetWarm,\r
1414 EFI_SUCCESS,\r
1415 0,\r
1416 NULL\r
1417 );\r
1418 }\r
1419 if (Data == 0x0E)\r
1420 {\r
1421 //\r
1422 // TPM_ForceClear\r
1423 //\r
1424 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1425 Status = TpmMpDriver->Transmit (\r
1426 TpmMpDriver,\r
1427 TpmForceClearCommand,\r
1428 sizeof (TpmForceClearCommand),\r
1429 ReceiveBuffer,\r
1430 &ReceiveBufferSize\r
1431 );\r
1432 //\r
1433 // TPM_PhysicalEnable\r
1434 //\r
1435 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1436 Status = TpmMpDriver->Transmit (\r
1437 TpmMpDriver,\r
1438 TpmPhysicalEnableCommand,\r
1439 sizeof (TpmPhysicalEnableCommand),\r
1440 ReceiveBuffer,\r
1441 &ReceiveBufferSize\r
1442 );\r
1443 //\r
1444 // TPM_PhysicalSetDeactivated=FALSE\r
1445 //\r
1446 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1447 TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r
1448 Status = TpmMpDriver->Transmit (\r
1449 TpmMpDriver,\r
1450 TpmPhysicalSetDeactivatedCommand,\r
1451 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1452 ReceiveBuffer,\r
1453 &ReceiveBufferSize\r
1454 );\r
1455 gRT->ResetSystem (\r
1456 EfiResetWarm,\r
1457 EFI_SUCCESS,\r
1458 0,\r
1459 NULL\r
1460 );\r
1461 }\r
1462 if (Data == 0xF0)\r
1463 {\r
1464 //\r
1465 // Second part of ACPI TPM request 0x0A: OEM custom TPM_SetOwnerInstall=TRUE\r
1466 //\r
1467 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1468 TpmSetOwnerInstallCommand [10] = 0x01;\r
1469 Status = TpmMpDriver->Transmit (\r
1470 TpmMpDriver,\r
1471 TpmSetOwnerInstallCommand,\r
1472 sizeof (TpmSetOwnerInstallCommand),\r
1473 ReceiveBuffer,\r
1474 &ReceiveBufferSize\r
1475 );\r
1476 WriteCmosBank1Byte (CpuIo, ACPI_TPM_LAST_REQUEST, 0x0A);\r
1477 }\r
1478 //\r
1479 // Deassert Physical Presence\r
1480 //\r
1481 TpmPhysicalPresenceCommand [11] = 0x10;\r
1482 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1483 Status = TpmMpDriver->Transmit (\r
1484 TpmMpDriver,\r
1485 TpmPhysicalPresenceCommand,\r
1486 sizeof (TpmPhysicalPresenceCommand),\r
1487 ReceiveBuffer,\r
1488 &ReceiveBufferSize\r
1489 );\r
1490 }\r
1491 }\r
1492\r
1493 return;\r
1494}\r
1495\r
1496/**\r
1497\r
1498 Initializes manufacturing and config mode setting.\r
1499\r
1500**/\r
1501VOID\r
1502InitMfgAndConfigModeStateVar()\r
1503{\r
1504 EFI_PLATFORM_SETUP_ID *BootModeBuffer;\r
1505 VOID *HobList;\r
3cbfba02 1506\r
3cbfba02
DW		 1507\r
1508 HobList = GetFirstGuidHob(&gEfiPlatformBootModeGuid);\r
1509 if (HobList != NULL) {\r
1510 BootModeBuffer = GET_GUID_HOB_DATA (HobList);\r
1511\r
1512 //\r
1513 // Check if in Manufacturing mode\r
1514 //\r
1515 if ( !CompareMem (\r
1516 &BootModeBuffer->SetupName,\r
1517 MANUFACTURE_SETUP_NAME,\r
1518 StrSize (MANUFACTURE_SETUP_NAME)\r
1519 ) ) {\r
1520 mMfgMode = TRUE;\r
1521 }\r
1522\r
620f2891
TH		 1523\r
1524\r
3cbfba02
DW		 1525 }\r
1526\r
1527}\r
1528\r
1529/**\r
1530\r
1531 Initializes manufacturing and config mode setting.\r
1532\r
1533**/\r
1534VOID\r
1535InitPlatformBootMode()\r
1536{\r
1537 EFI_PLATFORM_SETUP_ID *BootModeBuffer;\r
1538 VOID *HobList;\r
1539\r
1540 HobList = GetFirstGuidHob(&gEfiPlatformBootModeGuid);\r
1541 if (HobList != NULL) {\r
1542 BootModeBuffer = GET_GUID_HOB_DATA (HobList);\r
1543 mPlatformBootMode = BootModeBuffer->PlatformBootMode;\r
1544 }\r
1545}\r
1546\r
1547/**\r
1548\r
1549 Initializes ITK.\r
1550\r
1551**/\r
1552VOID\r
1553InitItk(\r
1554 )\r
1555{\r
1556 EFI_STATUS Status;\r
1557 UINT16 ItkModBiosState;\r
1558 UINT8 Value;\r
1559 UINTN DataSize;\r
1560 UINT32 Attributes;\r
1561\r
1562 //\r
1563 // Setup local variable according to ITK variable\r
1564 //\r
1565 //\r
1566 // Read ItkBiosModVar to determine if BIOS has been modified by ITK\r
1567 // If ItkBiosModVar = 0 or if variable hasn't been initialized then BIOS has not been modified by ITK modified\r
1568 // Set local variable VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME=0 if BIOS has not been modified by ITK\r
1569 //\r
1570 DataSize = sizeof (Value);\r
1571 Status = gRT->GetVariable (\r
1572 ITK_BIOS_MOD_VAR_NAME,\r
1573 &gItkDataVarGuid,\r
1574 &Attributes,\r
1575 &DataSize,\r
1576 &Value\r
1577 );\r
1578 if (Status == EFI_NOT_FOUND) {\r
1579 //\r
1580 // Variable not found, hasn't been initialized, intialize to 0\r
1581 //\r
1582 Value=0x00;\r
1583 //\r
1584 // Write variable to flash.\r
1585 //\r
1586 gRT->SetVariable (\r
1587 ITK_BIOS_MOD_VAR_NAME,\r
1588 &gItkDataVarGuid,\r
1589 EFI_VARIABLE_RUNTIME_ACCESS |\r
1590 EFI_VARIABLE_NON_VOLATILE |\r
1591 EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
1592 sizeof (Value),\r
1593 &Value\r
1594 );\r
1595\r
1596}\r
1597 if ( (!EFI_ERROR (Status)) || (Status == EFI_NOT_FOUND) ) {\r
1598 if (Value == 0x00) {\r
1599 ItkModBiosState = 0x00;\r
1600 } else {\r
1601 ItkModBiosState = 0x01;\r
1602 }\r
1603 gRT->SetVariable (\r
1604 VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME,\r
1605 &gEfiNormalSetupGuid,\r
1606 EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
1607 2,\r
1608 (void *)&ItkModBiosState\r
1609 );\r
1610 }\r
1611}\r
1612\r
1613#if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)\r
1614\r
1615/**\r
1616\r
1617 Initializes the BIOS FIRMWARE ID from the FIRMWARE_ID build variable.\r
1618\r
1619**/\r
1620STATIC\r
1621VOID\r
1622InitFirmwareId(\r
1623 )\r
1624{\r
1625 EFI_STATUS Status;\r
1626 CHAR16 FirmwareIdNameWithPassword[] = FIRMWARE_ID_NAME_WITH_PASSWORD;\r
1627\r
1628 //\r
1629 // First try writing the variable without a password in case we are\r
1630 // upgrading from a BIOS without password protection on the FirmwareId\r
1631 //\r
1632 Status = gRT->SetVariable(\r
1633 (CHAR16 *)&gFirmwareIdName,\r
1634 &gFirmwareIdGuid,\r
1635 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS |\r
1636 EFI_VARIABLE_RUNTIME_ACCESS,\r
1637 sizeof( FIRMWARE_ID ) - 1,\r
1638 FIRMWARE_ID\r
1639 );\r
1640\r
1641 if (Status == EFI_INVALID_PARAMETER) {\r
1642\r
1643 //\r
1644 // Since setting the firmware id without the password failed,\r
1645 // a password must be required.\r
1646 //\r
1647 Status = gRT->SetVariable(\r
1648 (CHAR16 *)&FirmwareIdNameWithPassword,\r
1649 &gFirmwareIdGuid,\r
1650 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS |\r
1651 EFI_VARIABLE_RUNTIME_ACCESS,\r
1652 sizeof( FIRMWARE_ID ) - 1,\r
1653 FIRMWARE_ID\r
1654 );\r
1655 }\r
1656}\r
1657#endif\r
1658\r
1659VOID\r
1660UpdateDVMTSetup(\r
1661 )\r
1662{\r
1663 //\r
1664 // Workaround to support IIA bug.\r
1665 // IIA request to change option value to 4, 5 and 7 relatively\r
1666 // instead of 1, 2, and 3 which follow Lakeport Specs.\r
1667 // Check option value, temporary hardcode GraphicsDriverMemorySize\r
1668 // Option value to fulfill IIA requirment. So that user no need to\r
1669 // load default and update setupvariable after update BIOS.\r
1670 // Option value hardcoded as: 1 to 4, 2 to 5, 3 to 7.\r
1671 // *This is for broadwater and above product only.\r
1672 //\r
1673\r
1674 SYSTEM_CONFIGURATION SystemConfiguration;\r
1675 UINTN VarSize;\r
1676 EFI_STATUS Status;\r
1677\r
1678 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
1679 Status = gRT->GetVariable(\r
1680 NORMAL_SETUP_NAME,\r
1681 &gEfiNormalSetupGuid,\r
1682 NULL,\r
1683 &VarSize,\r
1684 &SystemConfiguration\r
1685 );\r
1686\r
620f2891
TH		 1687 if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) {\r
1688 //The setup variable is corrupted\r
1689 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
1690 Status = gRT->GetVariable(\r
1691 L"SetupRecovery",\r
1692 &gEfiNormalSetupGuid,\r
1693 NULL,\r
1694 &VarSize,\r
1695 &SystemConfiguration\r
1696 );\r
1697 ASSERT_EFI_ERROR (Status);\r
1698 }\r
1699\r
3cbfba02
DW		 1700 if((SystemConfiguration.GraphicsDriverMemorySize < 4) && !EFI_ERROR(Status) ) {\r
1701 switch (SystemConfiguration.GraphicsDriverMemorySize){\r
1702 case 1:\r
1703 SystemConfiguration.GraphicsDriverMemorySize = 4;\r
1704 break;\r
1705 case 2:\r
1706 SystemConfiguration.GraphicsDriverMemorySize = 5;\r
1707 break;\r
1708 case 3:\r
1709 SystemConfiguration.GraphicsDriverMemorySize = 7;\r
1710 break;\r
1711 default:\r
1712 break;\r
1713 }\r
1714\r
1715 Status = gRT->SetVariable (\r
1716 NORMAL_SETUP_NAME,\r
1717 &gEfiNormalSetupGuid,\r
1718 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
1719 sizeof(SYSTEM_CONFIGURATION),\r
1720 &SystemConfiguration\r
1721 );\r
1722 }\r
1723}\r
1724\r
1725VOID\r
1726InitPlatformUsbPolicy (\r
1727 VOID\r
1728 )\r
1729\r
1730{\r
1731 EFI_HANDLE Handle;\r
1732 EFI_STATUS Status;\r
1733\r
1734 Handle = NULL;\r
1735\r
1736 mUsbPolicyData.Version = (UINT8)USB_POLICY_PROTOCOL_REVISION_2;\r
1737 mUsbPolicyData.UsbMassStorageEmulationType = mSystemConfiguration.UsbBIOSINT13DeviceEmulation;\r
1738 if(mUsbPolicyData.UsbMassStorageEmulationType == 3) {\r
1739 mUsbPolicyData.UsbEmulationSize = mSystemConfiguration.UsbBIOSINT13DeviceEmulationSize;\r
1740 } else {\r
1741 mUsbPolicyData.UsbEmulationSize = 0;\r
1742 }\r
1743 mUsbPolicyData.UsbZipEmulationType = mSystemConfiguration.UsbZipEmulation;\r
1744 mUsbPolicyData.UsbOperationMode = HIGH_SPEED;\r
1745\r
1746 //\r
1747 // Some chipset need Period smi, 0 = LEGACY_PERIOD_UN_SUPP\r
1748 //\r
1749 mUsbPolicyData.USBPeriodSupport = LEGACY_PERIOD_UN_SUPP;\r
1750\r
1751 //\r
1752 // Some platform need legacyfree, 0 = LEGACY_FREE_UN_SUPP\r
1753 //\r
1754 mUsbPolicyData.LegacyFreeSupport = LEGACY_FREE_UN_SUPP;\r
1755\r
1756 //\r
1757 // Set Code base , TIANO_CODE_BASE =0x01, ICBD =0x00\r
1758 //\r
1759 mUsbPolicyData.CodeBase = (UINT8)ICBD_CODE_BASE;\r
1760\r
1761 //\r
1762 // Some chispet 's LpcAcpibase are diffrent,set by platform or chipset,\r
1763 // default is Ich acpibase =0x040. acpitimerreg=0x08.\r
1764 mUsbPolicyData.LpcAcpiBase = 0x40;\r
1765 mUsbPolicyData.AcpiTimerReg = 0x08;\r
1766\r
1767 //\r
1768 // Set for reduce usb post time\r
1769 //\r
1770 mUsbPolicyData.UsbTimeTue = 0x00;\r
1771 mUsbPolicyData.InternelHubExist = 0x00; //TigerPoint doesn't have RMH\r
1772 mUsbPolicyData.EnumWaitPortStableStall = 100;\r
1773\r
1774\r
1775 Status = gBS->InstallProtocolInterface (\r
1776 &Handle,\r
1777 &gUsbPolicyGuid,\r
1778 EFI_NATIVE_INTERFACE,\r
1779 &mUsbPolicyData\r
1780 );\r
1781 ASSERT_EFI_ERROR(Status);\r
1782\r
1783}\r
1784\r
1785UINT8\r
1786ReadCmosBank1Byte (\r
1787 IN EFI_CPU_IO_PROTOCOL *CpuIo,\r
1788 IN UINT8 Index\r
1789 )\r
1790{\r
1791 UINT8 Data;\r
1792\r
1793 CpuIo->Io.Write (CpuIo, EfiCpuIoWidthUint8, 0x72, 1, &Index);\r
1794 CpuIo->Io.Read (CpuIo, EfiCpuIoWidthUint8, 0x73, 1, &Data);\r
1795 return Data;\r
1796}\r
1797\r
1798VOID\r
1799WriteCmosBank1Byte (\r
1800 IN EFI_CPU_IO_PROTOCOL *CpuIo,\r
1801 IN UINT8 Index,\r
1802 IN UINT8 Data\r
1803 )\r
1804{\r
1805 CpuIo->Io.Write (\r
1806 CpuIo,\r
1807 EfiCpuIoWidthUint8,\r
1808 0x72,\r
1809 1,\r
1810 &Index\r
1811 );\r
1812 CpuIo->Io.Write (\r
1813 CpuIo,\r
1814 EfiCpuIoWidthUint8,\r
1815 0x73,\r
1816 1,\r
1817 &Data\r
1818 );\r
1819}\r
1820\r
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