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1/** @file\r
2\r
3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r
4 \r\r
5 This program and the accompanying materials are licensed and made available under\r\r
6 the terms and conditions of the BSD License that accompanies this distribution. \r\r
7 The full text of the license may be found at \r\r
8 http://opensource.org/licenses/bsd-license.php. \r\r
9 \r\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r
12 \r\r
13\r
14Module Name:\r
15\r
16 PlatformInfoInit.c\r
17\r
18Abstract:\r
19 Platform Info Driver.\r
20\r
21--*/\r
22\r
23#include "PlatformEarlyInit.h"\r
24\r
25#define LEN_64M 0x4000000\r
26\r
27//\r
28// Default PCI32 resource size\r
29//\r
30#define RES_MEM32_MIN_LEN 0x38000000\r
31\r
32#define RES_IO_BASE 0x0D00\r
33#define RES_IO_LIMIT 0xFFFF\r
34\r
35#define MemoryCeilingVariable L"MemCeil."\r
36\r
37EFI_STATUS\r
38CheckOsSelection (\r
39 IN CONST EFI_PEI_SERVICES **PeiServices,\r
40 IN SYSTEM_CONFIGURATION *SystemConfiguration\r
41 )\r
42{\r
43 EFI_STATUS Status;\r
44 EFI_PEI_READ_ONLY_VARIABLE2_PPI *Variable;\r
45 UINTN VariableSize;\r
46 EFI_OS_SELECTION_HOB *OsSelectionHob;\r
47 UINT8 OsSelection;\r
48 UINT8 *LpssDataHobPtr;\r
49 UINT8 *LpssDataVarPtr;\r
50 UINTN i;\r
51\r
52 Status = (*PeiServices)->LocatePpi (\r
53 PeiServices,\r
54 &gEfiPeiReadOnlyVariable2PpiGuid,\r
55 0,\r
56 NULL,\r
57 (void **)&Variable\r
58 );\r
59 if (!EFI_ERROR(Status)) {\r
60 VariableSize = sizeof (OsSelection);\r
61 Status = Variable->GetVariable (\r
62 Variable,\r
63 L"OsSelection",\r
64 &gOsSelectionVariableGuid,\r
65 NULL,\r
66 &VariableSize,\r
67 &OsSelection\r
68 );\r
69\r
70 if (!EFI_ERROR(Status) && (SystemConfiguration->ReservedO != OsSelection)) {\r
71 //\r
72 // Build HOB for OsSelection\r
73 //\r
74 OsSelectionHob = BuildGuidHob (&gOsSelectionVariableGuid, sizeof (EFI_OS_SELECTION_HOB));\r
75 ASSERT (OsSelectionHob != NULL);\r
76\r
77 OsSelectionHob->OsSelectionChanged = TRUE;\r
78 OsSelectionHob->OsSelection = OsSelection;\r
79 SystemConfiguration->ReservedO = OsSelectionHob->OsSelection;\r
80\r
81 //\r
82 // Load LPSS and SCC defalut configurations\r
83 //\r
84 OsSelectionHob->LpssData.LpsseMMCEnabled = FALSE;\r
85 OsSelectionHob->LpssData.LpssSdioEnabled = TRUE;\r
86 OsSelectionHob->LpssData.LpssSdcardEnabled = TRUE;\r
87 OsSelectionHob->LpssData.LpssSdCardSDR25Enabled = FALSE;\r
88 OsSelectionHob->LpssData.LpssSdCardDDR50Enabled = TRUE;\r
89 OsSelectionHob->LpssData.LpssMipiHsi = FALSE;\r
90 OsSelectionHob->LpssData.LpsseMMC45Enabled = TRUE;\r
91 OsSelectionHob->LpssData.LpsseMMC45DDR50Enabled = TRUE;\r
92 OsSelectionHob->LpssData.LpsseMMC45HS200Enabled = FALSE;\r
93 OsSelectionHob->LpssData.LpsseMMC45RetuneTimerValue = 8;\r
94 OsSelectionHob->LpssData.eMMCBootMode = 1; // Auto Detect\r
95\r
96\r
97 SystemConfiguration->Lpe = OsSelectionHob->Lpe;\r
98 SystemConfiguration->PchAzalia = SystemConfiguration->PchAzalia;\r
99 LpssDataHobPtr = &OsSelectionHob->LpssData.LpssPciModeEnabled;\r
100 LpssDataVarPtr = &SystemConfiguration->LpssPciModeEnabled;\r
101\r
102 for (i = 0; i < sizeof(EFI_PLATFORM_LPSS_DATA); i++) {\r
103 *LpssDataVarPtr = *LpssDataHobPtr;\r
104 LpssDataVarPtr++;\r
105 LpssDataHobPtr++;\r
106 }\r
107 }\r
108 }\r
109\r
110 return EFI_SUCCESS;\r
111}\r
112\r
113\r
114EFI_STATUS\r
115PlatformInfoUpdate (\r
116 IN CONST EFI_PEI_SERVICES **PeiServices,\r
117 IN OUT EFI_PLATFORM_INFO_HOB *PlatformInfoHob,\r
118 IN SYSTEM_CONFIGURATION *SystemConfiguration\r
119 )\r
120{\r
121 EFI_STATUS Status;\r
122 EFI_PEI_READ_ONLY_VARIABLE2_PPI *Variable;\r
123 UINTN VariableSize;\r
124 UINT32 MemoryCeiling;\r
125\r
126 //\r
127 // Checking PCI32 resource from previous boot to determine the memory ceiling\r
128 //\r
129 Status = (*PeiServices)->LocatePpi (\r
130 PeiServices,\r
131 &gEfiPeiReadOnlyVariable2PpiGuid,\r
132 0,\r
133 NULL,\r
134 (void **)&Variable\r
135 );\r
136 if (!EFI_ERROR(Status)) {\r
137 //\r
138 // Get the memory ceiling\r
139 //\r
140 VariableSize = sizeof(MemoryCeiling);\r
141 Status = Variable->GetVariable (\r
142 Variable,\r
143 MemoryCeilingVariable,\r
144 &gEfiGlobalVariableGuid,\r
145 NULL,\r
146 &VariableSize,\r
147 &MemoryCeiling\r
148 );\r
149 if(!EFI_ERROR(Status)) {\r
150 //\r
151 // Set the new PCI32 resource Base if the variable available\r
152 //\r
153 PlatformInfoHob->PciData.PciResourceMem32Base = MemoryCeiling;\r
154 PlatformInfoHob->MemData.MemMaxTolm = MemoryCeiling;\r
155 PlatformInfoHob->MemData.MemTolm = MemoryCeiling;\r
156\r
157 //\r
158 // Platform PCI MMIO Size in unit of 1MB\r
159 //\r
160 PlatformInfoHob->MemData.MmioSize = 0x1000 - (UINT16)(PlatformInfoHob->MemData.MemMaxTolm >> 20);\r
161 }\r
162 }\r
163\r
164 return EFI_SUCCESS;\r
165}\r
166\r
167/**\r
168 Initialize the platform related info hob according to the\r
169 pre-determine value or setup option\r
170\r
171 @retval EFI_SUCCESS Memory initialization completed successfully.\r
172 @retval Others All other error conditions encountered result in an ASSERT.\r
173**/\r
174EFI_STATUS\r
175InitializePlatform (\r
176 IN CONST EFI_PEI_SERVICES **PeiServices,\r
177 IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob,\r
178 IN SYSTEM_CONFIGURATION *SystemConfiguration\r
179)\r
180{\r
181//\r
182// -- cchew10 need to update here.\r
183//\r
184 return EFI_SUCCESS;\r
185}\r
186\r