Vlv2TbltDevicePkg: Fix build issues in DSC/FDF
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkg.fdf
CommitLineData
5e752084 1#/** @file\r
2# FDF file of Platform.\r
3#\r
54024039 4# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
5e752084 5#\r
6# This program and the accompanying materials are licensed and made available under\r
7# the terms and conditions of the BSD License that accompanies this distribution.\r
8# The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php.\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
14#\r
15#**/\r
16\r
17[Defines]\r
18DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.\r
19DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.\r
20DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.\r
21DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.\r
22DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000\r
23DEFINE FLASH_AREA_SIZE = 0x00800000\r
24\r
25DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000\r
26DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000\r
27DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000\r
28\r
988715a3 29DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000\r
5e752084 30DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000\r
31\r
988715a3 32DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000\r
5e752084 33DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000\r
34\r
35\r
988715a3 36DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000\r
5e752084 37DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000\r
38\r
39!if $(MINNOW2_FSP_BUILD) == TRUE\r
988715a3 40DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000\r
5e752084 41DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000\r
988715a3 42DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000\r
5e752084 43\r
988715a3 44DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000\r
5e752084 45DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000\r
988715a3 46DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000\r
5e752084 47\r
48!endif\r
49\r
988715a3 50DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000\r
51DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00210000\r
5e752084 52\r
988715a3 53DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00320000\r
54DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00070000\r
5e752084 55\r
988715a3 56DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000\r
57DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000\r
5e752084 58\r
59################################################################################\r
60#\r
61# FD Section\r
62# The [FD] Section is made up of the definition statements and a\r
63# description of what goes into the Flash Device Image. Each FD section\r
64# defines one flash "device" image. A flash device image may be one of\r
65# the following: Removable media bootable image (like a boot floppy\r
66# image,) an Option ROM image (that would be "flashed" into an add-in\r
67# card,) a System "Flash" image (that would be burned into a system's\r
68# flash) or an Update ("Capsule") image that will be used to update and\r
69# existing system flash.\r
70#\r
71################################################################################\r
72[FD.Vlv]\r
73BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.\r
74Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.\r
75ErasePolarity = 1\r
76BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.\r
77NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.\r
78\r
79#\r
80#Flash location override based on actual flash map\r
81#\r
82SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)\r
83SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)\r
84\r
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85SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60\r
86SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60\r
87\r
5e752084 88!if $(MINNOW2_FSP_BUILD) == TRUE\r
89# put below PCD value setting into dsc file\r
90#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)\r
91#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)\r
92#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60\r
93#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)\r
94#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)\r
95#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)\r
96#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)\r
97\r
98!endif\r
99################################################################################\r
100#\r
101# Following are lists of FD Region layout which correspond to the locations of different\r
102# images within the flash device.\r
103#\r
104# Regions must be defined in ascending order and may not overlap.\r
105#\r
106# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
107# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
108# "0x" characters. Like:\r
109# Offset|Size\r
110# PcdOffsetCName|PcdSizeCName\r
111# RegionType <FV, DATA, or FILE>\r
112# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000\r
113#\r
114################################################################################\r
115 #\r
116 # CPU Microcodes\r
117 #\r
118\r
119$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)\r
120gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize\r
121FV = MICROCODE_FV\r
122$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)\r
123gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
124#NV_VARIABLE_STORE\r
125DATA = {\r
126 ## This is the EFI_FIRMWARE_VOLUME_HEADER\r
127 # ZeroVector []\r
128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
129 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
130 # FileSystemGuid: gEfiSystemNvDataFvGuid =\r
131 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}\r
132 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,\r
133 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,\r
134 # FvLength: 0x80000\r
135 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,\r
136 #Signature "_FVH" #Attributes\r
137 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,\r
138 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision\r
139 0x48, 0x00, 0x2A, 0x09, 0x00, 0x00, 0x00, 0x02,\r
140 #Blockmap[0]: 7 Blocks * 0x10000 Bytes / Block\r
141 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,\r
142 #Blockmap[1]: End\r
143 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
144 ## This is the VARIABLE_STORE_HEADER\r
145!if $(SECURE_BOOT_ENABLE) == TRUE\r
146 #Signature: gEfiAuthenticatedVariableGuid =\r
147 # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}\r
148 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,\r
149 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,\r
150!else\r
151 #Signature: gEfiVariableGuid =\r
152 # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}\r
153 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,\r
154 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,\r
155!endif\r
156 #Size: 0x3E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x03DFB8\r
157 # This can speed up the Variable Dispatch a bit.\r
158 0xB8, 0xDF, 0x03, 0x00,\r
159 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32\r
160 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
161}\r
162\r
163\r
164$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)\r
165gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
166#NV_FTW_WORKING\r
167DATA = {\r
168 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =\r
169 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}\r
170 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,\r
171 0xA0, 0xCE, 0x65, 0x0, 0xFD, 0x9F, 0x1B, 0x95,\r
172\r
173 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved\r
174 0xE2, 0x33, 0xF2, 0x3, 0xFE, 0xFF, 0xFF, 0xFF,\r
175 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0\r
176 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
177}\r
178\r
179$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)\r
180gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
181\r
182!if $(MINNOW2_FSP_BUILD) == TRUE\r
183\r
184 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)\r
185 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize\r
186 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin\r
187\r
188\r
189 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)\r
190 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin\r
191\r
192!endif\r
193\r
194 #\r
195 # Main Block\r
196 #\r
197$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)\r
198gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize\r
199FV = FVMAIN_COMPACT\r
200\r
201 #\r
202 # FV Recovery#2\r
203 #\r
204$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)\r
205gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size\r
206FV = FVRECOVERY2\r
207\r
208 #\r
209 # FV Recovery\r
210 #\r
211$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)\r
212gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize\r
213FV = FVRECOVERY\r
214\r
215################################################################################\r
216#\r
217# FV Section\r
218#\r
219# [FV] section is used to define what components or modules are placed within a flash\r
220# device file. This section also defines order the components and modules are positioned\r
221# within the image. The [FV] section consists of define statements, set statements and\r
222# module statements.\r
223#\r
224################################################################################\r
225[FV.MICROCODE_FV]\r
226BlockSize = $(FLASH_BLOCK_SIZE)\r
227FvAlignment = 16\r
228ERASE_POLARITY = 1\r
229MEMORY_MAPPED = TRUE\r
230STICKY_WRITE = TRUE\r
231LOCK_CAP = TRUE\r
232LOCK_STATUS = FALSE\r
233WRITE_DISABLED_CAP = TRUE\r
234WRITE_ENABLED_CAP = TRUE\r
235WRITE_STATUS = TRUE\r
236WRITE_LOCK_CAP = TRUE\r
237WRITE_LOCK_STATUS = TRUE\r
238READ_DISABLED_CAP = TRUE\r
239READ_ENABLED_CAP = TRUE\r
240READ_STATUS = TRUE\r
241READ_LOCK_CAP = TRUE\r
242READ_LOCK_STATUS = TRUE\r
243\r
244FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {\r
245 $(OUTPUT_DIRECTORY)\$(TARGET)_$(TOOL_CHAIN_TAG)\$(DXE_ARCHITECTURE)\MicrocodeUpdates.bin\r
246}\r
247\r
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248!if $(RECOVERY_ENABLE)\r
249[FV.FVRECOVERY_COMPONENTS]\r
250FvAlignment = 16 #FV alignment and FV attributes setting.\r
251ERASE_POLARITY = 1\r
252MEMORY_MAPPED = TRUE\r
253STICKY_WRITE = TRUE\r
254LOCK_CAP = TRUE\r
255LOCK_STATUS = TRUE\r
256WRITE_DISABLED_CAP = TRUE\r
257WRITE_ENABLED_CAP = TRUE\r
258WRITE_STATUS = TRUE\r
259WRITE_LOCK_CAP = TRUE\r
260WRITE_LOCK_STATUS = TRUE\r
261READ_DISABLED_CAP = TRUE\r
262READ_ENABLED_CAP = TRUE\r
263READ_STATUS = TRUE\r
264READ_LOCK_CAP = TRUE\r
265READ_LOCK_STATUS = TRUE\r
266\r
267INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf\r
268INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf\r
269INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf\r
270INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf\r
271INF FatPkg/FatPei/FatPei.inf\r
272INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf\r
273INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf\r
274!endif\r
275\r
5e752084 276################################################################################\r
277#\r
278# FV Section\r
279#\r
280# [FV] section is used to define what components or modules are placed within a flash\r
281# device file. This section also defines order the components and modules are positioned\r
282# within the image. The [FV] section consists of define statements, set statements and\r
283# module statements.\r
284#\r
285################################################################################\r
286[FV.FVRECOVERY2]\r
287BlockSize = $(FLASH_BLOCK_SIZE)\r
288FvAlignment = 16 #FV alignment and FV attributes setting.\r
289ERASE_POLARITY = 1\r
290MEMORY_MAPPED = TRUE\r
291STICKY_WRITE = TRUE\r
292LOCK_CAP = TRUE\r
293LOCK_STATUS = TRUE\r
294WRITE_DISABLED_CAP = TRUE\r
295WRITE_ENABLED_CAP = TRUE\r
296WRITE_STATUS = TRUE\r
297WRITE_LOCK_CAP = TRUE\r
298WRITE_LOCK_STATUS = TRUE\r
299READ_DISABLED_CAP = TRUE\r
300READ_ENABLED_CAP = TRUE\r
301READ_STATUS = TRUE\r
302READ_LOCK_CAP = TRUE\r
303READ_LOCK_STATUS = TRUE\r
304FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092\r
305\r
306\r
307\r
308INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf\r
309\r
310!if $(MINNOW2_FSP_BUILD) == FALSE\r
311INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf\r
312INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf\r
313INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf\r
314INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf\r
315INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf\r
316INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf\r
317INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
318INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf\r
319INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf\r
320!endif\r
321\r
98a88a76 322# INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf\r
5e752084 323!if $(TPM_ENABLED) == TRUE\r
2e886a2e 324INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf\r
5e752084 325INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
326INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf\r
327!endif\r
328!if $(FTPM_ENABLE) == TRUE\r
2e886a2e 329INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config\r
5e752084 330!endif\r
331INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
332\r
333!if $(ACPI50_ENABLE) == TRUE\r
334 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf\r
335!endif\r
336!if $(PERFORMANCE_ENABLE) == TRUE\r
337INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
338!endif\r
339\r
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340!if $(RECOVERY_ENABLE)\r
341FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {\r
342 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}\r
343 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID\r
344 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS\r
345 }\r
346}\r
347!endif\r
348\r
5e752084 349[FV.FVRECOVERY]\r
350BlockSize = $(FLASH_BLOCK_SIZE)\r
351FvAlignment = 16 #FV alignment and FV attributes setting.\r
352ERASE_POLARITY = 1\r
353MEMORY_MAPPED = TRUE\r
354STICKY_WRITE = TRUE\r
355LOCK_CAP = TRUE\r
356LOCK_STATUS = TRUE\r
357WRITE_DISABLED_CAP = TRUE\r
358WRITE_ENABLED_CAP = TRUE\r
359WRITE_STATUS = TRUE\r
360WRITE_LOCK_CAP = TRUE\r
361WRITE_LOCK_STATUS = TRUE\r
362READ_DISABLED_CAP = TRUE\r
363READ_ENABLED_CAP = TRUE\r
364READ_STATUS = TRUE\r
365READ_LOCK_CAP = TRUE\r
366READ_LOCK_STATUS = TRUE\r
367FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091\r
368\r
369\r
370!if $(MINNOW2_FSP_BUILD) == TRUE\r
371INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf\r
372!else\r
373INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf\r
374!endif\r
375\r
376INF MdeModulePkg/Core/Pei/PeiMain.inf\r
377!if $(MINNOW2_FSP_BUILD) == TRUE\r
378INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf\r
379INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf\r
380!endif\r
381INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf\r
382INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
383INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
384\r
385INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf\r
386\r
387!if $(MINNOW2_FSP_BUILD) == FALSE\r
388INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf\r
389!endif\r
390\r
391!if $(FTPM_ENABLE) == TRUE\r
392INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf\r
393!endif\r
394\r
395!if $(SOURCE_DEBUG_ENABLE) == TRUE\r
396 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf\r
397!endif\r
398\r
399\r
400!if $(CAPSULE_ENABLE) == TRUE\r
401INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r
402!if $(DXE_ARCHITECTURE) == "X64"\r
403INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf\r
404!endif\r
405!endif\r
406\r
407!if $(MINNOW2_FSP_BUILD) == FALSE\r
408!if $(PCIESC_ENABLE) == TRUE\r
409INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf\r
410!endif\r
411INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf\r
412!endif\r
413\r
414INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
415\r
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416!if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)\r
417 # FMP image decriptor\r
418INF RuleOverride = FMP_IMAGE_DESC Vlv2TbltDevicePkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf\r
419!endif\r
420\r
5e752084 421[FV.FVMAIN]\r
422BlockSize = $(FLASH_BLOCK_SIZE)\r
423FvAlignment = 16\r
424ERASE_POLARITY = 1\r
425MEMORY_MAPPED = TRUE\r
426STICKY_WRITE = TRUE\r
427LOCK_CAP = TRUE\r
428LOCK_STATUS = TRUE\r
429WRITE_DISABLED_CAP = TRUE\r
430WRITE_ENABLED_CAP = TRUE\r
431WRITE_STATUS = TRUE\r
432WRITE_LOCK_CAP = TRUE\r
433WRITE_LOCK_STATUS = TRUE\r
434READ_DISABLED_CAP = TRUE\r
435READ_ENABLED_CAP = TRUE\r
436READ_STATUS = TRUE\r
437READ_LOCK_CAP = TRUE\r
438READ_LOCK_STATUS = TRUE\r
439FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5\r
440\r
441APRIORI DXE {\r
442 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
443 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
444 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
445 }\r
446\r
447FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {\r
448 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin\r
449 }\r
450\r
451 #\r
452 # EDK II Related Platform codes\r
453 #\r
454\r
455 !if $(MINNOW2_FSP_BUILD) == TRUE\r
456 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf\r
457 !endif\r
458\r
459INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
460INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
461!if $(ACPI50_ENABLE) == TRUE\r
462INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf\r
463INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf\r
464!endif\r
465\r
466\r
467INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf\r
468INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
469INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
470INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
471INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r
472INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
473INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf\r
474INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf\r
475INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
98a88a76 476INF USE=X64 MdeModulePkg/Logo/Logo.inf\r
5e752084 477INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
478INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
479INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
480INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
481\r
482INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r
483INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r
484INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf\r
485INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r
486INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf\r
487!if $(SECURE_BOOT_ENABLE)\r
488INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
489!endif\r
490\r
491INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
492\r
493INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
494INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
495INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
496INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf\r
497\r
498\r
499INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf\r
500\r
501!if $(DATAHUB_ENABLE) == TRUE\r
502INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf\r
503!endif\r
504INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf\r
505INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
506\r
507INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf\r
508\r
509 #\r
510 # EDK II Related Silicon codes\r
511 #\r
512INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf\r
513\r
514!if $(USE_HPET_TIMER) == TRUE\r
515INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
516!else\r
517INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf\r
518!endif\r
519INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf\r
520\r
521INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf\r
522\r
523INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf\r
524INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf\r
525\r
526!if $(MINNOW2_FSP_BUILD) == FALSE\r
527INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf\r
528!endif\r
529INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf\r
530!if $(PCIESC_ENABLE) == TRUE\r
531INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf\r
532!endif\r
533\r
534INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf\r
535INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf\r
536INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf\r
537INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf\r
538INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf\r
539!if $(MINNOW2_FSP_BUILD) == FALSE\r
540INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf\r
541!else\r
542INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf\r
543INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf\r
544!endif\r
545!if $(MINNOW2_FSP_BUILD) == FALSE\r
546 !if $(SEC_ENABLE) == TRUE\r
547 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf\r
548 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf\r
549 !endif\r
550!endif\r
551!if $(TPM_ENABLED) == TRUE\r
552INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf\r
553INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r
554INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r
555!endif\r
556!if $(FTPM_ENABLE) == TRUE\r
557INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf\r
558INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf\r
559INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
2e886a2e 560INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf\r
5e752084 561INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf\r
562!endif\r
563\r
564#\r
565# EDK II Related Platform codes\r
566#\r
567INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf\r
568INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf\r
569INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf\r
570INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf\r
571INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf\r
572INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf\r
573INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf\r
574INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf\r
575INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf\r
576!if $(GOP_DRIVER_ENABLE) == TRUE\r
577 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf\r
578 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {\r
579 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}\r
580 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi\r
581 SECTION UI = "IntelGopDriver"\r
582}\r
583!endif\r
584\r
585INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf\r
586 #\r
587 # SMM\r
588 #\r
589INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
590INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
f2ae1ef7 591INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
5e752084 592\r
593INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
594INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
f2ae1ef7 595INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
5e752084 596INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf\r
97e862bb
MK
597\r
598#\r
599# Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell\r
600#\r
601#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf\r
602#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf\r
603\r
5e752084 604 #\r
605 # ACPI\r
606 #\r
607INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
608INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf\r
609INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf\r
610INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf\r
611\r
612INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf\r
613\r
614INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf\r
615\r
98a88a76
KM
616INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf\r
617\r
5e752084 618 #\r
619 # PCI\r
620 #\r
621INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
622\r
623INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf\r
624\r
625\r
626#\r
627# ISA\r
628#\r
629INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf\r
630INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
631INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf\r
632!if $(SOURCE_DEBUG_ENABLE) != TRUE\r
633INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
634!endif\r
635#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf\r
636#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
637\r
638#\r
639# SDIO\r
640#\r
98a88a76
KM
641#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf\r
642#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf\r
5e752084 643#\r
644# IDE/SCSI/AHCI\r
645#\r
646INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
647\r
648INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
649\r
650INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
651!if $(SATA_ENABLE) == TRUE\r
652INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf\r
653#\r
654\r
655#\r
656INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r
657INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r
658!if $(SCSI_ENABLE) == TRUE\r
659INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
660INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
661!endif\r
662#\r
663!endif\r
664# Console\r
665#\r
666INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
667INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
668INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
669INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf\r
670INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
671INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
672INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
673INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
674 #\r
675 # USB\r
676 #\r
677!if $(USB_ENABLE) == TRUE\r
678INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
679INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
680INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
681INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
682INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r
683INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
684INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r
685!endif\r
686\r
687 #\r
688 # ECP\r
689 #\r
690INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf\r
691INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf\r
692INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf\r
693INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf\r
694INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf\r
695INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf\r
696 #\r
697 # SMBIOS\r
698 #\r
699INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
700INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf\r
701\r
702INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf\r
703\r
704 #\r
705 # Legacy Modules\r
706 #\r
707INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
708\r
709#\r
710# FAT file system\r
711#\r
712INF FatPkg/EnhancedFatDxe/Fat.inf\r
713\r
714#\r
715# UEFI Shell\r
716#\r
717FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {\r
718# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi\r
719 SECTION PE32 = ShellBinPkg/UefiShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi\r
720 }\r
721\r
7a0e4f8e
RN
722#\r
723# dp command\r
724#\r
725!if $(PERFORMANCE_ENABLE) == TRUE\r
726INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf\r
727!endif\r
5e752084 728\r
729!if $(GOP_DRIVER_ENABLE) == TRUE\r
730FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {\r
731 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin\r
732 SECTION UI = "IntelGopVbt"\r
733}\r
734!endif\r
735\r
736#\r
737# Network Modules\r
738#\r
739!if $(NETWORK_ENABLE) == TRUE\r
740 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {\r
741 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi\r
742 SECTION UI = "UNDI"\r
743 }\r
744 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r
745 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
746 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
747 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
748 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
749 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
750 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
751 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
752 !if $(NETWORK_IP6_ENABLE) == TRUE\r
753 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf\r
754 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf\r
755 INF NetworkPkg/IpSecDxe/IpSecDxe.inf\r
756 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf\r
757 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf\r
758 !endif\r
759 !if $(NETWORK_IP6_ENABLE) == TRUE\r
760 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
761 INF NetworkPkg/TcpDxe/TcpDxe.inf\r
762 !else\r
763 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
764 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf\r
765 !endif\r
766 !if $(NETWORK_VLAN_ENABLE) == TRUE\r
767 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
768 !endif\r
769 !if $(NETWORK_ISCSI_ENABLE) == TRUE\r
770 !if $(NETWORK_IP6_ENABLE) == TRUE\r
771 INF NetworkPkg/IScsiDxe/IScsiDxe.inf\r
772 !else\r
773 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf\r
774 !endif\r
775 !endif\r
776!endif\r
777\r
c5a59080 778!if $(CAPSULE_ENABLE) || $(MICOCODE_CAPSULE_ENABLE)\r
54024039 779INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf\r
c5a59080
JY
780!endif\r
781!if $(CAPSULE_ENABLE)\r
782INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf\r
783!endif\r
784!if $(MICOCODE_CAPSULE_ENABLE)\r
785INF UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf\r
786!endif\r
787\r
788!if $(RECOVERY_ENABLE)\r
789FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {\r
790 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin\r
791 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"\r
792 }\r
793!endif\r
794\r
795!if $(CAPSULE_ENABLE)\r
796FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) {\r
797 SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer\r
798 SECTION UI = "Pkcs7TestRoot"\r
799 }\r
800!endif\r
801\r
5e752084 802[FV.FVMAIN_COMPACT]\r
803BlockSize = $(FLASH_BLOCK_SIZE)\r
804FvAlignment = 16\r
805ERASE_POLARITY = 1\r
806MEMORY_MAPPED = TRUE\r
807STICKY_WRITE = TRUE\r
808LOCK_CAP = TRUE\r
809LOCK_STATUS = TRUE\r
810WRITE_DISABLED_CAP = TRUE\r
811WRITE_ENABLED_CAP = TRUE\r
812WRITE_STATUS = TRUE\r
813WRITE_LOCK_CAP = TRUE\r
814WRITE_LOCK_STATUS = TRUE\r
815READ_DISABLED_CAP = TRUE\r
816READ_ENABLED_CAP = TRUE\r
817READ_STATUS = TRUE\r
818READ_LOCK_CAP = TRUE\r
819READ_LOCK_STATUS = TRUE\r
820\r
821\r
822\r
823FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
824!if $(LZMA_ENABLE) == TRUE\r
825# LZMA Compress\r
826 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
827 SECTION FV_IMAGE = FVMAIN\r
828 }\r
829!else\r
830!if $(DXE_COMPRESS_ENABLE) == TRUE\r
831# Tiano Compress\r
832 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
833 SECTION FV_IMAGE = FVMAIN\r
834 }\r
835!else\r
836# No Compress\r
837 SECTION COMPRESS PI_NONE {\r
838 SECTION FV_IMAGE = FVMAIN\r
839 }\r
840!endif\r
841!endif\r
842 }\r
843\r
844[FV.SETUP_DATA]\r
845BlockSize = $(FLASH_BLOCK_SIZE)\r
846#NumBlocks = 0x10\r
847FvAlignment = 16\r
848ERASE_POLARITY = 1\r
849MEMORY_MAPPED = TRUE\r
850STICKY_WRITE = TRUE\r
851LOCK_CAP = TRUE\r
852LOCK_STATUS = TRUE\r
853WRITE_DISABLED_CAP = TRUE\r
854WRITE_ENABLED_CAP = TRUE\r
855WRITE_STATUS = TRUE\r
856WRITE_LOCK_CAP = TRUE\r
857WRITE_LOCK_STATUS = TRUE\r
858READ_DISABLED_CAP = TRUE\r
859READ_ENABLED_CAP = TRUE\r
860READ_STATUS = TRUE\r
861READ_LOCK_CAP = TRUE\r
862READ_LOCK_STATUS = TRUE\r
863\r
864\r
c5a59080
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865!if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)\r
866[FV.CapsuleDispatchFv]\r
5e752084 867FvAlignment = 16\r
868ERASE_POLARITY = 1\r
869MEMORY_MAPPED = TRUE\r
870STICKY_WRITE = TRUE\r
871LOCK_CAP = TRUE\r
872LOCK_STATUS = TRUE\r
873WRITE_DISABLED_CAP = TRUE\r
874WRITE_ENABLED_CAP = TRUE\r
875WRITE_STATUS = TRUE\r
876WRITE_LOCK_CAP = TRUE\r
877WRITE_LOCK_STATUS = TRUE\r
878READ_DISABLED_CAP = TRUE\r
879READ_ENABLED_CAP = TRUE\r
880READ_STATUS = TRUE\r
881READ_LOCK_CAP = TRUE\r
882READ_LOCK_STATUS = TRUE\r
883\r
c5a59080
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884!if $(CAPSULE_ENABLE)\r
885INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf\r
886!endif\r
5e752084 887\r
c5a59080 888!endif\r
5e752084 889\r
890################################################################################\r
891#\r
892# Rules are use with the [FV] section's module INF type to define\r
893# how an FFS file is created for a given INF file. The following Rule are the default\r
894# rules for the different module type. User can add the customized rules to define the\r
895# content of the FFS file.\r
896#\r
897################################################################################\r
898[Rule.Common.SEC]\r
899 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
900 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
901 RAW BIN Align = 16 |.com\r
902 }\r
903\r
904[Rule.Common.SEC.BINARY]\r
905 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
906 PE32 PE32 Align = 8 |.efi\r
907 RAW BIN Align = 16 |.com\r
908 }\r
909\r
910[Rule.Common.PEI_CORE]\r
911 FILE PEI_CORE = $(NAMED_GUID) {\r
912 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
913 UI STRING="$(MODULE_NAME)" Optional\r
914 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
915 }\r
916\r
917[Rule.Common.PEIM]\r
918 FILE PEIM = $(NAMED_GUID) {\r
919 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
920 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
921 UI STRING="$(MODULE_NAME)" Optional\r
922 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
923 }\r
924\r
925[Rule.Common.PEIM.BINARY]\r
926 FILE PEIM = $(NAMED_GUID) {\r
927 PEI_DEPEX PEI_DEPEX Optional |.depex\r
928 PE32 PE32 Align = Auto |.efi\r
929 UI STRING="$(MODULE_NAME)" Optional\r
930 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
931 }\r
932\r
933[Rule.Common.PEIM.BIOSID]\r
934 FILE PEIM = $(NAMED_GUID) {\r
935 RAW BIN BiosId.bin\r
936 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
937 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
938 UI STRING="$(MODULE_NAME)" Optional\r
939 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
940 }\r
941\r
942[Rule.Common.USER_DEFINED.APINIT]\r
943 FILE RAW = $(NAMED_GUID) Fixed Align=4K {\r
944 RAW SEC_BIN |.com\r
945 }\r
946#cjia 2011-07-21\r
947[Rule.Common.USER_DEFINED.LEGACY16]\r
948 FILE FREEFORM = $(NAMED_GUID) {\r
949 UI STRING="$(MODULE_NAME)" Optional\r
950 RAW BIN |.bin\r
951 }\r
952#cjia\r
953\r
954[Rule.Common.USER_DEFINED.ASM16]\r
955 FILE FREEFORM = $(NAMED_GUID) {\r
956 UI STRING="$(MODULE_NAME)" Optional\r
957 RAW BIN |.com\r
958 }\r
959\r
960[Rule.Common.DXE_CORE]\r
961 FILE DXE_CORE = $(NAMED_GUID) {\r
962 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
963 UI STRING="$(MODULE_NAME)" Optional\r
964 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
965 }\r
966\r
967[Rule.Common.UEFI_DRIVER]\r
968 FILE DRIVER = $(NAMED_GUID) {\r
969 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
970 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
971 UI STRING="$(MODULE_NAME)" Optional\r
972 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
973 }\r
974\r
975[Rule.Common.UEFI_DRIVER.BINARY]\r
976 FILE DRIVER = $(NAMED_GUID) {\r
977 DXE_DEPEX DXE_DEPEX Optional |.depex\r
978 PE32 PE32 |.efi\r
979 UI STRING="$(MODULE_NAME)" Optional\r
980 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
981 }\r
982\r
983[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]\r
984 FILE DRIVER = $(NAMED_GUID) {\r
985 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex\r
986 PE32 PE32 |.efi\r
987 UI STRING="$(MODULE_NAME)" Optional\r
988 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
989 }\r
990\r
991[Rule.Common.DXE_DRIVER]\r
992 FILE DRIVER = $(NAMED_GUID) {\r
993 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
994 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
995 UI STRING="$(MODULE_NAME)" Optional\r
996 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
997 }\r
998\r
999[Rule.Common.DXE_DRIVER.BINARY]\r
1000 FILE DRIVER = $(NAMED_GUID) {\r
1001 DXE_DEPEX DXE_DEPEX Optional |.depex\r
1002 PE32 PE32 |.efi\r
1003 UI STRING="$(MODULE_NAME)" Optional\r
1004 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1005 }\r
1006\r
1007[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]\r
1008 FILE DRIVER = $(NAMED_GUID) {\r
1009 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1010 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1011 UI STRING="$(MODULE_NAME)" Optional\r
1012 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1013 RAW ACPI Optional |.acpi\r
1014 RAW ASL Optional |.aml\r
1015 }\r
1016\r
1017[Rule.Common.DXE_RUNTIME_DRIVER]\r
1018 FILE DRIVER = $(NAMED_GUID) {\r
1019 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1020 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1021 UI STRING="$(MODULE_NAME)" Optional\r
1022 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1023 }\r
1024\r
1025[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]\r
1026 FILE DRIVER = $(NAMED_GUID) {\r
1027 DXE_DEPEX DXE_DEPEX Optional |.depex\r
1028 PE32 PE32 |.efi\r
1029 UI STRING="$(MODULE_NAME)" Optional\r
1030 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1031 }\r
1032\r
1033[Rule.Common.DXE_SMM_DRIVER]\r
1034 FILE SMM = $(NAMED_GUID) {\r
1035 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1036 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1037 UI STRING="$(MODULE_NAME)" Optional\r
1038 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1039 }\r
1040\r
1041[Rule.Common.DXE_SMM_DRIVER.BINARY]\r
1042 FILE SMM = $(NAMED_GUID) {\r
1043 SMM_DEPEX SMM_DEPEX |.depex\r
1044 PE32 PE32 |.efi\r
1045 RAW BIN Optional |.aml\r
1046 UI STRING="$(MODULE_NAME)" Optional\r
1047 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1048 }\r
1049\r
1050[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r
1051 FILE SMM = $(NAMED_GUID) {\r
1052 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1053 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1054 UI STRING="$(MODULE_NAME)" Optional\r
1055 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1056 RAW ACPI Optional |.acpi\r
1057 RAW ASL Optional |.aml\r
1058 }\r
1059\r
1060[Rule.Common.SMM_CORE]\r
1061 FILE SMM_CORE = $(NAMED_GUID) {\r
1062 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1063 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1064 UI STRING="$(MODULE_NAME)" Optional\r
1065 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1066 }\r
1067\r
1068[Rule.Common.SMM_CORE.BINARY]\r
1069 FILE SMM_CORE = $(NAMED_GUID) {\r
1070 DXE_DEPEX DXE_DEPEX Optional |.depex\r
1071 PE32 PE32 |.efi\r
1072 UI STRING="$(MODULE_NAME)" Optional\r
1073 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1074 }\r
1075\r
1076[Rule.Common.UEFI_APPLICATION]\r
1077 FILE APPLICATION = $(NAMED_GUID) {\r
1078 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1079 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1080 UI STRING="$(MODULE_NAME)" Optional\r
1081 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1082 }\r
1083\r
1084[Rule.Common.UEFI_APPLICATION.UI]\r
1085 FILE APPLICATION = $(NAMED_GUID) {\r
1086 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1087 UI STRING="Enter Setup"\r
1088 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1089 }\r
1090\r
1091[Rule.Common.USER_DEFINED]\r
1092 FILE FREEFORM = $(NAMED_GUID) {\r
1093 UI STRING="$(MODULE_NAME)" Optional\r
1094 RAW BIN |.bin\r
1095 }\r
1096\r
98a88a76
KM
1097[Rule.Common.USER_DEFINED.BINARY]\r
1098 FILE FREEFORM = $(NAMED_GUID) {\r
1099 UI STRING="$(MODULE_NAME)" Optional\r
1100 RAW BIN |.bin\r
1101 }\r
1102\r
5e752084 1103[Rule.Common.USER_DEFINED.ACPITABLE]\r
1104 FILE FREEFORM = $(NAMED_GUID) {\r
1105 RAW ACPI Optional |.acpi\r
1106 RAW ASL Optional |.aml\r
1107 }\r
1108\r
1109[Rule.Common.USER_DEFINED.ACPITABLE2]\r
1110 FILE FREEFORM = $(NAMED_GUID) {\r
1111 RAW ASL Optional |.aml\r
1112 }\r
1113\r
1114[Rule.Common.ACPITABLE]\r
1115 FILE FREEFORM = $(NAMED_GUID) {\r
1116 RAW ACPI Optional |.acpi\r
1117 RAW ASL Optional |.aml\r
1118 }\r
1119\r
c5a59080
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1120[Rule.Common.PEIM.FMP_IMAGE_DESC]\r
1121 FILE PEIM = $(NAMED_GUID) {\r
1122 RAW BIN |.acpi\r
1123 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1124 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1125 UI STRING="$(MODULE_NAME)" Optional\r
1126 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1127 }\r