]> git.proxmox.com Git - mirror_edk2.git/blame - Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
Vlv2TbltDevicePkg: Use the merged Variable driver
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkgGcc.fdf
CommitLineData
3cbfba02
DW
1#/** @file
2# FDF file of Platform.
3#
f4e7aa05 4# Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
3cbfba02
DW
5#
6# This program and the accompanying materials are licensed and made available under
7# the terms and conditions of the BSD License that accompanies this distribution.
8# The full text of the license may be found at
9# http://opensource.org/licenses/bsd-license.php.
10#
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13#
14#
15#**/
16
17[Defines]
18DEFINE FLASH_BASE = 0xFFD00000 #The base address of the 3Mb FLASH Device.
19DEFINE FLASH_SIZE = 0x00300000 #The flash size in bytes of the 3Mb FLASH Device.
20DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 3Mb FLASH Device.
21DEFINE FLASH_NUM_BLOCKS = 0x300 #The number of blocks in 3Mb FLASH Device.
22DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23DEFINE FLASH_AREA_SIZE = 0x00800000
24
b9459211
MG
25DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
26DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00030000
27DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFD00000
3cbfba02 28
b9459211 29DEFINE FLASH_REGION_VPD_OFFSET = 0x00030000
3cbfba02
DW
30DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
31
b9459211 32DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0006E000
3cbfba02
DW
33DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
34
35
b9459211 36DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00070000
3cbfba02
DW
37DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
38
39!if $(MINNOW2_FSP_BUILD) == TRUE
b9459211 40DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000B0000
3cbfba02 41DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
b9459211 42DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
3cbfba02 43
b9459211 44DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x000F8000
3cbfba02 45DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
b9459211 46DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
3cbfba02
DW
47
48!endif
49
a4d42c22
TH
50DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00100000
51DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00196000
3cbfba02
DW
52
53
a4d42c22 54DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00296000
d58cb22f 55DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002C000
3cbfba02 56
d58cb22f
SL
57DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x002C2000
58DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0003E000
3cbfba02
DW
59
60################################################################################
61#
62# FD Section
63# The [FD] Section is made up of the definition statements and a
64# description of what goes into the Flash Device Image. Each FD section
65# defines one flash "device" image. A flash device image may be one of
66# the following: Removable media bootable image (like a boot floppy
67# image,) an Option ROM image (that would be "flashed" into an add-in
68# card,) a System "Flash" image (that would be burned into a system's
69# flash) or an Update ("Capsule") image that will be used to update and
70# existing system flash.
71#
72################################################################################
73[FD.Vlv]
74BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
75Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
76ErasePolarity = 1
77BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
78NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
79
80#
81#Flash location override based on actual flash map
82#
83SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
84SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
85
86!if $(MINNOW2_FSP_BUILD) == TRUE
87# put below PCD value setting into dsc file
88#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
89#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
90#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
91#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
92#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
93#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
94#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
95
96!endif
97################################################################################
98#
99# Following are lists of FD Region layout which correspond to the locations of different
100# images within the flash device.
101#
102# Regions must be defined in ascending order and may not overlap.
103#
104# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
105# the pipe "|" character, followed by the size of the region, also in hex with the leading
106# "0x" characters. Like:
107# Offset|Size
108# PcdOffsetCName|PcdSizeCName
109# RegionType <FV, DATA, or FILE>
110# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
111#
112################################################################################
113# Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
114# so we hardcode the default value of variable here.
115# Please note that we MUST update the binary once the default value is changed.
b9459211
MG
116
117#
118 # CPU Microcodes
119 #
120
121$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
122gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
123FV = MICROCODE_FV
124
3cbfba02
DW
125$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
126gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
127FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
128
129$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
130gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
131FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
132
133$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
134gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
135FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
136
137!if $(MINNOW2_FSP_BUILD) == TRUE
138
139 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
140 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
141 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
142
143
144 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
145 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
146
147!endif
3cbfba02
DW
148
149 #
150 # Main Block
151 #
152$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
153gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
154FV = FVMAIN_COMPACT
155
156 #
157 # FV Recovery#2
158 #
159$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
160gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
161FV = FVRECOVERY2
162
163 #
164 # FV Recovery
165 #
166$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
167gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
168FV = FVRECOVERY
169
170################################################################################
171#
172# FV Section
173#
174# [FV] section is used to define what components or modules are placed within a flash
175# device file. This section also defines order the components and modules are positioned
176# within the image. The [FV] section consists of define statements, set statements and
177# module statements.
178#
179################################################################################
180[FV.MICROCODE_FV]
181BlockSize = $(FLASH_BLOCK_SIZE)
182FvAlignment = 16
183ERASE_POLARITY = 1
184MEMORY_MAPPED = TRUE
185STICKY_WRITE = TRUE
186LOCK_CAP = TRUE
187LOCK_STATUS = FALSE
188WRITE_DISABLED_CAP = TRUE
189WRITE_ENABLED_CAP = TRUE
190WRITE_STATUS = TRUE
191WRITE_LOCK_CAP = TRUE
192WRITE_LOCK_STATUS = TRUE
193READ_DISABLED_CAP = TRUE
194READ_ENABLED_CAP = TRUE
195READ_STATUS = TRUE
196READ_LOCK_CAP = TRUE
197READ_LOCK_STATUS = TRUE
198
199FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
200 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
201}
202
203################################################################################
204#
205# FV Section
206#
207# [FV] section is used to define what components or modules are placed within a flash
208# device file. This section also defines order the components and modules are positioned
209# within the image. The [FV] section consists of define statements, set statements and
210# module statements.
211#
212################################################################################
213[FV.FVRECOVERY2]
214BlockSize = $(FLASH_BLOCK_SIZE)
215FvAlignment = 16 #FV alignment and FV attributes setting.
216ERASE_POLARITY = 1
217MEMORY_MAPPED = TRUE
218STICKY_WRITE = TRUE
219LOCK_CAP = TRUE
220LOCK_STATUS = TRUE
221WRITE_DISABLED_CAP = TRUE
222WRITE_ENABLED_CAP = TRUE
223WRITE_STATUS = TRUE
224WRITE_LOCK_CAP = TRUE
225WRITE_LOCK_STATUS = TRUE
226READ_DISABLED_CAP = TRUE
227READ_ENABLED_CAP = TRUE
228READ_STATUS = TRUE
229READ_LOCK_CAP = TRUE
230READ_LOCK_STATUS = TRUE
231FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
232
233
234
235INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
236
237!if $(MINNOW2_FSP_BUILD) == FALSE
238INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
239INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
240INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
241INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
242INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
243INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
244INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
245INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
246INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
247!endif
248
249INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
250!if $(TPM_ENABLED) == TRUE
251INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
252INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
253INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
254!endif
f4e7aa05
TH
255!if $(FTPM_ENABLE) == TRUE
256INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config
257!endif
3cbfba02
DW
258INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
259
260!if $(ACPI50_ENABLE) == TRUE
261 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
262!endif
263!if $(PERFORMANCE_ENABLE) == TRUE
264INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
265!endif
266
267[FV.FVRECOVERY]
268BlockSize = $(FLASH_BLOCK_SIZE)
269FvAlignment = 16 #FV alignment and FV attributes setting.
270ERASE_POLARITY = 1
271MEMORY_MAPPED = TRUE
272STICKY_WRITE = TRUE
273LOCK_CAP = TRUE
274LOCK_STATUS = TRUE
275WRITE_DISABLED_CAP = TRUE
276WRITE_ENABLED_CAP = TRUE
277WRITE_STATUS = TRUE
278WRITE_LOCK_CAP = TRUE
279WRITE_LOCK_STATUS = TRUE
280READ_DISABLED_CAP = TRUE
281READ_ENABLED_CAP = TRUE
282READ_STATUS = TRUE
283READ_LOCK_CAP = TRUE
284READ_LOCK_STATUS = TRUE
285FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
286
287
288!if $(MINNOW2_FSP_BUILD) == TRUE
289INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
290!else
291INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
292!endif
293
294INF MdeModulePkg/Core/Pei/PeiMain.inf
295!if $(MINNOW2_FSP_BUILD) == TRUE
296INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
297INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
298!endif
299INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
300INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
3cbfba02 301INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
3cbfba02
DW
302
303INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
304
305!if $(MINNOW2_FSP_BUILD) == FALSE
306INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
307!endif
308
f4e7aa05
TH
309!if $(FTPM_ENABLE) == TRUE
310INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
311!endif
312
3cbfba02
DW
313!if $(SOURCE_DEBUG_ENABLE) == TRUE
314 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
315!endif
316
317
318!if $(CAPSULE_ENABLE) == TRUE
319INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
320INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
321!endif
322
323!if $(MINNOW2_FSP_BUILD) == FALSE
324!if $(PCIESC_ENABLE) == TRUE
325INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
326!endif
327INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
328!endif
329
330INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
331
332[FV.FVMAIN]
333BlockSize = $(FLASH_BLOCK_SIZE)
334FvAlignment = 16
335ERASE_POLARITY = 1
336MEMORY_MAPPED = TRUE
337STICKY_WRITE = TRUE
338LOCK_CAP = TRUE
339LOCK_STATUS = TRUE
340WRITE_DISABLED_CAP = TRUE
341WRITE_ENABLED_CAP = TRUE
342WRITE_STATUS = TRUE
343WRITE_LOCK_CAP = TRUE
344WRITE_LOCK_STATUS = TRUE
345READ_DISABLED_CAP = TRUE
346READ_ENABLED_CAP = TRUE
347READ_STATUS = TRUE
348READ_LOCK_CAP = TRUE
349READ_LOCK_STATUS = TRUE
350FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
351
352APRIORI DXE {
353 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
354 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
355 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
356 }
357
358FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
359 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
360 }
361
362 #
363 # EDK II Related Platform codes
364 #
365
366 !if $(MINNOW2_FSP_BUILD) == TRUE
367 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
368 !endif
369
370INF MdeModulePkg/Core/Dxe/DxeMain.inf
371INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
372!if $(ACPI50_ENABLE) == TRUE
373INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
374INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
375!endif
376
377
378INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
379INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
380INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
381INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
382INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
383INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
384INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
385INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
386INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
387INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
388INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
389INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
390INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
391
3cbfba02
DW
392INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
393INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
394INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
395INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
396INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
0b8c5cd4
SZ
397!if $(SECURE_BOOT_ENABLE)
398INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
3cbfba02
DW
399!endif
400
401INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
402
403INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
404INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
405INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
406INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
407
408
409INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
410
411!if $(DATAHUB_ENABLE) == TRUE
412INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
413!endif
414INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
415INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
416
417INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
418
419 #
420 # EDK II Related Silicon codes
421 #
422INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
423
424!if $(USE_HPET_TIMER) == TRUE
425INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
426!else
427INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
428!endif
429INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
430
431INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
432
433INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
434INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
435
436!if $(MINNOW2_FSP_BUILD) == FALSE
437INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
438!endif
439INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
440!if $(PCIESC_ENABLE) == TRUE
441INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
442!endif
443
444INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
445INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
446INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
447INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
448INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
449!if $(MINNOW2_FSP_BUILD) == FALSE
450INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
451!else
452INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
453INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
454!endif
f4e7aa05
TH
455!if $(MINNOW2_FSP_BUILD) == FALSE
456 !if $(SEC_ENABLE) == TRUE
457 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
458 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
459 !endif
460!endif
3cbfba02
DW
461!if $(TPM_ENABLED) == TRUE
462INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
463INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
464INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
465!endif
f4e7aa05
TH
466!if $(FTPM_ENABLE) == TRUE
467INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
468INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
469INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
470INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf
471INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
472!endif
3cbfba02
DW
473
474#
475# EDK II Related Platform codes
476#
477INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
478INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
479INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
480INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
481INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
482INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
483INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
484INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
485INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
486!if $(GOP_DRIVER_ENABLE) == TRUE
487 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
488 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
489 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
490 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
491 SECTION UI = "IntelGopDriver"
492}
493!endif
494
495INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
496 #
497 # SMM
498 #
499INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
500INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
501INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf
502
503INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
504INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
505INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf
506INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
507INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
508# INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf
0ad3c505 509INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
3cbfba02
DW
510 #
511 # ACPI
512 #
513INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
514INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
515INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
516INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
517
518INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
519
520INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
521
522 #
523 # PCI
524 #
525INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
526
527INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
528
529
530#
531# ISA
532#
533INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
534INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
535INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
536!if $(SOURCE_DEBUG_ENABLE) != TRUE
537INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
538!endif
1b354b08
TH
539#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
540#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
3cbfba02
DW
541
542#
543# SDIO
544#
545INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
546INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
547#
548# IDE/SCSI/AHCI
549#
550INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
551
552INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
553
554INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
555!if $(SATA_ENABLE) == TRUE
556INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
557#
558
559#
560INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
561INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
562!if $(SCSI_ENABLE) == TRUE
563INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
564INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
565!endif
566#
567!endif
568# Console
569#
570INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
c7d161de 571INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
3cbfba02
DW
572INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
573INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
574INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
575INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
576INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
577INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
578 #
579 # USB
580 #
581!if $(USB_ENABLE) == TRUE
582INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
583INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
584INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
585INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
586INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
587INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
588INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
589!endif
590
591 #
592 # ECP
593 #
594INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
595INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
596INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
597INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
598INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
599INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
600 #
601 # SMBIOS
602 #
603INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
604INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
605
606INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
607
608 #
609 # Legacy Modules
610 #
611INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
612
613#
614# FAT file system
615#
616FILE DRIVER = 961578FE-B6B7-44c3-AF35-6BC705CD2B1F {
617 SECTION PE32 = FatBinPkg/EnhancedFatDxe/$(EDK_DXE_ARCHITECTURE)/Fat.efi
618 }
619#
620# UEFI Shell
621#
622FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
623# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
624 SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
625 }
626
627
628
629!if $(GOP_DRIVER_ENABLE) == TRUE
630FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
631 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
632 SECTION UI = "IntelGopVbt"
633}
634!endif
635
636#
637# Network Modules
638#
639!if $(NETWORK_ENABLE) == TRUE
640 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
641 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
642 SECTION UI = "UNDI"
643 }
644 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
645 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
646 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
647 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
648 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
649 INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
650 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
651 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
652 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
653 !if $(NETWORK_IP6_ENABLE) == TRUE
654 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
655 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
656 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
657 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
658 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
659 !endif
660 !if $(NETWORK_IP6_ENABLE) == TRUE
661 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
662 INF NetworkPkg/TcpDxe/TcpDxe.inf
663 !else
664 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
665 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
666 !endif
667 !if $(NETWORK_VLAN_ENABLE) == TRUE
668 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
669 !endif
670 !if $(NETWORK_ISCSI_ENABLE) == TRUE
671 !if $(NETWORK_IP6_ENABLE) == TRUE
672 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
673 !else
674 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
675 !endif
676 !endif
677!endif
678
679[FV.FVMAIN_COMPACT]
680BlockSize = $(FLASH_BLOCK_SIZE)
681FvAlignment = 16
682ERASE_POLARITY = 1
683MEMORY_MAPPED = TRUE
684STICKY_WRITE = TRUE
685LOCK_CAP = TRUE
686LOCK_STATUS = TRUE
687WRITE_DISABLED_CAP = TRUE
688WRITE_ENABLED_CAP = TRUE
689WRITE_STATUS = TRUE
690WRITE_LOCK_CAP = TRUE
691WRITE_LOCK_STATUS = TRUE
692READ_DISABLED_CAP = TRUE
693READ_ENABLED_CAP = TRUE
694READ_STATUS = TRUE
695READ_LOCK_CAP = TRUE
696READ_LOCK_STATUS = TRUE
697
698
699
700FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
701!if $(LZMA_ENABLE) == TRUE
702# LZMA Compress
703 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
704 SECTION FV_IMAGE = FVMAIN
705 }
706!else
707!if $(DXE_COMPRESS_ENABLE) == TRUE
708# Tiano Compress
709 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
710 SECTION FV_IMAGE = FVMAIN
711 }
712!else
713# No Compress
714 SECTION COMPRESS PI_NONE {
715 SECTION FV_IMAGE = FVMAIN
716 }
717!endif
718!endif
719 }
720
721[FV.SETUP_DATA]
722BlockSize = $(FLASH_BLOCK_SIZE)
723#NumBlocks = 0x10
724FvAlignment = 16
725ERASE_POLARITY = 1
726MEMORY_MAPPED = TRUE
727STICKY_WRITE = TRUE
728LOCK_CAP = TRUE
729LOCK_STATUS = TRUE
730WRITE_DISABLED_CAP = TRUE
731WRITE_ENABLED_CAP = TRUE
732WRITE_STATUS = TRUE
733WRITE_LOCK_CAP = TRUE
734WRITE_LOCK_STATUS = TRUE
735READ_DISABLED_CAP = TRUE
736READ_ENABLED_CAP = TRUE
737READ_STATUS = TRUE
738READ_LOCK_CAP = TRUE
739READ_LOCK_STATUS = TRUE
740
741
742[FV.Update_Data]
743BlockSize = $(FLASH_BLOCK_SIZE)
744FvAlignment = 16
745ERASE_POLARITY = 1
746MEMORY_MAPPED = TRUE
747STICKY_WRITE = TRUE
748LOCK_CAP = TRUE
749LOCK_STATUS = TRUE
750WRITE_DISABLED_CAP = TRUE
751WRITE_ENABLED_CAP = TRUE
752WRITE_STATUS = TRUE
753WRITE_LOCK_CAP = TRUE
754WRITE_LOCK_STATUS = TRUE
755READ_DISABLED_CAP = TRUE
756READ_ENABLED_CAP = TRUE
757READ_STATUS = TRUE
758READ_LOCK_CAP = TRUE
759READ_LOCK_STATUS = TRUE
760
761FILE RAW = 88888888-8888-8888-8888-888888888888 {
762 FD = Vlv
763 }
764
765[FV.BiosUpdateCargo]
766BlockSize = $(FLASH_BLOCK_SIZE)
767FvAlignment = 16
768ERASE_POLARITY = 1
769MEMORY_MAPPED = TRUE
770STICKY_WRITE = TRUE
771LOCK_CAP = TRUE
772LOCK_STATUS = TRUE
773WRITE_DISABLED_CAP = TRUE
774WRITE_ENABLED_CAP = TRUE
775WRITE_STATUS = TRUE
776WRITE_LOCK_CAP = TRUE
777WRITE_LOCK_STATUS = TRUE
778READ_DISABLED_CAP = TRUE
779READ_ENABLED_CAP = TRUE
780READ_STATUS = TRUE
781READ_LOCK_CAP = TRUE
782READ_LOCK_STATUS = TRUE
783
784
785
786[FV.BiosUpdate]
787BlockSize = $(FLASH_BLOCK_SIZE)
788FvAlignment = 16
789ERASE_POLARITY = 1
790MEMORY_MAPPED = TRUE
791STICKY_WRITE = TRUE
792LOCK_CAP = TRUE
793LOCK_STATUS = TRUE
794WRITE_DISABLED_CAP = TRUE
795WRITE_ENABLED_CAP = TRUE
796WRITE_STATUS = TRUE
797WRITE_LOCK_CAP = TRUE
798WRITE_LOCK_STATUS = TRUE
799READ_DISABLED_CAP = TRUE
800READ_ENABLED_CAP = TRUE
801READ_STATUS = TRUE
802READ_LOCK_CAP = TRUE
803READ_LOCK_STATUS = TRUE
804
805[Capsule.Capsule_Boot]
806#
807# gEfiCapsuleGuid supported by platform
808# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
809#
810CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
811CAPSULE_FLAGS = PersistAcrossReset
812CAPSULE_HEADER_SIZE = 0x20
813
814FV = BiosUpdate
815
816[Capsule.Capsule_Reset]
817#
818# gEfiCapsuleGuid supported by platform
819# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
820#
821CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
822CAPSULE_FLAGS = PersistAcrossReset
823CAPSULE_HEADER_SIZE = 0x20
824
825FV = BiosUpdate
826
827################################################################################
828#
829# Rules are use with the [FV] section's module INF type to define
830# how an FFS file is created for a given INF file. The following Rule are the default
831# rules for the different module type. User can add the customized rules to define the
832# content of the FFS file.
833#
834################################################################################
835[Rule.Common.SEC]
836 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
837 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
838 RAW BIN Align = 16 |.com
839 }
840
841[Rule.Common.SEC.BINARY]
842 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
843 PE32 PE32 Align = 8 |.efi
844 RAW BIN Align = 16 |.com
845 }
846
847[Rule.Common.PEI_CORE]
848 FILE PEI_CORE = $(NAMED_GUID) {
849 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
850 UI STRING="$(MODULE_NAME)" Optional
851 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
852 }
853
854[Rule.Common.PEIM]
855 FILE PEIM = $(NAMED_GUID) {
856 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
857 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
858 UI STRING="$(MODULE_NAME)" Optional
859 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
860 }
861
862[Rule.Common.PEIM.BINARY]
863 FILE PEIM = $(NAMED_GUID) {
864 PEI_DEPEX PEI_DEPEX Optional |.depex
865 PE32 PE32 Align = Auto |.efi
866 UI STRING="$(MODULE_NAME)" Optional
867 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
868 }
869
870[Rule.Common.PEIM.BIOSID]
871 FILE PEIM = $(NAMED_GUID) {
872 RAW BIN BiosId.bin
873 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
874 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
875 UI STRING="$(MODULE_NAME)" Optional
876 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
877 }
878
879[Rule.Common.USER_DEFINED.APINIT]
880 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
881 RAW SEC_BIN |.com
882 }
883#cjia 2011-07-21
884[Rule.Common.USER_DEFINED.LEGACY16]
885 FILE FREEFORM = $(NAMED_GUID) {
886 UI STRING="$(MODULE_NAME)" Optional
887 RAW BIN |.bin
888 }
889#cjia
890
891[Rule.Common.USER_DEFINED.ASM16]
892 FILE FREEFORM = $(NAMED_GUID) {
893 UI STRING="$(MODULE_NAME)" Optional
894 RAW BIN |.com
895 }
896
897[Rule.Common.DXE_CORE]
898 FILE DXE_CORE = $(NAMED_GUID) {
899 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
900 UI STRING="$(MODULE_NAME)" Optional
901 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
902 }
903
904[Rule.Common.UEFI_DRIVER]
905 FILE DRIVER = $(NAMED_GUID) {
906 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
907 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
908 UI STRING="$(MODULE_NAME)" Optional
909 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
910 }
911
912[Rule.Common.UEFI_DRIVER.BINARY]
913 FILE DRIVER = $(NAMED_GUID) {
914 DXE_DEPEX DXE_DEPEX Optional |.depex
915 PE32 PE32 |.efi
916 UI STRING="$(MODULE_NAME)" Optional
917 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
918 }
919
920[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
921 FILE DRIVER = $(NAMED_GUID) {
922 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
923 PE32 PE32 |.efi
924 UI STRING="$(MODULE_NAME)" Optional
925 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
926 }
927
928[Rule.Common.DXE_DRIVER]
929 FILE DRIVER = $(NAMED_GUID) {
930 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
931 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
932 UI STRING="$(MODULE_NAME)" Optional
933 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
934 }
935
936[Rule.Common.DXE_DRIVER.BINARY]
937 FILE DRIVER = $(NAMED_GUID) {
938 DXE_DEPEX DXE_DEPEX Optional |.depex
939 PE32 PE32 |.efi
940 UI STRING="$(MODULE_NAME)" Optional
941 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
942 }
943
944[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
945 FILE DRIVER = $(NAMED_GUID) {
946 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
947 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
948 UI STRING="$(MODULE_NAME)" Optional
949 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
950 RAW ACPI Optional |.acpi
951 RAW ASL Optional |.aml
952 }
953
954[Rule.Common.DXE_RUNTIME_DRIVER]
955 FILE DRIVER = $(NAMED_GUID) {
956 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
957 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
958 UI STRING="$(MODULE_NAME)" Optional
959 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
960 }
961
962[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
963 FILE DRIVER = $(NAMED_GUID) {
964 DXE_DEPEX DXE_DEPEX Optional |.depex
965 PE32 PE32 |.efi
966 UI STRING="$(MODULE_NAME)" Optional
967 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
968 }
969
970[Rule.Common.DXE_SMM_DRIVER]
971 FILE SMM = $(NAMED_GUID) {
972 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
973 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
974 UI STRING="$(MODULE_NAME)" Optional
975 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
976 }
977
978[Rule.Common.DXE_SMM_DRIVER.BINARY]
979 FILE SMM = $(NAMED_GUID) {
980 SMM_DEPEX SMM_DEPEX |.depex
981 PE32 PE32 |.efi
f4e7aa05 982 RAW BIN Optional |.aml
3cbfba02
DW
983 UI STRING="$(MODULE_NAME)" Optional
984 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
985 }
986
987[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
988 FILE SMM = $(NAMED_GUID) {
989 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
990 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
991 UI STRING="$(MODULE_NAME)" Optional
992 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
993 RAW ACPI Optional |.acpi
994 RAW ASL Optional |.aml
995 }
996
997[Rule.Common.SMM_CORE]
998 FILE SMM_CORE = $(NAMED_GUID) {
999 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1000 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1001 UI STRING="$(MODULE_NAME)" Optional
1002 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1003 }
1004
1005[Rule.Common.SMM_CORE.BINARY]
1006 FILE SMM_CORE = $(NAMED_GUID) {
1007 DXE_DEPEX DXE_DEPEX Optional |.depex
1008 PE32 PE32 |.efi
1009 UI STRING="$(MODULE_NAME)" Optional
1010 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1011 }
1012
1013[Rule.Common.UEFI_APPLICATION]
1014 FILE APPLICATION = $(NAMED_GUID) {
1015 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1016 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1017 UI STRING="$(MODULE_NAME)" Optional
1018 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1019 }
1020
1021[Rule.Common.UEFI_APPLICATION.UI]
1022 FILE APPLICATION = $(NAMED_GUID) {
1023 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1024 UI STRING="Enter Setup"
1025 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1026 }
1027
1028[Rule.Common.USER_DEFINED]
1029 FILE FREEFORM = $(NAMED_GUID) {
1030 UI STRING="$(MODULE_NAME)" Optional
1031 RAW BIN |.bin
1032 }
1033
1034[Rule.Common.USER_DEFINED.ACPITABLE]
1035 FILE FREEFORM = $(NAMED_GUID) {
1036 RAW ACPI Optional |.acpi
1037 RAW ASL Optional |.aml
1038 }
1039
1040[Rule.Common.USER_DEFINED.ACPITABLE2]
1041 FILE FREEFORM = $(NAMED_GUID) {
1042 RAW ASL Optional |.aml
1043 }
1044
1045[Rule.Common.ACPITABLE]
1046 FILE FREEFORM = $(NAMED_GUID) {
1047 RAW ACPI Optional |.acpi
1048 RAW ASL Optional |.aml
1049 }
1050