ARM Packages: Removed trailing spaces

[mirror_edk2.git] / ArmPlatformPkg / Drivers / PL35xSmc / InitializeSMC.asm

//\r
//  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
//\r
//  This program and the accompanying materials\r
//  are licensed and made available under the terms and conditions of the BSD License\r
//  which accompanies this distribution.  The full text of the license may be found at\r
//  http://opensource.org/licenses/bsd-license.php\r
//\r
//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
//\r
\r
#include <AsmMacroIoLib.h>\r
#include <Library/PcdLib.h>\r
#include <Drivers/PL35xSmc.h>\r
#include <AutoGen.h>\r
\r
  INCLUDE AsmMacroIoLib.inc\r
\r
  EXPORT  PL35xSmcInitialize\r
  EXPORT  PL35xSmcSetRefresh\r
\r
  PRESERVE8\r
  AREA    ModuleInitializeSMC, CODE, READONLY\r
\r
// IN r1 Smc Base Address\r
// IN r2 Smc Configuration Start Address\r
// IN r3 Smc Configuration End Address\r
// NOTE: This code is been called before any stack has been setup. It means some registers\r
//       could be overwritten (case of 'r0')\r
PL35xSmcInitialize\r
  // While (SmcConfigurationStart < SmcConfigurationEnd)\r
  cmp   r2, r3\r
  blxge lr\r
\r
  // Write to set_cycle register(holding register for NOR 1 cycle register or NAND cycle register)\r
  ldr   r0, [r2, #0x4]\r
  str   r0, [r1, #PL350_SMC_SET_CYCLES_OFFSET]\r
\r
  // Write to set_opmode register(holding register for NOR 1 opomode register or NAND opmode register)\r
  ldr   r0, [r2, #0x8]\r
  str   r0, [r1, #PL350_SMC_SET_OPMODE_OFFSET]\r
\r
  // Write to direct_cmd register so that the NOR 1 registers(set-cycles and opmode) are updated with holding registers\r
  ldr   r0, =PL350_SMC_DIRECT_CMD_ADDR_CMD_UPDATE\r
  ldr   r4, [r2, #0x0]\r
  orr   r0, r0, r4\r
  str   r0, [r1, #PL350_SMC_DIRECT_CMD_OFFSET]\r
\r
  add   r2, #0xC\r
  b     PL35xSmcInitialize\r
\r
// IN r1 Smc Base Address\r
// IN r2 Smc Refresh Period 0\r
// IN r3 Smc Refresh Period 1\r
PL35xSmcSetRefresh\r
  str   r2, [r1, #PL350_SMC_REFRESH_0_OFFSET]\r
  str   r3, [r1, #PL350_SMC_REFRESH_1_OFFSET]\r
  blx lr\r
\r
  END\r