| | 1 | //\r |
| | 2 | // Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r |
| | 3 | //\r |
| | 4 | // This program and the accompanying materials\r |
| | 5 | // are licensed and made available under the terms and conditions of the BSD License\r |
| | 6 | // which accompanies this distribution. The full text of the license may be found at\r |
| | 7 | // http://opensource.org/licenses/bsd-license.php\r |
| | 8 | //\r |
| | 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| | 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
| | 11 | //\r |
| | 12 | //\r |
| | 13 | \r |
| | 14 | #include <AutoGen.h>\r |
| | 15 | \r |
| | 16 | INCLUDE AsmMacroIoLib.inc\r |
| | 17 | \r |
| | 18 | IMPORT CEntryPoint\r |
| | 19 | IMPORT ArmPlatformGetCorePosition\r |
| | 20 | IMPORT ArmPlatformIsPrimaryCore\r |
| | 21 | IMPORT ArmReadMpidr\r |
| | 22 | IMPORT ArmPlatformPeiBootAction\r |
| | 23 | EXPORT _ModuleEntryPoint\r |
| | 24 | \r |
| | 25 | PRESERVE8\r |
| | 26 | AREA PrePeiCoreEntryPoint, CODE, READONLY\r |
| | 27 | \r |
| | 28 | StartupAddr DCD CEntryPoint\r |
| | 29 | \r |
| | 30 | _ModuleEntryPoint\r |
| | 31 | // Do early platform specific actions\r |
| | 32 | bl ArmPlatformPeiBootAction\r |
| | 33 | \r |
| | 34 | // Identify CPU ID\r |
| | 35 | bl ArmReadMpidr\r |
| | 36 | // Keep a copy of the MpId register value\r |
| | 37 | mov r5, r0\r |
| | 38 | \r |
| | 39 | // Is it the Primary Core ?\r |
| | 40 | bl ArmPlatformIsPrimaryCore\r |
| | 41 | \r |
| | 42 | // Get the top of the primary stacks (and the base of the secondary stacks)\r |
| | 43 | mov32 r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize)\r |
| | 44 | \r |
| | 45 | // r0 is equal to 1 if I am the primary core\r |
| | 46 | cmp r0, #1\r |
| | 47 | beq _SetupPrimaryCoreStack\r |
| | 48 | \r |
| | 49 | _SetupSecondaryCoreStack\r |
| | 50 | // r1 contains the base of the secondary stacks\r |
| | 51 | \r |
| | 52 | // Get the Core Position\r |
| | 53 | mov r6, r1 // Save base of the secondary stacks\r |
| | 54 | mov r0, r5\r |
| | 55 | bl ArmPlatformGetCorePosition\r |
| | 56 | // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r |
| | 57 | add r0, r0, #1\r |
| | 58 | \r |
| | 59 | // StackOffset = CorePos * StackSize\r |
| | 60 | mov32 r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)\r |
| | 61 | mul r0, r0, r2\r |
| | 62 | // SP = StackBase + StackOffset\r |
| | 63 | add sp, r6, r0\r |
| | 64 | \r |
| | 65 | _PrepareArguments\r |
| | 66 | // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r |
| | 67 | mov32 r2, FixedPcdGet32(PcdFvBaseAddress)\r |
| | 68 | ldr r1, [r2, #4]\r |
| | 69 | \r |
| | 70 | // Move sec startup address into a data register\r |
| | 71 | // Ensure we're jumping to FV version of the code (not boot remapped alias)\r |
| | 72 | ldr r3, StartupAddr\r |
| | 73 | \r |
| | 74 | // Jump to PrePeiCore C code\r |
| | 75 | // r0 = mp_id\r |
| | 76 | // r1 = pei_core_address\r |
| | 77 | mov r0, r5\r |
| | 78 | blx r3\r |
| | 79 | \r |
| | 80 | _SetupPrimaryCoreStack\r |
| | 81 | mov sp, r1\r |
| | 82 | mov32 r8, FixedPcdGet64 (PcdCPUCoresStackBase)\r |
| | 83 | mov32 r9, FixedPcdGet32 (PcdInitValueInTempStack)\r |
| | 84 | mov r10, r9\r |
| | 85 | mov r11, r9\r |
| | 86 | mov r12, r9\r |
| | 87 | 0:stm r8!, {r9-r12}\r |
| | 88 | cmp r8, r1\r |
| | 89 | blt 0b\r |
| | 90 | b _PrepareArguments\r |
| | 91 | \r |
| | 92 | _NeverReturn\r |
| | 93 | b _NeverReturn\r |
| | 94 | \r |
| | 95 | END\r |
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